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Cc: Helge Deller Cc: Yoshinori Sato Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/accel/tcg/cpu-ops.h | 5 +++++ accel/tcg/cputlb.c | 13 +++++++++++++ target/alpha/cpu.c | 1 + target/hppa/cpu.c | 1 + target/sh4/cpu.c | 1 + 5 files changed, 21 insertions(+) diff --git a/include/accel/tcg/cpu-ops.h b/include/accel/tcg/cpu-ops.h index 83b2c2c864..4f3b4fd3bc 100644 --- a/include/accel/tcg/cpu-ops.h +++ b/include/accel/tcg/cpu-ops.h @@ -322,6 +322,11 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, v= addr len, */ int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len); =20 +/* + * Common pointer_wrap implementations. + */ +vaddr cpu_pointer_wrap_notreached(CPUState *, int, vaddr, vaddr); + #endif =20 #endif /* TCG_CPU_OPS_H */ diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index c394293d33..75cd875948 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -2932,3 +2932,16 @@ uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr a= ddr, { return do_ld8_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH); } + +/* + * Common pointer_wrap implementations. + */ + +/* + * To be used for strict alignment targets. + * Because no accesses are unaligned, no accesses wrap either. + */ +vaddr cpu_pointer_wrap_notreached(CPUState *cs, int idx, vaddr res, vaddr = base) +{ + g_assert_not_reached(); +} diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 890b84c032..2082db45ea 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -261,6 +261,7 @@ static const TCGCPUOps alpha_tcg_ops =3D { .record_sigbus =3D alpha_cpu_record_sigbus, #else .tlb_fill =3D alpha_cpu_tlb_fill, + .pointer_wrap =3D cpu_pointer_wrap_notreached, .cpu_exec_interrupt =3D alpha_cpu_exec_interrupt, .cpu_exec_halt =3D alpha_cpu_has_work, .cpu_exec_reset =3D cpu_reset, diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 6465181543..24777727e6 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -269,6 +269,7 @@ static const TCGCPUOps hppa_tcg_ops =3D { =20 #ifndef CONFIG_USER_ONLY .tlb_fill_align =3D hppa_cpu_tlb_fill_align, + .pointer_wrap =3D cpu_pointer_wrap_notreached, .cpu_exec_interrupt =3D hppa_cpu_exec_interrupt, .cpu_exec_halt =3D hppa_cpu_has_work, .cpu_exec_reset =3D cpu_reset, diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index b35f18e250..4f561e8c91 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -296,6 +296,7 @@ static const TCGCPUOps superh_tcg_ops =3D { =20 #ifndef CONFIG_USER_ONLY .tlb_fill =3D superh_cpu_tlb_fill, + .pointer_wrap =3D cpu_pointer_wrap_notreached, .cpu_exec_interrupt =3D superh_cpu_exec_interrupt, .cpu_exec_halt =3D superh_cpu_has_work, .cpu_exec_reset =3D cpu_reset, --=20 2.43.0