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Thu, 01 May 2025 20:05:31 -0700 (PDT) From: Nicholas Piggin To: qemu-devel@nongnu.org Cc: Nicholas Piggin , Akihiko Odaki , Fabiano Rosas , Harsh Prateek Bora , John Snow , Laurent Vivier , Paolo Bonzini , "Michael S . Tsirkin" , Marcel Apfelbaum , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 06/11] tests/qtest/ahci: don't unmap pci bar if it wasn't mapped Date: Fri, 2 May 2025 13:04:40 +1000 Message-ID: <20250502030446.88310-7-npiggin@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250502030446.88310-1-npiggin@gmail.com> References: <20250502030446.88310-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=npiggin@gmail.com; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1746155230959124100 Content-Type: text/plain; charset="utf-8" ahci-test has a bunch of tests where the pci bar was not mapped. Avoid unmapping it in these cases, to keep iomaps balanced. Cc: Michael S. Tsirkin Cc: Marcel Apfelbaum Cc: Akihiko Odaki Cc: Fabiano Rosas Signed-off-by: Nicholas Piggin --- tests/qtest/libqos/ahci.h | 1 + tests/qtest/ahci-test.c | 7 ++++++- tests/qtest/libqos/ahci.c | 9 +++++++++ 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/tests/qtest/libqos/ahci.h b/tests/qtest/libqos/ahci.h index f610bd32a5f..d639692aac4 100644 --- a/tests/qtest/libqos/ahci.h +++ b/tests/qtest/libqos/ahci.h @@ -342,6 +342,7 @@ typedef struct AHCIQState { uint32_t cap; uint32_t cap2; AHCIPortQState port[32]; + bool pci_enabled; bool enabled; } AHCIQState; =20 diff --git a/tests/qtest/ahci-test.c b/tests/qtest/ahci-test.c index 36caa7b2999..7d5f73ac40b 100644 --- a/tests/qtest/ahci-test.c +++ b/tests/qtest/ahci-test.c @@ -85,6 +85,8 @@ static void verify_state(AHCIQState *ahci, uint64_t hba_o= ld) uint64_t hba_base; AHCICommandHeader cmd; =20 + g_assert_cmphex(ahci->hba_bar.addr, =3D=3D, hba_old); + ahci_fingerprint =3D qpci_config_readl(ahci->dev, PCI_VENDOR_ID); g_assert_cmphex(ahci_fingerprint, =3D=3D, ahci->fingerprint); =20 @@ -198,7 +200,9 @@ static void ahci_shutdown(AHCIQState *ahci) { QOSState *qs =3D ahci->parent; =20 - ahci_pci_disable(ahci); + if (ahci->pci_enabled) { + ahci_pci_disable(ahci); + } ahci_clean_mem(ahci); free_ahci_device(ahci->dev); g_free(ahci); @@ -1421,6 +1425,7 @@ static void test_reset(void) ahci_set(ahci, AHCI_GHC, AHCI_GHC_HR); stop_ahci_device(ahci); ahci_clean_mem(ahci); + start_ahci_device(ahci); } =20 ahci_shutdown(ahci); diff --git a/tests/qtest/libqos/ahci.c b/tests/qtest/libqos/ahci.c index bd1994a9208..cc4f5b7b534 100644 --- a/tests/qtest/libqos/ahci.c +++ b/tests/qtest/libqos/ahci.c @@ -215,17 +215,25 @@ void ahci_pci_disable(AHCIQState *ahci) */ void start_ahci_device(AHCIQState *ahci) { + g_assert(!ahci->pci_enabled); + /* Map AHCI's ABAR (BAR5) */ ahci->hba_bar =3D qpci_iomap(ahci->dev, 5, &ahci->barsize); =20 /* turns on pci.cmd.iose, pci.cmd.mse and pci.cmd.bme */ qpci_device_enable(ahci->dev); + + ahci->pci_enabled =3D true; } =20 void stop_ahci_device(AHCIQState *ahci) { + g_assert(ahci->pci_enabled); + /* Unmap AHCI's ABAR */ qpci_iounmap(ahci->dev, ahci->hba_bar); + + ahci->pci_enabled =3D false; } =20 /** @@ -249,6 +257,7 @@ void ahci_hba_enable(AHCIQState *ahci) uint8_t num_cmd_slots; =20 g_assert(ahci !=3D NULL); + g_assert(ahci->pci_enabled); =20 /* Set GHC.AE to 1 */ ahci_set(ahci, AHCI_GHC, AHCI_GHC_AE); --=20 2.47.1