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Tsirkin" , Thomas Huth , Gerd Hoffmann , Kevin Wolf , Yi Liu Subject: [PATCH 17/18] hw/pci-bridge/gen_pcie_rp: Remove GenPCIERootPort::migrate_msix field Date: Thu, 1 May 2025 23:04:55 +0200 Message-ID: <20250501210456.89071-18-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250501210456.89071-1-philmd@linaro.org> References: <20250501210456.89071-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::d2d; envelope-from=philmd@linaro.org; helo=mail-io1-xd2d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1746133738957124100 The GenPCIERootPort::migrate_msix boolean was only set in the hw_compat_2_9[] array, via the 'x-migrate-msix=3Dfalse' property. We removed all machines using that array, lets remove that property and all the code around it. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Igor Mammedov --- hw/pci-bridge/gen_pcie_root_port.c | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_ro= ot_port.c index d9078e783bf..831d21225e9 100644 --- a/hw/pci-bridge/gen_pcie_root_port.c +++ b/hw/pci-bridge/gen_pcie_root_port.c @@ -35,8 +35,6 @@ struct GenPCIERootPort { PCIESlot parent_obj; /*< public >*/ =20 - bool migrate_msix; - /* additional resources to reserve */ PCIResReserve res_reserve; }; @@ -66,13 +64,6 @@ static void gen_rp_interrupts_uninit(PCIDevice *d) msix_uninit_exclusive_bar(d); } =20 -static bool gen_rp_test_migrate_msix(void *opaque, int version_id) -{ - GenPCIERootPort *rp =3D opaque; - - return rp->migrate_msix; -} - static void gen_rp_realize(DeviceState *dev, Error **errp) { PCIDevice *d =3D PCI_DEVICE(dev); @@ -121,16 +112,13 @@ static const VMStateDescription vmstate_rp_dev =3D { VMSTATE_PCI_DEVICE(parent_obj.parent_obj.parent_obj, PCIESlot), VMSTATE_STRUCT(parent_obj.parent_obj.parent_obj.exp.aer_log, PCIESlot, 0, vmstate_pcie_aer_log, PCIEAERLog), - VMSTATE_MSIX_TEST(parent_obj.parent_obj.parent_obj.parent_obj, - GenPCIERootPort, - gen_rp_test_migrate_msix), + VMSTATE_MSIX(parent_obj.parent_obj.parent_obj.parent_obj, + GenPCIERootPort), VMSTATE_END_OF_LIST() } }; =20 static const Property gen_rp_props[] =3D { - DEFINE_PROP_BOOL("x-migrate-msix", GenPCIERootPort, - migrate_msix, true), DEFINE_PROP_UINT32("bus-reserve", GenPCIERootPort, res_reserve.bus, -1), DEFINE_PROP_SIZE("io-reserve", GenPCIERootPort, --=20 2.47.1