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charset="utf-8" Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- hw/pci/pcie_port.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c index c73db30e98..072500ed34 100644 --- a/hw/pci/pcie_port.c +++ b/hw/pci/pcie_port.c @@ -188,7 +188,7 @@ int pcie_count_ds_ports(PCIBus *bus) return dsp_count; } =20 -static bool pcie_slot_is_hotpluggbale_bus(HotplugHandler *plug_handler, +static bool pcie_slot_is_hotpluggable_bus(HotplugHandler *plug_handler, BusState *bus) { PCIESlot *s =3D PCIE_SLOT(bus->parent); @@ -221,7 +221,7 @@ static void pcie_slot_class_init(ObjectClass *oc, void = *data) hc->plug =3D pcie_cap_slot_plug_cb; hc->unplug =3D pcie_cap_slot_unplug_cb; hc->unplug_request =3D pcie_cap_slot_unplug_request_cb; - hc->is_hotpluggable_bus =3D pcie_slot_is_hotpluggbale_bus; + hc->is_hotpluggable_bus =3D pcie_slot_is_hotpluggable_bus; } =20 static const TypeInfo pcie_slot_type_info =3D { --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- hw/acpi/generic_event_device.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c index c85d97ca37..7b2d582fff 100644 --- a/hw/acpi/generic_event_device.c +++ b/hw/acpi/generic_event_device.c @@ -458,11 +458,11 @@ static void acpi_ged_initfn(Object *obj) * container for memory hotplug IO and expose it as GED sysbus * MMIO so that boards can map it separately. */ - memory_region_init(&s->container_memhp, OBJECT(dev), "memhp container= ", - MEMORY_HOTPLUG_IO_LEN); - sysbus_init_mmio(sbd, &s->container_memhp); - acpi_memory_hotplug_init(&s->container_memhp, OBJECT(dev), - &s->memhp_state, 0); + memory_region_init(&s->container_memhp, OBJECT(dev), "memhp container", + MEMORY_HOTPLUG_IO_LEN); + sysbus_init_mmio(sbd, &s->container_memhp); + acpi_memory_hotplug_init(&s->container_memhp, OBJECT(dev), + &s->memhp_state, 0); =20 memory_region_init_io(&ged_st->regs, obj, &ged_regs_ops, ged_st, TYPE_ACPI_GED "-regs", ACPI_GED_REG_COUNT); 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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1745836016; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LeJXJwfY19odADe3uaP+XnIF7D9OuwkP8OljrGWEpNc=; b=W/+J/nBGJYqenULvV8n2OEI0ryyf1n68db59hWF/yoEEcZReyIW5ccHzYqM2/YvJx70Mo2 ViUXlMfWcKYdOjbgjH1vI0EGTj/FREXKr4vasiR5HRJRRGwoFzaLGlhNebtMipTI1/HqIf 6lVuv8UcVy2sM8lFAyeTbhfsZCXJdWw= X-MC-Unique: K1vl_8BNMwi369vXV6Llfg-1 X-Mimecast-MFC-AGG-ID: K1vl_8BNMwi369vXV6Llfg_1745836012 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 03/24] hw/i386/acpi-build: Fix build_append_notfication_callback typo Date: Mon, 28 Apr 2025 12:25:29 +0200 Message-ID: <20250428102628.378046-4-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Rename build_append_notfication_callback into build_append_notification_callback Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- hw/i386/acpi-build.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 3fffa4a332..85c8a8566b 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -589,8 +589,8 @@ void build_append_pci_bus_devices(Aml *parent_scope, PC= IBus *bus) } } =20 -static bool build_append_notfication_callback(Aml *parent_scope, - const PCIBus *bus) +static bool build_append_notification_callback(Aml *parent_scope, + const PCIBus *bus) { Aml *method; PCIBus *sec; @@ -604,7 +604,7 @@ static bool build_append_notfication_callback(Aml *pare= nt_scope, continue; } nr_notifiers =3D nr_notifiers + - build_append_notfication_callback(br_scope, sec); + build_append_notification_callback(br_scope, sec); /* * add new child scope to parent * and keep track of bus that have PCNT, @@ -1773,7 +1773,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, PCIBus *b =3D PCI_HOST_BRIDGE(pci_host)->bus; =20 scope =3D aml_scope("\\_SB.PCI0"); - has_pcnt =3D build_append_notfication_callback(scope, b); + has_pcnt =3D build_append_notification_callback(scope, b); if (has_pcnt) { aml_append(dsdt, scope); } --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1745836122; cv=none; d=zohomail.com; s=zohoarc; b=dez8/9uM5LA5te4H1BFRsrmOSKYzlxoOAhUnfJcbo7DRNbrjx+5JDfHyNLBdlM7WEvK753dftmQoeFrgAwAYAjLKpQB5gOHFhAZJXE1QmO90MdPziQE+CXHvc7iS+gJpSuJgN1vO8zVo48OPhYMu2ywVHfkqGYxgCkCAkA+f2hs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1745836122; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Mon, 28 Apr 2025 10:26:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1745836019; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BFhhKtuB/GLN0X0tr2Wjb3qJ1u13+DKgZlyOT3giFE4=; b=R+0WiTRMskL7PnUeoCAixKOU86VH040zLsispwP3Z73OCe3JEuGD3fHv9jnrrmxFK9xShH t8MO5tqrcYkHiR/7zY0M6NRPKO4Zl7JpEm3I4nHqfl34sDdVgl8eNKqsGoD21pren3qSPa 9J/PV4d3roeXB2lXiccgaW8oQ3Y18l4= X-MC-Unique: 9okCYOIxOOiLXrqWHhbq1Q-1 X-Mimecast-MFC-AGG-ID: 9okCYOIxOOiLXrqWHhbq1Q_1745836016 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 04/24] hw/i386/acpi-build: Make aml_pci_device_dsm() static Date: Mon, 28 Apr 2025 12:25:30 +0200 Message-ID: <20250428102628.378046-5-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" No need to export aml_pci_device_dsm() as it is only used in hw/i386/acpi-build.c. Signed-off-by: Eric Auger --- include/hw/acpi/pci.h | 1 - hw/i386/acpi-build.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h index 6359d574fd..ab0187a894 100644 --- a/include/hw/acpi/pci.h +++ b/include/hw/acpi/pci.h @@ -36,7 +36,6 @@ typedef struct AcpiMcfgInfo { =20 void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info, const char *oem_id, const char *oem_table_id); -Aml *aml_pci_device_dsm(void); =20 void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus); void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope); diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 85c8a8566b..864f6b5bf8 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -338,7 +338,7 @@ build_facs(GArray *table_data) g_array_append_vals(table_data, reserved, 40); /* Reserved */ } =20 -Aml *aml_pci_device_dsm(void) +static Aml *aml_pci_device_dsm(void) { Aml *method; =20 --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1745836024; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BrvU1a+/lgBDVJMnsrimhj8vyVWNdbQwh6DwgyIEH8g=; b=Ifl0PdEukRngxkwST2dmNV3YMnG82D3LNFGA8o+RFh9kDn3fvz0K3Bxt0bROlEtq6bqaie oT2Th1QndRBzkl7G8Xqy26B/oeC24HkMm9n1Q56Fzow4K8GrxIAYRfb6A29fViF3KPH+rE DA3E9O6JToh88i4bo2+fX/FwIiDmlX4= X-MC-Unique: tZdXAa3YOe6yNnHduPxsTg-1 X-Mimecast-MFC-AGG-ID: tZdXAa3YOe6yNnHduPxsTg_1745836020 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 05/24] hw/arm/virt: Introduce machine state acpi pcihp flags and props Date: Mon, 28 Apr 2025 12:25:31 +0200 Message-ID: <20250428102628.378046-6-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" acpi_pcihp VirtMachineClass state flag will allow to opt in for acpi pci hotplug. This is guarded by a class no_acpi_pcihp flag to manage compats (<=3D 10.0 machine types will not support ACPI PCI hotplug). Machine state acpi_pcihp flag msu be set before the creation of the GED device which will use it. Currently the ACPI PCI HP is turned off by default. This will change later on for 10.1 machine type. We also introduce properties to allow disabling it. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- include/hw/arm/virt.h | 2 ++ hw/arm/virt.c | 27 +++++++++++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index c8e94e6aed..1e9d002880 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -135,6 +135,7 @@ struct VirtMachineClass { bool no_tcg_lpa2; bool no_ns_el2_virt_timer_irq; bool no_nested_smmu; + bool no_acpi_pcihp; }; =20 struct VirtMachineState { @@ -156,6 +157,7 @@ struct VirtMachineState { bool mte; bool dtb_randomness; bool second_ns_uart_present; + bool acpi_pcihp; OnOffAuto acpi; VirtGICType gic_version; VirtIOMMUType iommu; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 3e72adaa91..1601750913 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2414,8 +2414,10 @@ static void machvirt_init(MachineState *machine) create_pcie(vms); =20 if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)= ) { + vms->acpi_pcihp &=3D !vmc->no_acpi_pcihp; vms->acpi_dev =3D create_acpi_ged(vms); } else { + vms->acpi_pcihp =3D false; create_gpio_devices(vms, VIRT_GPIO, sysmem); } =20 @@ -2610,6 +2612,20 @@ static void virt_set_its(Object *obj, bool value, Er= ror **errp) vms->its =3D value; } =20 +static bool virt_get_acpi_pcihp(Object *obj, Error **errp) +{ + VirtMachineState *vms =3D VIRT_MACHINE(obj); + + return vms->acpi_pcihp; +} + +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp) +{ + VirtMachineState *vms =3D VIRT_MACHINE(obj); + + vms->acpi_pcihp =3D value; +} + static bool virt_get_dtb_randomness(Object *obj, Error **errp) { VirtMachineState *vms =3D VIRT_MACHINE(obj); @@ -3327,6 +3343,10 @@ static void virt_machine_class_init(ObjectClass *oc,= void *data) "in ACPI table header." "The string may be up to 8 bytes= in size"); =20 + object_class_property_add_bool(oc, "acpi-pcihp", + virt_get_acpi_pcihp, virt_set_acpi_pcih= p); + object_class_property_set_description(oc, "acpi-pcihp", + "Force acpi pci hotplug"); } =20 static void virt_instance_init(Object *obj) @@ -3365,6 +3385,9 @@ static void virt_instance_init(Object *obj) } } =20 + /* default disallows ACPI PCI hotplug */ + vms->acpi_pcihp =3D false; + /* Default disallows iommu instantiation */ vms->iommu =3D VIRT_IOMMU_NONE; =20 @@ -3415,8 +3438,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1) =20 static void virt_machine_10_0_options(MachineClass *mc) { + VirtMachineClass *vmc =3D VIRT_MACHINE_CLASS(OBJECT_CLASS(mc)); + virt_machine_10_1_options(mc); compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len); + /* 10.0 and earlier do not support ACPI PCI hotplug */ + vmc->no_acpi_pcihp =3D true; } DEFINE_VIRT_MACHINE(10, 0) =20 --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1745836028; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qzXysjYmAT+FHWJ0f+3ioipnzBmnJLa47uug1NFi09w=; b=VXkeoQgffaQqu8Hj75fTKN7kKAMTfEHNB73rn8T+uY8/nzI00YNYUZoJ5EuTQFU/jbjS9I 1j+dWGLoC+Aw7B2xSaO/sQhvYVVh3FylCN6JVCzJWYZOwx1FMeaUKWX//iKh5H+Ce2H5FS PvmjAsFJ3Yyh0RAvvq+gWyG+QeZXNvo= X-MC-Unique: 59q-4c9lNYy-X3m_3eYODg-1 X-Mimecast-MFC-AGG-ID: 59q-4c9lNYy-X3m_3eYODg_1745836025 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 06/24] hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp Date: Mon, 28 Apr 2025 12:25:32 +0200 Message-ID: <20250428102628.378046-7-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" We plan to reuse build_x86_acpi_pci_hotplug() implementation for ARM so let's move the code to generic pcihp. Associated static aml_pci_pdsm() helper is also moved along. build_x86_acpi_pci_hotplug is renamed into build_acpi_pci_hotplug(). No code change intended. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- hw/i386/acpi-build.h | 4 - include/hw/acpi/pcihp.h | 6 ++ hw/acpi/pcihp.c | 174 +++++++++++++++++++++++++++++++++++++++- hw/i386/acpi-build.c | 150 +--------------------------------- 4 files changed, 181 insertions(+), 153 deletions(-) diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h index 0dce155c8c..8ba3c33e48 100644 --- a/hw/i386/acpi-build.h +++ b/hw/i386/acpi-build.h @@ -5,10 +5,6 @@ =20 extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio; =20 -/* PCI Hot-plug registers bases. See docs/spec/acpi_pci_hotplug.txt */ -#define ACPI_PCIHP_SEJ_BASE 0x8 -#define ACPI_PCIHP_BNMR_BASE 0x10 - void acpi_setup(void); Object *acpi_get_i386_pci_host(void); =20 diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index ac21a95913..2da0bc45c9 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -33,6 +33,10 @@ #define ACPI_PCIHP_IO_BASE_PROP "acpi-pcihp-io-base" #define ACPI_PCIHP_IO_LEN_PROP "acpi-pcihp-io-len" =20 +/* PCI Hot-plug registers bases. See docs/spec/acpi_pci_hotplug.txt */ +#define ACPI_PCIHP_SEJ_BASE 0x8 +#define ACPI_PCIHP_BNMR_BASE 0x10 + typedef struct AcpiPciHpPciStatus { uint32_t up; uint32_t down; @@ -69,6 +73,8 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *= hotplug_dev, AcpiPciHpState *s, DeviceState *d= ev, Error **errp); =20 +void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr); + /* Called on reset */ void acpi_pcihp_reset(AcpiPciHpState *s); =20 diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 5f79c9016b..35d8c0bfd2 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -26,7 +26,7 @@ =20 #include "qemu/osdep.h" #include "hw/acpi/pcihp.h" - +#include "hw/acpi/aml-build.h" #include "hw/pci-host/i440fx.h" #include "hw/pci/pci.h" #include "hw/pci/pci_bridge.h" @@ -513,6 +513,178 @@ void acpi_pcihp_init(Object *owner, AcpiPciHpState *s= , PCIBus *root_bus, OBJ_PROP_FLAG_READ); } =20 +static void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar) +{ + Aml *UUID, *ifctx1; + uint8_t byte_list[1] =3D { 0 }; /* nothing supported yet */ + + aml_append(ctx, aml_store(aml_buffer(1, byte_list), retvar)); + /* + * PCI Firmware Specification 3.1 + * 4.6. _DSM Definitions for PCI + */ + UUID =3D aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D"); + ifctx1 =3D aml_if(aml_lnot(aml_equal(aml_arg(0), UUID))); + { + /* call is for unsupported UUID, bail out */ + aml_append(ifctx1, aml_return(retvar)); + } + aml_append(ctx, ifctx1); + + ifctx1 =3D aml_if(aml_lless(aml_arg(1), aml_int(2))); + { + /* call is for unsupported REV, bail out */ + aml_append(ifctx1, aml_return(retvar)); + } + aml_append(ctx, ifctx1); +} + +static Aml *aml_pci_pdsm(void) +{ + Aml *method, *ifctx, *ifctx1; + Aml *ret =3D aml_local(0); + Aml *caps =3D aml_local(1); + Aml *acpi_index =3D aml_local(2); + Aml *zero =3D aml_int(0); + Aml *one =3D aml_int(1); + Aml *not_supp =3D aml_int(0xFFFFFFFF); + Aml *func =3D aml_arg(2); + Aml *params =3D aml_arg(4); + Aml *bnum =3D aml_derefof(aml_index(params, aml_int(0))); + Aml *sunum =3D aml_derefof(aml_index(params, aml_int(1))); + + method =3D aml_method("PDSM", 5, AML_SERIALIZED); + + /* get supported functions */ + ifctx =3D aml_if(aml_equal(func, zero)); + { + build_append_pci_dsm_func0_common(ifctx, ret); + + aml_append(ifctx, aml_store(zero, caps)); + aml_append(ifctx, + aml_store(aml_call2("AIDX", bnum, sunum), acpi_index)); + /* + * advertise function 7 if device has acpi-index + * acpi_index values: + * 0: not present (default value) + * FFFFFFFF: not supported (old QEMU without PIDX reg) + * other: device's acpi-index + */ + ifctx1 =3D aml_if(aml_lnot( + aml_or(aml_equal(acpi_index, zero), + aml_equal(acpi_index, not_supp), NULL) + )); + { + /* have supported functions */ + aml_append(ifctx1, aml_or(caps, one, caps)); + /* support for function 7 */ + aml_append(ifctx1, + aml_or(caps, aml_shiftleft(one, aml_int(7)), caps)); + } + aml_append(ifctx, ifctx1); + + aml_append(ifctx, aml_store(caps, aml_index(ret, zero))); + aml_append(ifctx, aml_return(ret)); + } + aml_append(method, ifctx); + + /* handle specific functions requests */ + /* + * PCI Firmware Specification 3.1 + * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under + * Operating Systems + */ + ifctx =3D aml_if(aml_equal(func, aml_int(7))); + { + Aml *pkg =3D aml_package(2); + + aml_append(ifctx, aml_store(aml_call2("AIDX", bnum, sunum), acpi_in= dex)); + aml_append(ifctx, aml_store(pkg, ret)); + /* + * Windows calls func=3D7 without checking if it's available, + * as workaround Microsoft has suggested to return invalid for func7 + * Package, so return 2 elements package but only initialize elemen= ts + * when acpi_index is supported and leave them uninitialized, which + * leads elements to being Uninitialized ObjectType and should trip + * Windows into discarding result as an unexpected and prevent sett= ing + * bogus 'PCI Label' on the device. + */ + ifctx1 =3D aml_if(aml_lnot(aml_lor( + aml_equal(acpi_index, zero), aml_equal(acpi_index, not= _supp) + ))); + { + aml_append(ifctx1, aml_store(acpi_index, aml_index(ret, zero))); + /* + * optional, if not impl. should return null string + */ + aml_append(ifctx1, aml_store(aml_string("%s", ""), + aml_index(ret, one))); + } + aml_append(ifctx, ifctx1); + + aml_append(ifctx, aml_return(ret)); + } + + aml_append(method, ifctx); + return method; +} + +void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr) +{ + Aml *scope; + Aml *field; + Aml *method; + + scope =3D aml_scope("_SB.PCI0"); + + aml_append(scope, + aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0= x08)); + field =3D aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZE= ROS); + aml_append(field, aml_named_field("PCIU", 32)); + aml_append(field, aml_named_field("PCID", 32)); + aml_append(scope, field); + + aml_append(scope, + aml_operation_region("SEJ", AML_SYSTEM_IO, + aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x= 04)); + field =3D aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZER= OS); + aml_append(field, aml_named_field("B0EJ", 32)); + aml_append(scope, field); + + aml_append(scope, + aml_operation_region("BNMR", AML_SYSTEM_IO, + aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0= x08)); + field =3D aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZE= ROS); + aml_append(field, aml_named_field("BNUM", 32)); + aml_append(field, aml_named_field("PIDX", 32)); + aml_append(scope, field); + + aml_append(scope, aml_mutex("BLCK", 0)); + + method =3D aml_method("PCEJ", 2, AML_NOTSERIALIZED); + aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF)); + aml_append(method, aml_store(aml_arg(0), aml_name("BNUM"))); + aml_append(method, + aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("B0EJ"))= ); + aml_append(method, aml_release(aml_name("BLCK"))); + aml_append(method, aml_return(aml_int(0))); + aml_append(scope, method); + + method =3D aml_method("AIDX", 2, AML_NOTSERIALIZED); + aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF)); + aml_append(method, aml_store(aml_arg(0), aml_name("BNUM"))); + aml_append(method, + aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("PIDX"))= ); + aml_append(method, aml_store(aml_name("PIDX"), aml_local(0))); + aml_append(method, aml_release(aml_name("BLCK"))); + aml_append(method, aml_return(aml_local(0))); + aml_append(scope, method); + + aml_append(scope, aml_pci_pdsm()); + + aml_append(table, scope); +} + const VMStateDescription vmstate_acpi_pcihp_pci_status =3D { .name =3D "acpi_pcihp_pci_status", .version_id =3D 1, diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 864f6b5bf8..2d1eea4a1a 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -647,96 +647,6 @@ static bool build_append_notification_callback(Aml *pa= rent_scope, return !!nr_notifiers; } =20 -static Aml *aml_pci_pdsm(void) -{ - Aml *method, *ifctx, *ifctx1; - Aml *ret =3D aml_local(0); - Aml *caps =3D aml_local(1); - Aml *acpi_index =3D aml_local(2); - Aml *zero =3D aml_int(0); - Aml *one =3D aml_int(1); - Aml *not_supp =3D aml_int(0xFFFFFFFF); - Aml *func =3D aml_arg(2); - Aml *params =3D aml_arg(4); - Aml *bnum =3D aml_derefof(aml_index(params, aml_int(0))); - Aml *sunum =3D aml_derefof(aml_index(params, aml_int(1))); - - method =3D aml_method("PDSM", 5, AML_SERIALIZED); - - /* get supported functions */ - ifctx =3D aml_if(aml_equal(func, zero)); - { - build_append_pci_dsm_func0_common(ifctx, ret); - - aml_append(ifctx, aml_store(zero, caps)); - aml_append(ifctx, - aml_store(aml_call2("AIDX", bnum, sunum), acpi_index)); - /* - * advertise function 7 if device has acpi-index - * acpi_index values: - * 0: not present (default value) - * FFFFFFFF: not supported (old QEMU without PIDX reg) - * other: device's acpi-index - */ - ifctx1 =3D aml_if(aml_lnot( - aml_or(aml_equal(acpi_index, zero), - aml_equal(acpi_index, not_supp), NULL) - )); - { - /* have supported functions */ - aml_append(ifctx1, aml_or(caps, one, caps)); - /* support for function 7 */ - aml_append(ifctx1, - aml_or(caps, aml_shiftleft(one, aml_int(7)), caps)); - } - aml_append(ifctx, ifctx1); - - aml_append(ifctx, aml_store(caps, aml_index(ret, zero))); - aml_append(ifctx, aml_return(ret)); - } - aml_append(method, ifctx); - - /* handle specific functions requests */ - /* - * PCI Firmware Specification 3.1 - * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under - * Operating Systems - */ - ifctx =3D aml_if(aml_equal(func, aml_int(7))); - { - Aml *pkg =3D aml_package(2); - - aml_append(ifctx, aml_store(aml_call2("AIDX", bnum, sunum), acpi_in= dex)); - aml_append(ifctx, aml_store(pkg, ret)); - /* - * Windows calls func=3D7 without checking if it's available, - * as workaround Microsoft has suggested to return invalid for func7 - * Package, so return 2 elements package but only initialize elemen= ts - * when acpi_index is supported and leave them uninitialized, which - * leads elements to being Uninitialized ObjectType and should trip - * Windows into discarding result as an unexpected and prevent sett= ing - * bogus 'PCI Label' on the device. - */ - ifctx1 =3D aml_if(aml_lnot(aml_lor( - aml_equal(acpi_index, zero), aml_equal(acpi_index, not= _supp) - ))); - { - aml_append(ifctx1, aml_store(acpi_index, aml_index(ret, zero))); - /* - * optional, if not impl. should return null string - */ - aml_append(ifctx1, aml_store(aml_string("%s", ""), - aml_index(ret, one))); - } - aml_append(ifctx, ifctx1); - - aml_append(ifctx, aml_return(ret)); - } - - aml_append(method, ifctx); - return method; -} - /* * build_prt - Define interrupt routing rules * @@ -1227,62 +1137,6 @@ static Aml *build_q35_dram_controller(const AcpiMcfg= Info *mcfg) return dev; } =20 -static void build_x86_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr) -{ - Aml *scope; - Aml *field; - Aml *method; - - scope =3D aml_scope("_SB.PCI0"); - - aml_append(scope, - aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0= x08)); - field =3D aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZE= ROS); - aml_append(field, aml_named_field("PCIU", 32)); - aml_append(field, aml_named_field("PCID", 32)); - aml_append(scope, field); - - aml_append(scope, - aml_operation_region("SEJ", AML_SYSTEM_IO, - aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x= 04)); - field =3D aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZER= OS); - aml_append(field, aml_named_field("B0EJ", 32)); - aml_append(scope, field); - - aml_append(scope, - aml_operation_region("BNMR", AML_SYSTEM_IO, - aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0= x08)); - field =3D aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZE= ROS); - aml_append(field, aml_named_field("BNUM", 32)); - aml_append(field, aml_named_field("PIDX", 32)); - aml_append(scope, field); - - aml_append(scope, aml_mutex("BLCK", 0)); - - method =3D aml_method("PCEJ", 2, AML_NOTSERIALIZED); - aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF)); - aml_append(method, aml_store(aml_arg(0), aml_name("BNUM"))); - aml_append(method, - aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("B0EJ"))= ); - aml_append(method, aml_release(aml_name("BLCK"))); - aml_append(method, aml_return(aml_int(0))); - aml_append(scope, method); - - method =3D aml_method("AIDX", 2, AML_NOTSERIALIZED); - aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF)); - aml_append(method, aml_store(aml_arg(0), aml_name("BNUM"))); - aml_append(method, - aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("PIDX"))= ); - aml_append(method, aml_store(aml_name("PIDX"), aml_local(0))); - aml_append(method, aml_release(aml_name("BLCK"))); - aml_append(method, aml_return(aml_local(0))); - aml_append(scope, method); - - aml_append(scope, aml_pci_pdsm()); - - aml_append(table, scope); -} - static Aml *build_q35_osc_method(bool enable_native_pcie_hotplug) { Aml *if_ctx; @@ -1394,7 +1248,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dsdt, sb_scope); =20 if (pm->pcihp_bridge_en || pm->pcihp_root_en) { - build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); + build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); } build_piix4_pci0_int(dsdt); } else if (q35) { @@ -1438,7 +1292,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dsdt, sb_scope); =20 if (pm->pcihp_bridge_en) { - build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); + build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); } build_q35_pci0_int(dsdt); } --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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b=R4JLdHd/lIkSvOzNTqeJzuzEdwEU78LkByUkSOVYzPw1F//4tU+YnnxcQW7AtzfL1lBhO5 3dg5iQLYzl6Og2hQe1V4UTjA+3MbE8J+0F8h5juuVA8oD6aicd+k/GIiR/wUwiq7YGwP1c zCINXfLH+Rh4FkHkGejKjmr5bZVnFr8= X-MC-Unique: FNyzShMVMdGhlGQS1BMBlA-1 X-Mimecast-MFC-AGG-ID: FNyzShMVMdGhlGQS1BMBlA_1745836029 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 07/24] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc Date: Mon, 28 Apr 2025 12:25:33 +0200 Message-ID: <20250428102628.378046-8-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Add a new argument to acpi_dsdt_add_pci_osc to be able to disable native pci hotplug. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- hw/pci-host/gpex-acpi.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c index e8b4c64c5f..4016089893 100644 --- a/hw/pci-host/gpex-acpi.c +++ b/hw/pci-host/gpex-acpi.c @@ -50,7 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint3= 2_t irq, } } =20 -static void acpi_dsdt_add_pci_osc(Aml *dev) +static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplu= g) { Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf; =20 @@ -80,8 +80,9 @@ static void acpi_dsdt_add_pci_osc(Aml *dev) * Allow OS control for all 5 features: * PCIeHotplug SHPCHotplug PME AER PCIeCapability. */ - aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1F), - aml_name("CTRL"))); + aml_append(ifctx, aml_and(aml_name("CTRL"), + aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), + aml_name("CTRL"))); =20 ifctx1 =3D aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1)))); aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08), @@ -192,7 +193,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *= cfg) if (is_cxl) { build_cxl_osc_method(dev); } else { - acpi_dsdt_add_pci_osc(dev); + acpi_dsdt_add_pci_osc(dev, true); } =20 aml_append(scope, dev); @@ -267,7 +268,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *= cfg) } aml_append(dev, aml_name_decl("_CRS", rbuf)); =20 - acpi_dsdt_add_pci_osc(dev); + acpi_dsdt_add_pci_osc(dev, true); =20 Aml *dev_res0 =3D aml_device("%s", "RES0"); aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02"))); --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1745836083; cv=none; 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Mon, 28 Apr 2025 10:27:14 +0000 (UTC) Received: from laptop.redhat.com (unknown [10.44.32.14]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 43D711800359; Mon, 28 Apr 2025 10:27:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1745836039; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=MK1FBnL9l6rNaxiGEG/Bnn7tSwy/sliDftuBgCzt8KE=; b=QTlJ250H61chIlxj8grga2p1/k04Tt96EGqZElhYQ0J6PBrmZrI78J1JY2916jPs+FqIFG x58VBh4iLHbH44Xa/wI9HIaM84knPeimXTVhENL+bgrvbe91r5YlXMsKmhSmVEPx9CynRQ olV5JB8TD+/mrtObfVpuWABx5OhEjtE= X-MC-Unique: eiLNcdcpPNKUh8Xz3e1PSw-1 X-Mimecast-MFC-AGG-ID: eiLNcdcpPNKUh8Xz3e1PSw_1745836034 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 08/24] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation Date: Mon, 28 Apr 2025 12:25:34 +0200 Message-ID: <20250428102628.378046-9-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" acpi_dsdt_add_pci_osc() name is confusing as it gives the impression it appends the _OSC method but in fact it also appends the _DSM method for the host bridge. Let's split the function into two separate ones and let them return the method Aml pointer instead. This matches the way it is done on x86 (build_q35_osc_method). In a subsequent patch we will replace the gpex method by the q35 implementation that will become shared between ARM and x86. acpi_dsdt_add_host_bridge_methods is a new top helper that generates both the _OSC and _DSM methods. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- hw/pci-host/gpex-acpi.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c index 4016089893..9d9f5ed7c6 100644 --- a/hw/pci-host/gpex-acpi.c +++ b/hw/pci-host/gpex-acpi.c @@ -50,13 +50,10 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uin= t32_t irq, } } =20 -static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplu= g) +static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug) { - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf; + Aml *method, *UUID, *ifctx, *ifctx1, *elsectx; =20 - /* Declare an _OSC (OS Control Handoff) method */ - aml_append(dev, aml_name_decl("SUPP", aml_int(0))); - aml_append(dev, aml_name_decl("CTRL", aml_int(0))); method =3D aml_method("_OSC", 4, AML_NOTSERIALIZED); aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1")); @@ -103,9 +100,13 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enabl= e_native_pcie_hotplug) aml_name("CDW1"))); aml_append(elsectx, aml_return(aml_arg(3))); aml_append(method, elsectx); - aml_append(dev, method); + return method; +} =20 - method =3D aml_method("_DSM", 4, AML_NOTSERIALIZED); +static Aml *build_host_bridge_dsm(void) +{ + Aml *method =3D aml_method("_DSM", 4, AML_NOTSERIALIZED); + Aml *UUID, *ifctx, *ifctx1, *buf; =20 /* PCI Firmware Specification 3.0 * 4.6.1. _DSM for PCI Express Slot Information @@ -124,7 +125,17 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enabl= e_native_pcie_hotplug) byte_list[0] =3D 0; buf =3D aml_buffer(1, byte_list); aml_append(method, aml_return(buf)); - aml_append(dev, method); + return method; +} + +static void acpi_dsdt_add_host_bridge_methods(Aml *dev, + bool enable_native_pcie_hotp= lug) +{ + aml_append(dev, aml_name_decl("SUPP", aml_int(0))); + aml_append(dev, aml_name_decl("CTRL", aml_int(0))); + /* Declare an _OSC (OS Control Handoff) method */ + aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug)); + aml_append(dev, build_host_bridge_dsm()); } =20 void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg) @@ -193,7 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *= cfg) if (is_cxl) { build_cxl_osc_method(dev); } else { - acpi_dsdt_add_pci_osc(dev, true); + acpi_dsdt_add_host_bridge_methods(dev, true); } =20 aml_append(scope, dev); @@ -268,7 +279,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *= cfg) } aml_append(dev, aml_name_decl("_CRS", rbuf)); =20 - acpi_dsdt_add_pci_osc(dev, true); + acpi_dsdt_add_host_bridge_methods(dev, true); =20 Aml *dev_res0 =3D aml_device("%s", "RES0"); aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02"))); --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; 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b=RdydleIQTQ4LhI42UalUqksnisQz4ei4SfKE0JDbfQIznz+df7iMZHl8nZHZUfEsXDgxLW uwqJZtZ5wbrAE2NL3LeNONcE0wog2vvQsKV34iH7qvGRYS2nkWw6Y2xppYkCPPj4iFUKBj 2zZtRikAaNRiMm7GIWFjqNuhhRtkiNo= X-MC-Unique: EoaRFVJBPQqJml87skGSSA-1 X-Mimecast-MFC-AGG-ID: EoaRFVJBPQqJml87skGSSA_1745836039 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 09/24] hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex Date: Mon, 28 Apr 2025 12:25:35 +0200 Message-ID: <20250428102628.378046-10-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Propagate the type of pci hotplug mode downto the gpex acpi code. In case machine acpi_pcihp is unset we configure pci native hotplug on pci0. For expander bridges we keep legacy pci native hotplug, as done on x86 q35. Signed-off-by: Eric Auger Reviewed-by: Gustavo Romero --- include/hw/pci-host/gpex.h | 1 + hw/arm/virt-acpi-build.c | 1 + hw/pci-host/gpex-acpi.c | 3 ++- 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h index 84471533af..feaf827474 100644 --- a/include/hw/pci-host/gpex.h +++ b/include/hw/pci-host/gpex.h @@ -45,6 +45,7 @@ struct GPEXConfig { MemMapEntry pio; int irq; PCIBus *bus; + bool pci_native_hotplug; }; =20 typedef struct GPEXIrq GPEXIrq; diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 3ac8f8e178..46c5a43d27 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -129,6 +129,7 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapE= ntry *memmap, .ecam =3D memmap[ecam_id], .irq =3D irq, .bus =3D vms->bus, + .pci_native_hotplug =3D !vms->acpi_pcihp, }; =20 if (vms->highmem_mmio) { diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c index 9d9f5ed7c6..9a521145bd 100644 --- a/hw/pci-host/gpex-acpi.c +++ b/hw/pci-host/gpex-acpi.c @@ -204,6 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *= cfg) if (is_cxl) { build_cxl_osc_method(dev); } else { + /* pxb bridges do not have ACPI PCI Hot-plug enabled */ acpi_dsdt_add_host_bridge_methods(dev, true); } =20 @@ -279,7 +280,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *= cfg) } aml_append(dev, aml_name_decl("_CRS", rbuf)); =20 - acpi_dsdt_add_host_bridge_methods(dev, true); + acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug); =20 Aml *dev_res0 =3D aml_device("%s", "RES0"); aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02"))); --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1745836116; cv=none; d=zohomail.com; s=zohoarc; b=Ulk1HQRN9wE+nEDbjSBqXnaLBER6VUfbXQJWCTnKNrdWpalumMdxQn+Wvf9gNmfD8YMhIjj5Yt/eqCEKWv4rEL+5ayPhNPj8U42t6y5XgN9t/pvpINChoPeIFWPmn3Es6f5u/EvGoMMC4mMaizH1FxTUozmiio8pP6h3raTGSa4= ARC-Message-Signature: i=1; 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charset="utf-8" GPEX acpi_dsdt_add_pci_osc() does basically the same as build_q35_osc_method(). Rename build_q35_osc_method() into build_pci_host_bridge_osc_method() and move it into hw/acpi/aml-build.c. In a subsequent patch we will use this later in place of acpi_dsdt_add_pci_osc(). Signed-off-by: Eric Auger --- include/hw/acpi/aml-build.h | 2 ++ hw/acpi/aml-build.c | 50 ++++++++++++++++++++++++++++++++++ hw/i386/acpi-build.c | 54 ++----------------------------------- 3 files changed, 54 insertions(+), 52 deletions(-) diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index c18f681342..177d60b414 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -508,4 +508,6 @@ void build_tpm2(GArray *table_data, BIOSLinker *linker,= GArray *tcpalog, void build_spcr(GArray *table_data, BIOSLinker *linker, const AcpiSpcrData *f, const uint8_t rev, const char *oem_id, const char *oem_table_id, const char *= name); + +Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug); #endif diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index f8f93a9f66..ba1dfe0b52 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -2614,3 +2614,53 @@ Aml *aml_i2c_serial_bus_device(uint16_t address, con= st char *resource_source) =20 return var; } + +Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug) +{ + Aml *if_ctx; + Aml *if_ctx2; + Aml *else_ctx; + Aml *method; + Aml *a_cwd1 =3D aml_name("CDW1"); + Aml *a_ctrl =3D aml_local(0); + + method =3D aml_method("_OSC", 4, AML_NOTSERIALIZED); + aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW= 1")); + + if_ctx =3D aml_if(aml_equal( + aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766"))); + aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(4), "CDW= 2")); + aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW= 3")); + + aml_append(if_ctx, aml_store(aml_name("CDW3"), a_ctrl)); + + /* + * Always allow native PME, AER (no dependencies) + * Allow SHPC (PCI bridges can have SHPC controller) + * Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled. + */ + aml_append(if_ctx, aml_and(a_ctrl, + aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), a_ctrl)); + + if_ctx2 =3D aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1)))); + /* Unknown revision */ + aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1)); + aml_append(if_ctx, if_ctx2); + + if_ctx2 =3D aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl))); + /* Capabilities bits were masked */ + aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1)); + aml_append(if_ctx, if_ctx2); + + /* Update DWORD3 in the buffer */ + aml_append(if_ctx, aml_store(a_ctrl, aml_name("CDW3"))); + aml_append(method, if_ctx); + + else_ctx =3D aml_else(); + /* Unrecognized UUID */ + aml_append(else_ctx, aml_or(a_cwd1, aml_int(4), a_cwd1)); + aml_append(method, else_ctx); + + aml_append(method, aml_return(aml_arg(3))); + return method; +} diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 2d1eea4a1a..a3065a94d1 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1137,56 +1137,6 @@ static Aml *build_q35_dram_controller(const AcpiMcfg= Info *mcfg) return dev; } =20 -static Aml *build_q35_osc_method(bool enable_native_pcie_hotplug) -{ - Aml *if_ctx; - Aml *if_ctx2; - Aml *else_ctx; - Aml *method; - Aml *a_cwd1 =3D aml_name("CDW1"); - Aml *a_ctrl =3D aml_local(0); - - method =3D aml_method("_OSC", 4, AML_NOTSERIALIZED); - aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW= 1")); - - if_ctx =3D aml_if(aml_equal( - aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766"))); - aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(4), "CDW= 2")); - aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW= 3")); - - aml_append(if_ctx, aml_store(aml_name("CDW3"), a_ctrl)); - - /* - * Always allow native PME, AER (no dependencies) - * Allow SHPC (PCI bridges can have SHPC controller) - * Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled. - */ - aml_append(if_ctx, aml_and(a_ctrl, - aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), a_ctrl)); - - if_ctx2 =3D aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1)))); - /* Unknown revision */ - aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1)); - aml_append(if_ctx, if_ctx2); - - if_ctx2 =3D aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl))); - /* Capabilities bits were masked */ - aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1)); - aml_append(if_ctx, if_ctx2); - - /* Update DWORD3 in the buffer */ - aml_append(if_ctx, aml_store(a_ctrl, aml_name("CDW3"))); - aml_append(method, if_ctx); - - else_ctx =3D aml_else(); - /* Unrecognized UUID */ - aml_append(else_ctx, aml_or(a_cwd1, aml_int(4), a_cwd1)); - aml_append(method, else_ctx); - - aml_append(method, aml_return(aml_arg(3))); - return method; -} - static void build_acpi0017(Aml *table) { Aml *dev, *scope, *method; @@ -1257,7 +1207,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08"))); aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03"))); aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid))= ); - aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en)); + aml_append(dev, build_pci_host_bridge_osc_method(!pm->pcihp_bridge= _en)); aml_append(dev, aml_pci_edsm()); aml_append(sb_scope, dev); if (mcfg_valid) { @@ -1379,7 +1329,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03"= ))); =20 /* Expander bridges do not have ACPI PCI Hot-plug enabled = */ - aml_append(dev, build_q35_osc_method(true)); + aml_append(dev, build_pci_host_bridge_osc_method(true)); } else { aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03"= ))); } --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1745836174; cv=none; d=zohomail.com; s=zohoarc; b=Nl7CuwYfTmG5BCLanf3ppH8vaKz0RqeInJQfilj/qiRG4fSHer7ySl2sjYMZWvXPjFdAFCH183254w8WrYTAaBELaZjErWAShR4LsOeQg+VtZA7n3Os/8QKJyxyLZu9dqI9bqB6XMZL+Z8Hzr3jbf4CArTq25jAnRzZur7Nola0= ARC-Message-Signature: i=1; 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Mon, 28 Apr 2025 10:27:27 +0000 (UTC) Received: from laptop.redhat.com (unknown [10.44.32.14]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 904C2180045C; Mon, 28 Apr 2025 10:27:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1745836050; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=et9vLF6W8uNvzMbPCh1lAvtabQZ0kQnLojFMnxt3eKE=; b=PZIb2hpSHRnvrNNW2Xh2zcp7k8J69+HWozOIZkxC9PqT4FBx8NCZu4I00yXoCcatWPk5vt RU8N0wP+r/52PIIGQEBgtuwHYV4t4af0rtiqRZG0mkROLUNOg8Pl2xY68ZpxSVwFyNlwrp ZoiIabkGuI8vfy/5zhXu376tv1tdFZ0= X-MC-Unique: c615VKElOOGHW72jHoWsyw-1 X-Mimecast-MFC-AGG-ID: c615VKElOOGHW72jHoWsyw_1745836047 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 11/24] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Date: Mon, 28 Apr 2025 12:25:37 +0200 Message-ID: <20250428102628.378046-12-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" gpex build_host_bridge_osc() and x86 originated build_pci_host_bridge_osc_method() are mostly identical. In GPEX, SUPP is set to CDW2 but is not further used. CTRL is same as Local0. So let gpex code reuse build_pci_host_bridge_osc_method() and remove build_host_bridge_osc(). Signed-off-by: Eric Auger --- The DSDT diff is given below: diff --git a/dsdt.dsl_before b/dsdt.dsl_after_osc_change index 3224a56..fa7558e 100644 --- a/dsdt.dsl_before +++ b/dsdt.dsl_after_osc_change @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of dsdt.dat, Mon Apr 7 05:33:06 2025 + * Disassembly of dsdt.dat, Mon Apr 7 05:37:20 2025 * * Original Table Header: * Signature "DSDT" - * Length 0x00001A4F (6735) + * Length 0x00001A35 (6709) * Revision 0x02 - * Checksum 0xBF + * Checksum 0xDD * OEM ID "BOCHS " * OEM Table ID "BXPC " * OEM Revision 0x00000001 (1) @@ -1849,27 +1849,26 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC = ", 0x00000001) { CreateDWordField (Arg3, 0x04, CDW2) CreateDWordField (Arg3, 0x08, CDW3) - SUPP =3D CDW2 /* \_SB_.PCI0._OSC.CDW2 */ - CTRL =3D CDW3 /* \_SB_.PCI0._OSC.CDW3 */ - CTRL &=3D 0x1F + Local0 =3D CDW3 /* \_SB_.PCI0._OSC.CDW3 */ + Local0 &=3D 0x1F If ((Arg1 !=3D One)) { CDW1 |=3D 0x08 } - If ((CDW3 !=3D CTRL)) + If ((CDW3 !=3D Local0)) { CDW1 |=3D 0x10 } - CDW3 =3D CTRL /* \_SB_.PCI0.CTRL */ - Return (Arg3) + CDW3 =3D Local0 } Else { CDW1 |=3D 0x04 - Return (Arg3) } + + Return (Arg3) } Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Meth= od --- hw/pci-host/gpex-acpi.c | 60 +++-------------------------------------- 1 file changed, 4 insertions(+), 56 deletions(-) diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c index 9a521145bd..9e93c1d07b 100644 --- a/hw/pci-host/gpex-acpi.c +++ b/hw/pci-host/gpex-acpi.c @@ -50,60 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint= 32_t irq, } } =20 -static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug) -{ - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx; - - method =3D aml_method("_OSC", 4, AML_NOTSERIALIZED); - aml_append(method, - aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1")); - - /* PCI Firmware Specification 3.0 - * 4.5.1. _OSC Interface for PCI Host Bridge Devices - * The _OSC interface for a PCI/PCI-X/PCI Express hierarchy is - * identified by the Universal Unique IDentifier (UUID) - * 33DB4D5B-1FF7-401C-9657-7441C03DD766 - */ - UUID =3D aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766"); - ifctx =3D aml_if(aml_equal(aml_arg(0), UUID)); - aml_append(ifctx, - aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2")); - aml_append(ifctx, - aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3")); - aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP"))); - aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL"))); - - /* - * Allow OS control for all 5 features: - * PCIeHotplug SHPCHotplug PME AER PCIeCapability. - */ - aml_append(ifctx, aml_and(aml_name("CTRL"), - aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), - aml_name("CTRL"))); - - ifctx1 =3D aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1)))); - aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08), - aml_name("CDW1"))); - aml_append(ifctx, ifctx1); - - ifctx1 =3D aml_if(aml_lnot(aml_equal(aml_name("CDW3"), aml_name("CTRL"= )))); - aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x10), - aml_name("CDW1"))); - aml_append(ifctx, ifctx1); - - aml_append(ifctx, aml_store(aml_name("CTRL"), aml_name("CDW3"))); - aml_append(ifctx, aml_return(aml_arg(3))); - aml_append(method, ifctx); - - elsectx =3D aml_else(); - aml_append(elsectx, aml_or(aml_name("CDW1"), aml_int(4), - aml_name("CDW1"))); - aml_append(elsectx, aml_return(aml_arg(3))); - aml_append(method, elsectx); - return method; -} - -static Aml *build_host_bridge_dsm(void) +static Aml *build_pci_host_bridge_dsm_method(void) { Aml *method =3D aml_method("_DSM", 4, AML_NOTSERIALIZED); Aml *UUID, *ifctx, *ifctx1, *buf; @@ -134,8 +81,9 @@ static void acpi_dsdt_add_host_bridge_methods(Aml *dev, aml_append(dev, aml_name_decl("SUPP", aml_int(0))); aml_append(dev, aml_name_decl("CTRL", aml_int(0))); /* Declare an _OSC (OS Control Handoff) method */ - aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug)); - aml_append(dev, build_host_bridge_dsm()); + aml_append(dev, + build_pci_host_bridge_osc_method(enable_native_pcie_hotplug= )); + aml_append(dev, build_pci_host_bridge_dsm_method()); } =20 void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg) --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1745836167; cv=none; d=zohomail.com; s=zohoarc; b=YSDvRSW+GpYj+Mba+dTmVhIqj90w/a7CMwjDiWpIVG0UXPSY96y+xRpVC2Nlu0BS5HRJIjn5adPvhtJ4yDCfW7jLYU0iAeK9VOYTPhHBeKXlyGWgkS/NuFM9O4gI3yiN8tNbp6Gmxqo8+s4jFk4L/V85Uh2T2thjA2XmkTv3ASA= ARC-Message-Signature: i=1; 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Mon, 28 Apr 2025 10:27:31 +0000 (UTC) Received: from laptop.redhat.com (unknown [10.44.32.14]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 2F5AF180045C; Mon, 28 Apr 2025 10:27:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1745836057; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=IWEcEo7tJZDk7sv1PSsr65GTVqALG8w8RfUI/yPTJ4I=; b=K1R/Xlg5KmlcSRHi8hORll06FFtRXmKB1bRau9jUyZF17Trj4XiSPweove9IRLZxUls6jS uSHPo1PW7dxZvThdH7y94pPfpqUJIis4UxWd0bUlHouHCSvKsOmLkQ9YkTx9Do7z9iG8xA mc19GqX48dnGoHrM1AuKQ0d44YlAkBc= X-MC-Unique: O2zQI23uNXW6lwBGDQMjDA-1 X-Mimecast-MFC-AGG-ID: O2zQI23uNXW6lwBGDQMjDA_1745836051 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 12/24] hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper Date: Mon, 28 Apr 2025 12:25:38 +0200 Message-ID: <20250428102628.378046-13-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Extract the code that reserves resources for ACPI PCI hotplug into a new helper named build_append_pcihp_resources() and move it to pcihp.c. We will reuse it on ARM. Signed-off-by: Eric Auger --- include/hw/acpi/pcihp.h | 2 ++ hw/acpi/pcihp.c | 20 ++++++++++++++++++++ hw/i386/acpi-build.c | 15 ++------------- 3 files changed, 24 insertions(+), 13 deletions(-) diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index 2da0bc45c9..819e815acd 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -74,6 +74,8 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *= hotplug_dev, Error **errp); =20 void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr); +void build_append_pcihp_resources(Aml *table, + uint64_t io_addr, uint64_t io_len); =20 /* Called on reset */ void acpi_pcihp_reset(AcpiPciHpState *s); diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 35d8c0bfd2..6f9cd45b5f 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -685,6 +685,26 @@ void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp= _addr) aml_append(table, scope); } =20 +/* Reserve PCIHP resources */ +void build_append_pcihp_resources(Aml *scope /* \\_SB.PCI0 */, + uint64_t io_addr, uint64_t io_len) +{ + Aml *dev, *crs; + + dev =3D aml_device("PHPR"); + aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06"))); + aml_append(dev, + aml_name_decl("_UID", aml_string("PCI Hotplug resources"))); + /* device present, functioning, decoding, not shown in UI */ + aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); + crs =3D aml_resource_template(); + aml_append(crs, + aml_io(AML_DECODE16, io_addr, io_addr, 1, io_len) + ); + aml_append(dev, aml_name_decl("_CRS", crs)); + aml_append(scope, dev); +} + const VMStateDescription vmstate_acpi_pcihp_pci_status =3D { .name =3D "acpi_pcihp_pci_status", .version_id =3D 1, diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index a3065a94d1..4934d939f4 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1458,19 +1458,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, =20 /* reserve PCIHP resources */ if (pm->pcihp_io_len && (pm->pcihp_bridge_en || pm->pcihp_root_en)) { - dev =3D aml_device("PHPR"); - aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06"))); - aml_append(dev, - aml_name_decl("_UID", aml_string("PCI Hotplug resources"))); - /* device present, functioning, decoding, not shown in UI */ - aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); - crs =3D aml_resource_template(); - aml_append(crs, - aml_io(AML_DECODE16, pm->pcihp_io_base, pm->pcihp_io_base, 1, - pm->pcihp_io_len) - ); - aml_append(dev, aml_name_decl("_CRS", crs)); - aml_append(scope, dev); + build_append_pcihp_resources(scope, + pm->pcihp_io_base, pm->pcihp_io_len); } aml_append(dsdt, scope); =20 --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1745836154; cv=none; d=zohomail.com; s=zohoarc; b=OufJ9hZo94hP2uT/42fFrsMCzNLhj3lnY980++1emyF4GAUUIm16uebzsaeHwY3Ph84N/An8x1oKc0PV6Io/F5r4mHSRRB3p3HbrUxpK+C7rvc1QnMQ/7HHcGBwf+ui6aPQTQ0VLICPJyA3xvLfZ5LqGEGgu6koZ9aDk9iwfhsw= ARC-Message-Signature: i=1; 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charset="utf-8" On ARM we will put the operation regions in AML_SYSTEM_MEMORY. So let's allow this configuration. Signed-off-by: Eric Auger --- include/hw/acpi/pcihp.h | 3 ++- hw/acpi/pcihp.c | 8 ++++---- hw/i386/acpi-build.c | 4 ++-- 3 files changed, 8 insertions(+), 7 deletions(-) diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index 819e815acd..ab20fe7788 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -28,6 +28,7 @@ #define HW_ACPI_PCIHP_H =20 #include "hw/acpi/acpi.h" +#include "hw/acpi/aml-build.h" #include "hw/hotplug.h" =20 #define ACPI_PCIHP_IO_BASE_PROP "acpi-pcihp-io-base" @@ -73,7 +74,7 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *= hotplug_dev, AcpiPciHpState *s, DeviceState *d= ev, Error **errp); =20 -void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr); +void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_= addr); void build_append_pcihp_resources(Aml *table, uint64_t io_addr, uint64_t io_len); =20 diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 6f9cd45b5f..3dcbc7683d 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -629,7 +629,7 @@ static Aml *aml_pci_pdsm(void) return method; } =20 -void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr) +void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_= addr) { Aml *scope; Aml *field; @@ -638,21 +638,21 @@ void build_acpi_pci_hotplug(Aml *table, uint64_t pcih= p_addr) scope =3D aml_scope("_SB.PCI0"); =20 aml_append(scope, - aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0= x08)); + aml_operation_region("PCST", rs, aml_int(pcihp_addr), 0x08)); field =3D aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZE= ROS); aml_append(field, aml_named_field("PCIU", 32)); aml_append(field, aml_named_field("PCID", 32)); aml_append(scope, field); =20 aml_append(scope, - aml_operation_region("SEJ", AML_SYSTEM_IO, + aml_operation_region("SEJ", rs, aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x= 04)); field =3D aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZER= OS); aml_append(field, aml_named_field("B0EJ", 32)); aml_append(scope, field); =20 aml_append(scope, - aml_operation_region("BNMR", AML_SYSTEM_IO, + aml_operation_region("BNMR", rs, aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0= x08)); field =3D aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZE= ROS); aml_append(field, aml_named_field("BNUM", 32)); diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 4934d939f4..0cf372f9cb 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1198,7 +1198,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dsdt, sb_scope); =20 if (pm->pcihp_bridge_en || pm->pcihp_root_en) { - build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_IO, pm->pcihp_io_base); } build_piix4_pci0_int(dsdt); } else if (q35) { @@ -1242,7 +1242,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dsdt, sb_scope); =20 if (pm->pcihp_bridge_en) { - build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_IO, pm->pcihp_io_base); } build_q35_pci0_int(dsdt); } --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; 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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1745836066; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mH9m3dJictPJ5DBFNmwBrDF1+fGM6ap6xYuk2wx6pcg=; b=YNY5UCgbKM4sm3/+UO0+KLb6vRxhjyVrMZKk3x57Z0brmpK4Q8XIRRmTqW6rOqtLQsu947 jwFTwlqjwU4XyTyItttO8m2Jxi4T65CP6/VIOf7i8tsK89wHG/UJYisMeJ3sWdxoGgYDFU PqTRCGelDwl5aAbAH7oYAY2ulHas7mA= X-MC-Unique: x__08lfgOH2A5fc7OZoM8g-1 X-Mimecast-MFC-AGG-ID: x__08lfgOH2A5fc7OZoM8g_1745836062 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 14/24] hw/i386/acpi-build: Move build_append_notification_callback to pcihp Date: Mon, 28 Apr 2025 12:25:40 +0200 Message-ID: <20250428102628.378046-15-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" We plan to reuse build_append_notification_callback() on ARM so let's move it to pcihp.c. No functional change intended. Signed-off-by: Eric Auger --- include/hw/acpi/pcihp.h | 1 + hw/acpi/pcihp.c | 58 +++++++++++++++++++++++++++++++++++++++++ hw/i386/acpi-build.c | 58 ----------------------------------------- 3 files changed, 59 insertions(+), 58 deletions(-) diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index ab20fe7788..082c4e38b0 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -77,6 +77,7 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *= hotplug_dev, void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_= addr); void build_append_pcihp_resources(Aml *table, uint64_t io_addr, uint64_t io_len); +bool build_append_notification_callback(Aml *parent_scope, const PCIBus *b= us); =20 /* Called on reset */ void acpi_pcihp_reset(AcpiPciHpState *s); diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 3dcbc7683d..e629528256 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -39,6 +39,7 @@ #include "migration/vmstate.h" #include "qapi/error.h" #include "qom/qom-qobject.h" +#include "qobject/qnum.h" #include "trace.h" =20 #define ACPI_PCIHP_SIZE 0x0018 @@ -705,6 +706,63 @@ void build_append_pcihp_resources(Aml *scope /* \\_SB.= PCI0 */, aml_append(scope, dev); } =20 +bool build_append_notification_callback(Aml *parent_scope, const PCIBus *b= us) +{ + Aml *method; + PCIBus *sec; + QObject *bsel; + int nr_notifiers =3D 0; + GQueue *pcnt_bus_list =3D g_queue_new(); + + QLIST_FOREACH(sec, &bus->child, sibling) { + Aml *br_scope =3D aml_scope("S%.02X", sec->parent_dev->devfn); + if (pci_bus_is_root(sec)) { + continue; + } + nr_notifiers =3D nr_notifiers + + build_append_notification_callback(br_scope, sec); + /* + * add new child scope to parent + * and keep track of bus that have PCNT, + * bus list is used later to call children PCNTs from this level P= CNT + */ + if (nr_notifiers) { + g_queue_push_tail(pcnt_bus_list, sec); + aml_append(parent_scope, br_scope); + } + } + + /* + * Append PCNT method to notify about events on local and child buses. + * ps: hostbridge might not have hotplug (bsel) enabled but might have + * child bridges that do have bsel. + */ + method =3D aml_method("PCNT", 0, AML_NOTSERIALIZED); + + /* If bus supports hotplug select it and notify about local events */ + bsel =3D object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL= , NULL); + if (bsel) { + uint64_t bsel_val =3D qnum_get_uint(qobject_to(QNum, bsel)); + + aml_append(method, aml_store(aml_int(bsel_val), aml_name("BNUM"))); + aml_append(method, aml_call2("DVNT", aml_name("PCIU"), + aml_int(1))); /* Device Check */ + aml_append(method, aml_call2("DVNT", aml_name("PCID"), + aml_int(3))); /* Eject Request */ + nr_notifiers++; + } + + /* Notify about child bus events in any case */ + while ((sec =3D g_queue_pop_head(pcnt_bus_list))) { + aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn= )); + } + + aml_append(parent_scope, method); + qobject_unref(bsel); + g_queue_free(pcnt_bus_list); + return !!nr_notifiers; +} + const VMStateDescription vmstate_acpi_pcihp_pci_status =3D { .name =3D "acpi_pcihp_pci_status", .version_id =3D 1, diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 0cf372f9cb..a91bfc500e 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -589,64 +589,6 @@ void build_append_pci_bus_devices(Aml *parent_scope, P= CIBus *bus) } } =20 -static bool build_append_notification_callback(Aml *parent_scope, - const PCIBus *bus) -{ - Aml *method; - PCIBus *sec; - QObject *bsel; - int nr_notifiers =3D 0; - GQueue *pcnt_bus_list =3D g_queue_new(); - - QLIST_FOREACH(sec, &bus->child, sibling) { - Aml *br_scope =3D aml_scope("S%.02X", sec->parent_dev->devfn); - if (pci_bus_is_root(sec)) { - continue; - } - nr_notifiers =3D nr_notifiers + - build_append_notification_callback(br_scope, sec); - /* - * add new child scope to parent - * and keep track of bus that have PCNT, - * bus list is used later to call children PCNTs from this level P= CNT - */ - if (nr_notifiers) { - g_queue_push_tail(pcnt_bus_list, sec); - aml_append(parent_scope, br_scope); - } - } - - /* - * Append PCNT method to notify about events on local and child buses. - * ps: hostbridge might not have hotplug (bsel) enabled but might have - * child bridges that do have bsel. - */ - method =3D aml_method("PCNT", 0, AML_NOTSERIALIZED); - - /* If bus supports hotplug select it and notify about local events */ - bsel =3D object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL= , NULL); - if (bsel) { - uint64_t bsel_val =3D qnum_get_uint(qobject_to(QNum, bsel)); - - aml_append(method, aml_store(aml_int(bsel_val), aml_name("BNUM"))); - aml_append(method, aml_call2("DVNT", aml_name("PCIU"), - aml_int(1))); /* Device Check */ - aml_append(method, aml_call2("DVNT", aml_name("PCID"), - aml_int(3))); /* Eject Request */ - nr_notifiers++; - } - - /* Notify about child bus events in any case */ - while ((sec =3D g_queue_pop_head(pcnt_bus_list))) { - aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn= )); - } - - aml_append(parent_scope, method); - qobject_unref(bsel); - g_queue_free(pcnt_bus_list); - return !!nr_notifiers; -} - /* * build_prt - Define interrupt routing rules * --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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b=J8gUEDaFjcBYsiMkVXG2CNxZk/f6xHiulpifibqt7YKGo90BCfTiQA/Zkrnx3VilC59MKu 7HTrV38pClxyOcsmlVcV/5KmO3Q8876DHa0cqbY6USlBu+Apbj3Y2LajizMBVWd5+arD5v pmKlKwcnQGft1KbjVc3U38GyZzNf6r0= X-MC-Unique: OWH97TU6PKC_86ufOXTEmQ-1 X-Mimecast-MFC-AGG-ID: OWH97TU6PKC_86ufOXTEmQ_1745836069 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 15/24] hw/i386/acpi-build: Move remaining pcihp generic functions to pcihp Date: Mon, 28 Apr 2025 12:25:41 +0200 Message-ID: <20250428102628.378046-16-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" We intend to reuse build_append_pci_bus_devices and build_append_pcihp_slots on ARM. So Let's move them to hw/acpi/pcihp.c as well as small static helpers they use. No functional change intended. Signed-off-by: Eric Auger --- include/hw/acpi/pci.h | 1 - include/hw/acpi/pcihp.h | 2 + hw/acpi/pcihp.c | 173 ++++++++++++++++++++++++++++++++++++++++ hw/i386/acpi-build.c | 172 --------------------------------------- 4 files changed, 175 insertions(+), 173 deletions(-) diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h index ab0187a894..4dca22c0e2 100644 --- a/include/hw/acpi/pci.h +++ b/include/hw/acpi/pci.h @@ -37,7 +37,6 @@ typedef struct AcpiMcfgInfo { void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info, const char *oem_id, const char *oem_table_id); =20 -void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus); void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope); =20 void build_srat_generic_affinity_structures(GArray *table_data); diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index 082c4e38b0..451ef74284 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -79,6 +79,8 @@ void build_append_pcihp_resources(Aml *table, uint64_t io_addr, uint64_t io_len); bool build_append_notification_callback(Aml *parent_scope, const PCIBus *b= us); =20 +void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus); + /* Called on reset */ void acpi_pcihp_reset(AcpiPciHpState *s); =20 diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index e629528256..49da95e0dd 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -27,6 +27,7 @@ #include "qemu/osdep.h" #include "hw/acpi/pcihp.h" #include "hw/acpi/aml-build.h" +#include "hw/acpi/acpi_aml_interface.h" #include "hw/pci-host/i440fx.h" #include "hw/pci/pci.h" #include "hw/pci/pci_bridge.h" @@ -763,6 +764,178 @@ bool build_append_notification_callback(Aml *parent_s= cope, const PCIBus *bus) return !!nr_notifiers; } =20 +static void build_append_pcihp_notify_entry(Aml *method, int slot) +{ + Aml *if_ctx; + int32_t devfn =3D PCI_DEVFN(slot, 0); + + if_ctx =3D aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL)); + aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1))); + aml_append(method, if_ctx); +} + +static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus) +{ + const PCIDevice *pdev =3D bus->devices[devfn]; + + if (PCI_FUNC(devfn)) { + if (IS_PCI_BRIDGE(pdev)) { + /* + * Ignore only hotplugged PCI bridges on !0 functions, but + * allow describing cold plugged bridges on all functions + */ + if (DEVICE(pdev)->hotplugged) { + return true; + } + } + } + return false; +} + +static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus) +{ + PCIDevice *pdev =3D bus->devices[devfn]; + if (pdev) { + return is_devfn_ignored_generic(devfn, bus) || + !DEVICE_GET_CLASS(pdev)->hotpluggable || + /* Cold plugged bridges aren't themselves hot-pluggable */ + (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged); + } else { /* non populated slots */ + /* + * hotplug is supported only for non-multifunction device + * so generate device description only for function 0 + */ + if (PCI_FUNC(devfn) || + (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) { + return true; + } + } + return false; +} + +static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev) +{ + Aml *method; + + g_assert(pdev->acpi_index !=3D 0); + method =3D aml_method("_DSM", 4, AML_SERIALIZED); + { + Aml *params =3D aml_local(0); + Aml *pkg =3D aml_package(1); + aml_append(pkg, aml_int(pdev->acpi_index)); + aml_append(method, aml_store(pkg, params)); + aml_append(method, + aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1), + aml_arg(2), aml_arg(3), params)) + ); + } + return method; +} + +static Aml *aml_pci_device_dsm(void) +{ + Aml *method; + + method =3D aml_method("_DSM", 4, AML_SERIALIZED); + { + Aml *params =3D aml_local(0); + Aml *pkg =3D aml_package(2); + aml_append(pkg, aml_int(0)); + aml_append(pkg, aml_int(0)); + aml_append(method, aml_store(pkg, params)); + aml_append(method, + aml_store(aml_name("BSEL"), aml_index(params, aml_int(0)))); + aml_append(method, + aml_store(aml_name("ASUN"), aml_index(params, aml_int(1)))); + aml_append(method, + aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1), + aml_arg(2), aml_arg(3), params)) + ); + } + return method; +} + +void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus) +{ + int devfn; + Aml *dev, *notify_method =3D NULL, *method; + QObject *bsel =3D object_property_get_qobject(OBJECT(bus), + ACPI_PCIHP_PROP_BSEL, NULL); + uint64_t bsel_val =3D qnum_get_uint(qobject_to(QNum, bsel)); + qobject_unref(bsel); + + aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val))); + notify_method =3D aml_method("DVNT", 2, AML_NOTSERIALIZED); + + for (devfn =3D 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { + int slot =3D PCI_SLOT(devfn); + int adr =3D slot << 16 | PCI_FUNC(devfn); + + if (is_devfn_ignored_hotplug(devfn, bus)) { + continue; + } + + if (bus->devices[devfn]) { + dev =3D aml_scope("S%.02X", devfn); + } else { + dev =3D aml_device("S%.02X", devfn); + aml_append(dev, aml_name_decl("_ADR", aml_int(adr))); + } + + /* + * Can't declare _SUN here for every device as it changes 'slot' + * enumeration order in linux kernel, so use another variable for = it + */ + aml_append(dev, aml_name_decl("ASUN", aml_int(slot))); + aml_append(dev, aml_pci_device_dsm()); + + aml_append(dev, aml_name_decl("_SUN", aml_int(slot))); + /* add _EJ0 to make slot hotpluggable */ + method =3D aml_method("_EJ0", 1, AML_NOTSERIALIZED); + aml_append(method, + aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN")) + ); + aml_append(dev, method); + + build_append_pcihp_notify_entry(notify_method, slot); + + /* device descriptor has been composed, add it into parent context= */ + aml_append(parent_scope, dev); + } + aml_append(parent_scope, notify_method); +} + +void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus) +{ + int devfn; + Aml *dev; + + for (devfn =3D 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { + /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */ + int adr =3D PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn); + PCIDevice *pdev =3D bus->devices[devfn]; + + if (!pdev || is_devfn_ignored_generic(devfn, bus)) { + continue; + } + + /* start to compose PCI device descriptor */ + dev =3D aml_device("S%.02X", devfn); + aml_append(dev, aml_name_decl("_ADR", aml_int(adr))); + + call_dev_aml_func(DEVICE(bus->devices[devfn]), dev); + /* add _DSM if device has acpi-index set */ + if (pdev->acpi_index && + !object_property_get_bool(OBJECT(pdev), "hotpluggable", + &error_abort)) { + aml_append(dev, aml_pci_static_endpoint_dsm(pdev)); + } + + /* device descriptor has been composed, add it into parent context= */ + aml_append(parent_scope, dev); + } +} + const VMStateDescription vmstate_acpi_pcihp_pci_status =3D { .name =3D "acpi_pcihp_pci_status", .version_id =3D 1, diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index a91bfc500e..3198d956b6 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -338,29 +338,6 @@ build_facs(GArray *table_data) g_array_append_vals(table_data, reserved, 40); /* Reserved */ } =20 -static Aml *aml_pci_device_dsm(void) -{ - Aml *method; - - method =3D aml_method("_DSM", 4, AML_SERIALIZED); - { - Aml *params =3D aml_local(0); - Aml *pkg =3D aml_package(2); - aml_append(pkg, aml_int(0)); - aml_append(pkg, aml_int(0)); - aml_append(method, aml_store(pkg, params)); - aml_append(method, - aml_store(aml_name("BSEL"), aml_index(params, aml_int(0)))); - aml_append(method, - aml_store(aml_name("ASUN"), aml_index(params, aml_int(1)))); - aml_append(method, - aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1), - aml_arg(2), aml_arg(3), params)) - ); - } - return method; -} - static void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar) { Aml *UUID, *ifctx1; @@ -440,155 +417,6 @@ static Aml *aml_pci_edsm(void) return method; } =20 -static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev) -{ - Aml *method; - - g_assert(pdev->acpi_index !=3D 0); - method =3D aml_method("_DSM", 4, AML_SERIALIZED); - { - Aml *params =3D aml_local(0); - Aml *pkg =3D aml_package(1); - aml_append(pkg, aml_int(pdev->acpi_index)); - aml_append(method, aml_store(pkg, params)); - aml_append(method, - aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1), - aml_arg(2), aml_arg(3), params)) - ); - } - return method; -} - -static void build_append_pcihp_notify_entry(Aml *method, int slot) -{ - Aml *if_ctx; - int32_t devfn =3D PCI_DEVFN(slot, 0); - - if_ctx =3D aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL)); - aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1))); - aml_append(method, if_ctx); -} - -static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus) -{ - const PCIDevice *pdev =3D bus->devices[devfn]; - - if (PCI_FUNC(devfn)) { - if (IS_PCI_BRIDGE(pdev)) { - /* - * Ignore only hotplugged PCI bridges on !0 functions, but - * allow describing cold plugged bridges on all functions - */ - if (DEVICE(pdev)->hotplugged) { - return true; - } - } - } - return false; -} - -static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus) -{ - PCIDevice *pdev =3D bus->devices[devfn]; - if (pdev) { - return is_devfn_ignored_generic(devfn, bus) || - !DEVICE_GET_CLASS(pdev)->hotpluggable || - /* Cold plugged bridges aren't themselves hot-pluggable */ - (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged); - } else { /* non populated slots */ - /* - * hotplug is supported only for non-multifunction device - * so generate device description only for function 0 - */ - if (PCI_FUNC(devfn) || - (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) { - return true; - } - } - return false; -} - -void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus) -{ - int devfn; - Aml *dev, *notify_method =3D NULL, *method; - QObject *bsel =3D object_property_get_qobject(OBJECT(bus), - ACPI_PCIHP_PROP_BSEL, NULL); - uint64_t bsel_val =3D qnum_get_uint(qobject_to(QNum, bsel)); - qobject_unref(bsel); - - aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val))); - notify_method =3D aml_method("DVNT", 2, AML_NOTSERIALIZED); - - for (devfn =3D 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { - int slot =3D PCI_SLOT(devfn); - int adr =3D slot << 16 | PCI_FUNC(devfn); - - if (is_devfn_ignored_hotplug(devfn, bus)) { - continue; - } - - if (bus->devices[devfn]) { - dev =3D aml_scope("S%.02X", devfn); - } else { - dev =3D aml_device("S%.02X", devfn); - aml_append(dev, aml_name_decl("_ADR", aml_int(adr))); - } - - /* - * Can't declare _SUN here for every device as it changes 'slot' - * enumeration order in linux kernel, so use another variable for = it - */ - aml_append(dev, aml_name_decl("ASUN", aml_int(slot))); - aml_append(dev, aml_pci_device_dsm()); - - aml_append(dev, aml_name_decl("_SUN", aml_int(slot))); - /* add _EJ0 to make slot hotpluggable */ - method =3D aml_method("_EJ0", 1, AML_NOTSERIALIZED); - aml_append(method, - aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN")) - ); - aml_append(dev, method); - - build_append_pcihp_notify_entry(notify_method, slot); - - /* device descriptor has been composed, add it into parent context= */ - aml_append(parent_scope, dev); - } - aml_append(parent_scope, notify_method); -} - -void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus) -{ - int devfn; - Aml *dev; - - for (devfn =3D 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { - /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */ - int adr =3D PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn); - PCIDevice *pdev =3D bus->devices[devfn]; - - if (!pdev || is_devfn_ignored_generic(devfn, bus)) { - continue; - } - - /* start to compose PCI device descriptor */ - dev =3D aml_device("S%.02X", devfn); - aml_append(dev, aml_name_decl("_ADR", aml_int(adr))); - - call_dev_aml_func(DEVICE(bus->devices[devfn]), dev); - /* add _DSM if device has acpi-index set */ - if (pdev->acpi_index && - !object_property_get_bool(OBJECT(pdev), "hotpluggable", - &error_abort)) { - aml_append(dev, aml_pci_static_endpoint_dsm(pdev)); - } - - /* device descriptor has been composed, add it into parent context= */ - aml_append(parent_scope, dev); - } -} - /* * build_prt - Define interrupt routing rules * --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; 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b=hN1DuUaFjK/kU1aNnUPtFlcyJzwTY/aKPHYHhsQpQdXZRVrHWGvLPHF1XR+ZccDwqQogva MyH/KzsJA9JYFhkUSzO0HLKE90Qi7T4iQwzkBEZVgM3ZGShVEUsE+evKN42wKomMdSNVoF ovJ9EcJDiPbV+oP8KuTN8AQQ3KzU/1k= X-MC-Unique: cSyUVGyQPEONAq5J5uEPBg-1 X-Mimecast-MFC-AGG-ID: cSyUVGyQPEONAq5J5uEPBg_1745836073 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 16/24] hw/i386/acpi-build: Introduce and use acpi_get_pci_host Date: Mon, 28 Apr 2025 12:25:42 +0200 Message-ID: <20250428102628.378046-17-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" pcihp acpi_set_pci_info() generic code currently uses acpi_get_i386_pci_host() to retrieve the pci host bridge. Let's rename acpi_get_i386_pci_host into acpi_get_pci_host and move it in pci generic code. The helper is augmented with the support of ARM GPEX. Signed-off-by: Eric Auger --- include/hw/acpi/pci.h | 2 ++ hw/acpi/pci.c | 20 ++++++++++++++++++++ hw/acpi/pcihp.c | 3 ++- hw/i386/acpi-build.c | 24 ++++-------------------- 4 files changed, 28 insertions(+), 21 deletions(-) diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h index 4dca22c0e2..310cbd02db 100644 --- a/include/hw/acpi/pci.h +++ b/include/hw/acpi/pci.h @@ -41,4 +41,6 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope); =20 void build_srat_generic_affinity_structures(GArray *table_data); =20 +Object *acpi_get_pci_host(void); + #endif diff --git a/hw/acpi/pci.c b/hw/acpi/pci.c index f88f450af3..0b07b77586 100644 --- a/hw/acpi/pci.c +++ b/hw/acpi/pci.c @@ -26,6 +26,7 @@ #include "qemu/osdep.h" #include "qemu/error-report.h" #include "qom/object_interfaces.h" +#include "qom/object.h" #include "qapi/error.h" #include "hw/boards.h" #include "hw/acpi/aml-build.h" @@ -33,6 +34,9 @@ #include "hw/pci/pci_bridge.h" #include "hw/pci/pci_device.h" #include "hw/pci/pcie_host.h" +#include "hw/pci-host/i440fx.h" +#include "hw/pci-host/q35.h" +#include "hw/pci-host/gpex.h" =20 /* * PCI Firmware Specification, Revision 3.0 @@ -301,3 +305,19 @@ void build_srat_generic_affinity_structures(GArray *ta= ble_data) object_child_foreach_recursive(object_get_root(), build_acpi_generic_p= ort, table_data); } + +Object *acpi_get_pci_host(void) +{ + Object *host; + + host =3D object_resolve_type_unambiguous(TYPE_I440FX_PCI_HOST_BRIDGE, = NULL); + if (host) { + return host; + } + host =3D object_resolve_type_unambiguous(TYPE_Q35_HOST_DEVICE, NULL); + if (host) { + return host; + } + host =3D object_resolve_type_unambiguous(TYPE_GPEX_HOST, NULL); + return host; +} diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 49da95e0dd..82b8ea2811 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -36,6 +36,7 @@ #include "hw/pci-bridge/xio3130_downstream.h" #include "hw/i386/acpi-build.h" #include "hw/acpi/acpi.h" +#include "hw/acpi/pci.h" #include "hw/pci/pci_bus.h" #include "migration/vmstate.h" #include "qapi/error.h" @@ -102,7 +103,7 @@ static void *acpi_set_bsel(PCIBus *bus, void *opaque) static void acpi_set_pci_info(bool has_bridge_hotplug) { static bool bsel_is_set; - Object *host =3D acpi_get_i386_pci_host(); + Object *host =3D acpi_get_pci_host(); PCIBus *bus; BSELInfo info =3D { .bsel_alloc =3D ACPI_PCIHP_BSEL_DEFAULT, .has_bridge_hotplug =3D has_bridge_hotplug }; diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 3198d956b6..f9122e56e8 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -269,27 +269,11 @@ static void acpi_get_misc_info(AcpiMiscInfo *info) #endif } =20 -/* - * Because of the PXB hosts we cannot simply query TYPE_PCI_HOST_BRIDGE. - * On i386 arch we only have two pci hosts, so we can look only for them. - */ -Object *acpi_get_i386_pci_host(void) -{ - PCIHostState *host; - - host =3D PCI_HOST_BRIDGE(object_resolve_path("/machine/i440fx", NULL)); - if (!host) { - host =3D PCI_HOST_BRIDGE(object_resolve_path("/machine/q35", NULL)= ); - } - - return OBJECT(host); -} - static void acpi_get_pci_holes(Range *hole, Range *hole64) { Object *pci_host; =20 - pci_host =3D acpi_get_i386_pci_host(); + pci_host =3D acpi_get_pci_host(); =20 if (!pci_host) { return; @@ -1271,7 +1255,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, =20 sb_scope =3D aml_scope("\\_SB"); { - Object *pci_host =3D acpi_get_i386_pci_host(); + Object *pci_host =3D acpi_get_pci_host(); =20 if (pci_host) { PCIBus *pbus =3D PCI_HOST_BRIDGE(pci_host)->bus; @@ -1332,7 +1316,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, if (pm->pcihp_bridge_en || pm->pcihp_root_en) { bool has_pcnt; =20 - Object *pci_host =3D acpi_get_i386_pci_host(); + Object *pci_host =3D acpi_get_pci_host(); PCIBus *b =3D PCI_HOST_BRIDGE(pci_host)->bus; =20 scope =3D aml_scope("\\_SB.PCI0"); @@ -1972,7 +1956,7 @@ static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg) Object *pci_host; QObject *o; =20 - pci_host =3D acpi_get_i386_pci_host(); + pci_host =3D acpi_get_pci_host(); if (!pci_host) { return false; } --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; 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b=CgV2yruDZiLiFL4nIbHW2aLZsIYzczHEQWJOun8KUVe7K/LuUzE7qvx6rLqYS6LppG+Qc3 lFtcavDF3FZbo6ON1xwG4Qz/wySr5j+oVkq368NP7Xa2wpAnwMGt902uZjpUl0xecZ0YHZ youhedCbYP2cTtOEARTEkxxOTmf1zyQ= X-MC-Unique: 0BQpCscRNNuaHNi_K9VeiQ-1 X-Mimecast-MFC-AGG-ID: 0BQpCscRNNuaHNi_K9VeiQ_1745836077 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 17/24] hw/arm/virt-acpi-build: Add DSDT additions for PCI hotplug Date: Mon, 28 Apr 2025 12:25:43 +0200 Message-ID: <20250428102628.378046-18-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Generate additional DSDT description for ACPI PCI hotplug support. Signed-off-by: Eric Auger --- include/hw/arm/virt.h | 1 + hw/arm/virt-acpi-build.c | 24 ++++++++++++++++++++++++ hw/arm/virt.c | 1 + hw/arm/Kconfig | 2 ++ 4 files changed, 28 insertions(+) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 1e9d002880..b8ca753644 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -79,6 +79,7 @@ enum { VIRT_ACPI_GED, VIRT_NVDIMM_ACPI, VIRT_PVTIME, + VIRT_ACPI_PCIHP, VIRT_LOWMEMMAP_LAST, }; =20 diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 46c5a43d27..7bee57d489 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -34,6 +34,7 @@ #include "hw/core/cpu.h" #include "hw/acpi/acpi-defs.h" #include "hw/acpi/acpi.h" +#include "hw/acpi/pcihp.h" #include "hw/nvram/fw_cfg_acpi.h" #include "hw/acpi/bios-linker-loader.h" #include "hw/acpi/aml-build.h" @@ -840,6 +841,29 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, Vir= tMachineState *vms) (irqmap[VIRT_MMIO] + ARM_SPI_BASE), 0, NUM_VIRTIO_TRANSPORTS); acpi_dsdt_add_pci(scope, memmap, irqmap[VIRT_PCIE] + ARM_SPI_BASE, vms= ); + + aml_append(dsdt, scope); + + if (vms->acpi_pcihp) { + Aml *pci0_scope =3D aml_scope("\\_SB.PCI0"); + + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_MEMORY, + memmap[VIRT_ACPI_PCIHP].base); + build_append_pcihp_resources(pci0_scope, + memmap[VIRT_ACPI_PCIHP].base, + memmap[VIRT_ACPI_PCIHP].size); + + /* Scan all PCI buses. Generate tables to support hotplug. */ + build_append_pci_bus_devices(pci0_scope, vms->bus); + if (object_property_find(OBJECT(vms->bus), ACPI_PCIHP_PROP_BSEL)) { + build_append_pcihp_slots(pci0_scope, vms->bus); + } + build_append_notification_callback(pci0_scope, vms->bus); + aml_append(dsdt, pci0_scope); + } + + scope =3D aml_scope("\\_SB"); + if (vms->acpi_dev) { build_ged_aml(scope, "\\_SB."GED_DEVICE, HOTPLUG_HANDLER(vms->acpi_dev), diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 1601750913..2790853927 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -183,6 +183,7 @@ static const MemMapEntry base_memmap[] =3D { [VIRT_NVDIMM_ACPI] =3D { 0x09090000, NVDIMM_ACPI_IO_LEN}, [VIRT_PVTIME] =3D { 0x090a0000, 0x00010000 }, [VIRT_SECURE_GPIO] =3D { 0x090b0000, 0x00001000 }, + [VIRT_ACPI_PCIHP] =3D { 0x090c0000, 0x00001000 }, [VIRT_MMIO] =3D { 0x0a000000, 0x00000200 }, /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that siz= e */ [VIRT_PLATFORM_BUS] =3D { 0x0c000000, 0x02000000 }, diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index a55b44d7bd..572b4dabd5 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -34,6 +34,8 @@ config ARM_VIRT select ACPI_HW_REDUCED select ACPI_APEI select ACPI_VIOT + select ACPI_PCIHP + select ACPI_PCI_BRIDGE select VIRTIO_MEM_SUPPORTED select ACPI_CXL select ACPI_HMAT --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1745836086; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yO+buW3K3khPUM2OJ7p1VBGn5V/Qm9rnQgtXPlTeGZs=; b=B5iMUrQ3sgDwA3ISBgf7+PvMSBPQVh7N3bwDnFvCIslKS8XfAHLwpbu65PdgLKzvbCfkr+ t/pC1bU8i0W7/aTdOr858WQT3WllLXitdjPErUgB7efl38svee6isWV3I7J/cjBZllFFaS OrTIMU/dLiMUc6HK+xya6UQ5qQoHAHI= X-MC-Unique: V7PRn19TMj28lMaCAbB6mw-1 X-Mimecast-MFC-AGG-ID: V7PRn19TMj28lMaCAbB6mw_1745836081 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 18/24] hw/acpi/ged: Prepare the device to react to PCI hotplug events Date: Mon, 28 Apr 2025 12:25:44 +0200 Message-ID: <20250428102628.378046-19-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" QEMU will notify the OS about PCI hotplug/hotunplug events through GED interrupts. Let the GED device handle a new PCI hotplug event. On its occurence it calls the \\_SB.PCI0.PCNT method with the BLCK mutex held. The GED device uses a dedicated MMIO region that will be mapped by the machine code. At this point the GED still does not support PCI device hotplug in its TYPE_HOTPLUG_HANDLER implementation. This will come in a subsequent patch Signed-off-by: Eric Auger --- include/hw/acpi/generic_event_device.h | 5 +++++ include/hw/acpi/pcihp.h | 2 ++ hw/acpi/generic_event_device.c | 14 ++++++++++++++ 3 files changed, 21 insertions(+) diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/gener= ic_event_device.h index d2dac87b4a..28be6c0582 100644 --- a/include/hw/acpi/generic_event_device.h +++ b/include/hw/acpi/generic_event_device.h @@ -63,6 +63,7 @@ #include "hw/acpi/memory_hotplug.h" #include "hw/acpi/ghes.h" #include "hw/acpi/cpu.h" +#include "hw/acpi/pcihp.h" #include "qom/object.h" =20 #define ACPI_POWER_BUTTON_DEVICE "PWRB" @@ -101,6 +102,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(AcpiGedState, ACPI_GED) #define ACPI_GED_PWR_DOWN_EVT 0x2 #define ACPI_GED_NVDIMM_HOTPLUG_EVT 0x4 #define ACPI_GED_CPU_HOTPLUG_EVT 0x8 +#define ACPI_GED_PCI_HOTPLUG_EVT 0x10 =20 typedef struct GEDState { MemoryRegion evt; @@ -114,6 +116,9 @@ struct AcpiGedState { MemoryRegion container_memhp; CPUHotplugState cpuhp_state; MemoryRegion container_cpuhp; + AcpiPciHpState pcihp_state; + MemoryRegion container_pcihp; + GEDState ged_state; uint32_t ged_event_bitmap; qemu_irq irq; diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index 451ef74284..abb6e14549 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -38,6 +38,8 @@ #define ACPI_PCIHP_SEJ_BASE 0x8 #define ACPI_PCIHP_BNMR_BASE 0x10 =20 +#define ACPI_PCI_HOTPLUG_REG_LEN 0x14 + typedef struct AcpiPciHpPciStatus { uint32_t up; uint32_t down; diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c index 7b2d582fff..0fd8baba97 100644 --- a/hw/acpi/generic_event_device.c +++ b/hw/acpi/generic_event_device.c @@ -26,6 +26,7 @@ static const uint32_t ged_supported_events[] =3D { ACPI_GED_PWR_DOWN_EVT, ACPI_GED_NVDIMM_HOTPLUG_EVT, ACPI_GED_CPU_HOTPLUG_EVT, + ACPI_GED_PCI_HOTPLUG_EVT, }; =20 /* @@ -121,6 +122,12 @@ void build_ged_aml(Aml *table, const char *name, Hotpl= ugHandler *hotplug_dev, aml_notify(aml_name("\\_SB.NVDR"), aml_int(0x80))); break; + case ACPI_GED_PCI_HOTPLUG_EVT: + aml_append(if_ctx, + aml_acquire(aml_name("\\_SB.PCI0.BLCK"), 0xFFFF= )); + aml_append(if_ctx, aml_call0("\\_SB.PCI0.PCNT")); + aml_append(if_ctx, aml_release(aml_name("\\_SB.PCI0.BLCK")= )); + break; default: /* * Please make sure all the events in ged_supported_events= [] @@ -299,6 +306,8 @@ static void acpi_ged_send_event(AcpiDeviceIf *adev, Acp= iEventStatusBits ev) sel =3D ACPI_GED_NVDIMM_HOTPLUG_EVT; } else if (ev & ACPI_CPU_HOTPLUG_STATUS) { sel =3D ACPI_GED_CPU_HOTPLUG_EVT; + } else if (ev & ACPI_PCI_HOTPLUG_STATUS) { + sel =3D ACPI_GED_PCI_HOTPLUG_EVT; } else { /* Unknown event. Return without generating interrupt. */ warn_report("GED: Unsupported event %d. No irq injected", ev); @@ -428,6 +437,11 @@ static void acpi_ged_realize(DeviceState *dev, Error *= *errp) cpu_hotplug_hw_init(&s->container_cpuhp, OBJECT(dev), &s->cpuhp_state, 0); break; + case ACPI_GED_PCI_HOTPLUG_EVT: + memory_region_init(&s->container_pcihp, OBJECT(dev), + "pcihp container", + ACPI_PCI_HOTPLUG_REG_LEN); + sysbus_init_mmio(sbd, &s->container_pcihp); } ged_events--; } --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1745836409; cv=none; d=zohomail.com; s=zohoarc; b=maRcEjb//JE41/t4M02e7Ff6h1O8li6jyDAJxa8/Uc//ZZTqAtgnGl27bIFkPH9OkWQe6F7gY0eAgnRuQa03Wd+cldHKZTcAGZCkw0xf3slODQQZ5FTPOkUpv88KeAmsWgVdAhsTMIZS0WiToCdwSIdl+26TymB8RuLShpemO4c= ARC-Message-Signature: i=1; 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charset="utf-8" Add PCI device related code in the TYPE_HOTPLUG_HANDLER implementation. For a PCI device hotplug/hotunplug event, the code routes to acpi_pcihp_device callbacks (pre_plug_cb, plug_cb, unplug_request_cb, unplug_cb). Signed-off-by: Eric Auger --- hw/acpi/generic_event_device.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c index 0fd8baba97..144c91ea4c 100644 --- a/hw/acpi/generic_event_device.c +++ b/hw/acpi/generic_event_device.c @@ -16,6 +16,7 @@ #include "hw/irq.h" #include "hw/mem/pc-dimm.h" #include "hw/mem/nvdimm.h" +#include "hw/pci/pci_device.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "qemu/error-report.h" @@ -234,6 +235,17 @@ static const MemoryRegionOps ged_regs_ops =3D { }, }; =20 +static void acpi_ged_device_pre_plug_cb(HotplugHandler *hotplug_dev, + DeviceState *dev, Error **errp) +{ + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + acpi_pcihp_device_pre_plug_cb(hotplug_dev, dev, errp); + } else { + error_setg(errp, "virt: device pre plug request for unsupported de= vice" + " type: %s", object_get_typename(OBJECT(dev))); + } +} + static void acpi_ged_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { @@ -247,6 +259,8 @@ static void acpi_ged_device_plug_cb(HotplugHandler *hot= plug_dev, } } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { acpi_cpu_plug_cb(hotplug_dev, &s->cpuhp_state, dev, errp); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + acpi_pcihp_device_plug_cb(hotplug_dev, &s->pcihp_state, dev, errp); } else { error_setg(errp, "virt: device plug request for unsupported device" " type: %s", object_get_typename(OBJECT(dev))); @@ -263,6 +277,9 @@ static void acpi_ged_unplug_request_cb(HotplugHandler *= hotplug_dev, acpi_memory_unplug_request_cb(hotplug_dev, &s->memhp_state, dev, e= rrp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { acpi_cpu_unplug_request_cb(hotplug_dev, &s->cpuhp_state, dev, errp= ); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + acpi_pcihp_device_unplug_request_cb(hotplug_dev, &s->pcihp_state, + dev, errp); } else { error_setg(errp, "acpi: device unplug request for unsupported devi= ce" " type: %s", object_get_typename(OBJECT(dev))); @@ -278,6 +295,8 @@ static void acpi_ged_unplug_cb(HotplugHandler *hotplug_= dev, acpi_memory_unplug_cb(&s->memhp_state, dev, errp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { acpi_cpu_unplug_cb(&s->cpuhp_state, dev, errp); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + acpi_pcihp_device_unplug_cb(hotplug_dev, &s->pcihp_state, dev, err= p); } else { error_setg(errp, "acpi: device unplug for unsupported device" " type: %s", object_get_typename(OBJECT(dev))); @@ -494,6 +513,7 @@ static void acpi_ged_class_init(ObjectClass *class, voi= d *data) dc->vmsd =3D &vmstate_acpi_ged; dc->realize =3D acpi_ged_realize; =20 + hc->pre_plug =3D acpi_ged_device_pre_plug_cb; hc->plug =3D acpi_ged_device_plug_cb; hc->unplug_request =3D acpi_ged_unplug_request_cb; hc->unplug =3D acpi_ged_unplug_cb; --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1745836283; cv=none; d=zohomail.com; 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charset="utf-8" Add a subsection to migrate the AcpiPciHpState state. Signed-off-by: Eric Auger --- hw/acpi/generic_event_device.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c index 144c91ea4c..a7438bf60a 100644 --- a/hw/acpi/generic_event_device.c +++ b/hw/acpi/generic_event_device.c @@ -414,6 +414,25 @@ static const VMStateDescription vmstate_ghes_state =3D= { } }; =20 +static bool pcihp_needed(void *opaque) +{ + AcpiGedState *s =3D opaque; + return s->pcihp_state.use_acpi_hotplug_bridge; +} + +static const VMStateDescription vmstate_pcihp_state =3D { + .name =3D "acpi-ged/pcihp", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D pcihp_needed, + .fields =3D (const VMStateField[]) { + VMSTATE_PCI_HOTPLUG(pcihp_state, + AcpiGedState, + NULL, NULL), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_acpi_ged =3D { .name =3D "acpi-ged", .version_id =3D 1, @@ -426,6 +445,7 @@ static const VMStateDescription vmstate_acpi_ged =3D { &vmstate_memhp_state, &vmstate_cpuhp_state, &vmstate_ghes_state, + &vmstate_pcihp_state, NULL } }; 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charset="utf-8" Some sysbus devices have conditionnal mmio regions. This happens for instance with the hw/acpi/ged device. In that case it becomes difficult to predict which index a specific MMIO region corresponds to when one needs to mmio map the region. Introduce a new helper that takes the name of the region instead of its index. If the region is not found this returns -1. Otherwise it maps the corresponding index and returns this latter. Signed-off-by: Eric Auger --- include/hw/sysbus.h | 1 + hw/core/sysbus.c | 11 +++++++++++ 2 files changed, 12 insertions(+) diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h index 7dc88aaa27..18fde8a7b4 100644 --- a/include/hw/sysbus.h +++ b/include/hw/sysbus.h @@ -82,6 +82,7 @@ void sysbus_connect_irq(SysBusDevice *dev, int n, qemu_ir= q irq); bool sysbus_is_irq_connected(SysBusDevice *dev, int n); qemu_irq sysbus_get_connected_irq(SysBusDevice *dev, int n); void sysbus_mmio_map(SysBusDevice *dev, int n, hwaddr addr); +int sysbus_mmio_map_name(SysBusDevice *dev, const char*name, hwaddr addr); void sysbus_mmio_map_overlap(SysBusDevice *dev, int n, hwaddr addr, int priority); =20 diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index 6eb4c0f15a..fe1abe589d 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -151,6 +151,17 @@ void sysbus_mmio_map(SysBusDevice *dev, int n, hwaddr = addr) sysbus_mmio_map_common(dev, n, addr, false, 0); } =20 +int sysbus_mmio_map_name(SysBusDevice *dev, const char *name, hwaddr addr) +{ + for (int i =3D 0; i < dev->num_mmio; i++) { + if (!strcmp(dev->mmio[i].memory->name, name)) { + sysbus_mmio_map(dev, i, addr); + return i; + } + } + return -1; +} + void sysbus_mmio_map_overlap(SysBusDevice *dev, int n, hwaddr addr, int priority) { --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1745836315; cv=none; d=zohomail.com; s=zohoarc; b=Phy5K+IcyU36rYCnOp8G7jr/2FgXgzQSnwVvtWK6WpSfLh63PzVikeDwCq1/OM1o7MzFMVfyLBec+VqKQSIZsAN6i7qZ33pEqoEwzX7X4h1I9EQDl+tce4nLd3tnYJNqo0VHzrm+8V5/kkEUiT/4z2BB2KBAOZeLs5v3bG7lElY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1745836315; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Mon, 28 Apr 2025 10:28:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1745836104; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oecAaZTuaAEeNI6Op2mn9gHfBukTJUjdImla9AWMhx0=; b=dOpn1+XolidEhmQk9asWTRx2bzBsvY/+p0y+9C5pnlyLltBFKcXR/3ctDxi/dncID2imB7 whCXXUhukpVWAzWDgPCioOsJVhtozdeTj43wN6MjUcq+ndLd09r+x27C/5nTbLpifK/oIH DW0o7PZjSmuAaDNFrPOpikthvVFAnZI= X-MC-Unique: jG8hEmhsMWKe7Vpv4T7xKA-1 X-Mimecast-MFC-AGG-ID: jG8hEmhsMWKe7Vpv4T7xKA_1745836100 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 22/24] hw/arm/virt: Let virt support pci hotplug/unplug GED event Date: Mon, 28 Apr 2025 12:25:48 +0200 Message-ID: <20250428102628.378046-23-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Set up the IO registers used to communicate between QEMU and ACPI. Move the create_pcie() call after the creation of the acpi ged device since pcie coldplug will soon require the acpi pcihp resources allocated and reset during the ged initialization. Signed-off-by: Eric Auger --- include/hw/arm/virt.h | 1 + hw/arm/virt-acpi-build.c | 1 + hw/arm/virt.c | 35 ++++++++++++++++++++++++++++++----- 3 files changed, 32 insertions(+), 5 deletions(-) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index b8ca753644..6a6a8be3ff 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -35,6 +35,7 @@ #include "hw/boards.h" #include "hw/arm/boot.h" #include "hw/arm/bsa.h" +#include "hw/acpi/pcihp.h" #include "hw/block/flash.h" #include "system/kvm.h" #include "hw/intc/arm_gicv3_common.h" diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 7bee57d489..fce3ab9417 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -44,6 +44,7 @@ #include "hw/acpi/generic_event_device.h" #include "hw/acpi/tpm.h" #include "hw/acpi/hmat.h" +#include "hw/acpi/pcihp.h" #include "hw/pci/pcie_host.h" #include "hw/pci/pci.h" #include "hw/pci/pci_bus.h" diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 2790853927..aaee5443bb 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -687,6 +687,8 @@ static inline DeviceState *create_acpi_ged(VirtMachineS= tate *vms) { DeviceState *dev; MachineState *ms =3D MACHINE(vms); + SysBusDevice *sbdev; + int irq =3D vms->irqmap[VIRT_ACPI_GED]; uint32_t event =3D ACPI_GED_PWR_DOWN_EVT; =20 @@ -698,12 +700,28 @@ static inline DeviceState *create_acpi_ged(VirtMachin= eState *vms) event |=3D ACPI_GED_NVDIMM_HOTPLUG_EVT; } =20 + if (vms->acpi_pcihp) { + event |=3D ACPI_GED_PCI_HOTPLUG_EVT; + } + dev =3D qdev_new(TYPE_ACPI_GED); qdev_prop_set_uint32(dev, "ged-event", event); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + sbdev =3D SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sbdev, &error_fatal); =20 - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].bas= e); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, vms->memmap[VIRT_PCDIMM_ACPI].= base); + sysbus_mmio_map(sbdev, 0, vms->memmap[VIRT_ACPI_GED].base); + sysbus_mmio_map(sbdev, 1, vms->memmap[VIRT_PCDIMM_ACPI].base); + if (vms->acpi_pcihp) { + AcpiGedState *acpi_ged_state =3D ACPI_GED(dev); + int i; + + i =3D sysbus_mmio_map_name(sbdev, "pcihp container", + vms->memmap[VIRT_ACPI_PCIHP].base); + assert(i >=3D 0); + acpi_pcihp_init(OBJECT(dev), &acpi_ged_state->pcihp_state, + vms->bus, sysbus_mmio_get_region(sbdev, i), 0); + acpi_ged_state->pcihp_state.use_acpi_hotplug_bridge =3D true; + } sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(vms->gic, = irq)); =20 return dev; @@ -1765,6 +1783,13 @@ void virt_machine_done(Notifier *notifier, void *dat= a) pci_bus_add_fw_cfg_extra_pci_roots(vms->fw_cfg, vms->bus, &error_abort); =20 + + if (vms->acpi_pcihp) { + AcpiGedState *acpi_ged_state =3D ACPI_GED(vms->acpi_dev); + + acpi_pcihp_reset(&acpi_ged_state->pcihp_state); + } + virt_acpi_setup(vms); virt_build_smbios(vms); } @@ -2412,8 +2437,6 @@ static void machvirt_init(MachineState *machine) =20 create_rtc(vms); =20 - create_pcie(vms); - if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)= ) { vms->acpi_pcihp &=3D !vmc->no_acpi_pcihp; vms->acpi_dev =3D create_acpi_ged(vms); @@ -2422,6 +2445,8 @@ static void machvirt_init(MachineState *machine) create_gpio_devices(vms, VIRT_GPIO, sysmem); } =20 + create_pcie(vms); + if (vms->secure && !vmc->no_secure_gpio) { create_gpio_devices(vms, VIRT_SECURE_GPIO, secure_sysmem); } --=20 2.49.0 From nobody Sat Nov 15 23:36:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1745836273; cv=none; d=zohomail.com; s=zohoarc; b=avSUHKVvd8XtBwOq1s3PFtTnkMRU9nnmVFVh6cE9OwxL7NHkrcgBTH90PneCGKKu8OPDTnZiijiqR9DT5Ql2kxN3VO6mwo4pEgEUvvPHd1+QpI0XTi7WSYZmhXqHyl8qIW+L5zVFoFCIqUsIjcEwv8pNCmWE17lV8O8Sdsj80co= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1745836273; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Mon, 28 Apr 2025 10:28:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1745836109; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gtNQ7F0kiq82fvtmnUNyrQYfPm+kMMu0y/wJ7IQvZQQ=; b=CumRBUAwOk82qytJqTmohXG+2xbyVR1/wUbCu+xhbMueqTIYKymeamfrkGdO4h/Y7SOoJa IZHwWRqqyOgTUUQ43dOkfxTHUaYyCSHVJDqG5X8RbRs3BMiuLoAU9c6YdadBvBSz9ceQFX /RNyfiL7QzYFz/PYCSs8Z6w9qGP74Zs= X-MC-Unique: HfbCicAyMveNLhHleg_a1A-1 X-Mimecast-MFC-AGG-ID: HfbCicAyMveNLhHleg_a1A_1745836105 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, imammedo@redhat.com, anisinha@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com Cc: pbonzini@redhat.com, Jonathan.Cameron@huawei.com Subject: [RFC 23/24] hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks Date: Mon, 28 Apr 2025 12:25:49 +0200 Message-ID: <20250428102628.378046-24-eric.auger@redhat.com> In-Reply-To: <20250428102628.378046-1-eric.auger@redhat.com> References: <20250428102628.378046-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Signed-off-by: Eric Auger --- hw/arm/virt.c | 37 ++++++++++++++++++++++++++++++++++++- 1 file changed, 36 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index aaee5443bb..5e6562e754 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -87,6 +87,7 @@ #include "hw/virtio/virtio-iommu.h" #include "hw/char/pl011.h" #include "qemu/guest-random.h" +#include "hw/acpi/pcihp.h" =20 static GlobalProperty arm_virt_compat[] =3D { { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "48" }, @@ -2983,6 +2984,11 @@ static void virt_machine_device_pre_plug_cb(HotplugH= andler *hotplug_dev, qlist_append_str(reserved_regions, resv_prop_str); qdev_prop_set_array(dev, "reserved-regions", reserved_regions); g_free(resv_prop_str); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + if (vms->acpi_pcihp) { + acpi_pcihp_device_pre_plug_cb(HOTPLUG_HANDLER(vms->acpi_dev), + dev, errp); + } } } =20 @@ -3012,6 +3018,14 @@ static void virt_machine_device_plug_cb(HotplugHandl= er *hotplug_dev, vms->iommu =3D VIRT_IOMMU_VIRTIO; vms->virtio_iommu_bdf =3D pci_get_bdf(pdev); create_virtio_iommu_dt_bindings(vms); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + AcpiGedState *acpi_ged_state =3D ACPI_GED(vms->acpi_dev); + AcpiPciHpState *acpi_pci_hotplug =3D &acpi_ged_state->pcihp_state; + + if (vms->acpi_pcihp) { + acpi_pcihp_device_plug_cb(HOTPLUG_HANDLER(vms->acpi_dev), + acpi_pci_hotplug, dev, errp); + } } } =20 @@ -3061,6 +3075,15 @@ static void virt_machine_device_unplug_request_cb(Ho= tplugHandler *hotplug_dev, } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) { virtio_md_pci_unplug_request(VIRTIO_MD_PCI(dev), MACHINE(hotplug_d= ev), errp); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + VirtMachineState *vms =3D VIRT_MACHINE(hotplug_dev); + AcpiGedState *acpi_ged_state =3D ACPI_GED(vms->acpi_dev); + AcpiPciHpState *acpi_pci_hotplug =3D &acpi_ged_state->pcihp_state; + + if (vms->acpi_pcihp) { + acpi_pcihp_device_unplug_request_cb(HOTPLUG_HANDLER(vms->acpi_= dev), + acpi_pci_hotplug, dev, err= p); + } } else { error_setg(errp, "device unplug request for unsupported device" " type: %s", object_get_typename(OBJECT(dev))); @@ -3074,6 +3097,15 @@ static void virt_machine_device_unplug_cb(HotplugHan= dler *hotplug_dev, virt_dimm_unplug(hotplug_dev, dev, errp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) { virtio_md_pci_unplug(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev), err= p); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { + VirtMachineState *vms =3D VIRT_MACHINE(hotplug_dev); + AcpiGedState *acpi_ged_state =3D ACPI_GED(vms->acpi_dev); + AcpiPciHpState *acpi_pci_hotplug =3D &acpi_ged_state->pcihp_state; + + if (vms->acpi_pcihp) { + acpi_pcihp_device_unplug_cb(HOTPLUG_HANDLER(vms->acpi_dev), + acpi_pci_hotplug, dev, errp); + } } else { error_setg(errp, "virt: device unplug for unsupported device" " type: %s", object_get_typename(OBJECT(dev))); @@ -3084,11 +3116,14 @@ static HotplugHandler *virt_machine_get_hotplug_han= dler(MachineState *machine, DeviceState *dev) { MachineClass *mc =3D MACHINE_GET_CLASS(machine); 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charset="utf-8" Now all the enablers are there for ACPI PCI hotplug support, let's use it by default for 10.1 virt machine onwards. Signed-off-by: Eric Auger --- hw/arm/virt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 5e6562e754..ecdc1fcfbb 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -3446,8 +3446,8 @@ static void virt_instance_init(Object *obj) } } =20 - /* default disallows ACPI PCI hotplug */ - vms->acpi_pcihp =3D false; + /* default allows ACPI PCI hotplug */ + vms->acpi_pcihp =3D true; =20 /* Default disallows iommu instantiation */ vms->iommu =3D VIRT_IOMMU_NONE; --=20 2.49.0