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Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- include/qom/object.h | 2 +- hw/arm/armsse.c | 2 +- hw/block/m25p80.c | 2 +- hw/isa/vt82c686.c | 4 ++-- hw/net/e1000.c | 2 +- hw/ppc/spapr_cpu_core.c | 2 +- hw/scsi/megasas.c | 2 +- hw/sensor/tmp421.c | 2 +- hw/virtio/virtio-pci.c | 4 ++-- qom/object.c | 2 +- target/arm/cpu.c | 2 +- target/arm/cpu64.c | 2 +- target/mips/cpu.c | 2 +- target/s390x/cpu_models.c | 4 ++-- target/sparc/cpu.c | 2 +- target/xtensa/helper.c | 2 +- rust/qemu-api/src/qom.rs | 2 +- scripts/codeconverter/codeconverter/test_regexps.py | 2 +- 18 files changed, 21 insertions(+), 21 deletions(-) diff --git a/include/qom/object.h b/include/qom/object.h index 2fb86f00a68..42b75d10a43 100644 --- a/include/qom/object.h +++ b/include/qom/object.h @@ -488,7 +488,7 @@ struct TypeInfo =20 void (*class_init)(ObjectClass *klass, const void *data); void (*class_base_init)(ObjectClass *klass, const void *data); - void *class_data; + const void *class_data; =20 InterfaceInfo *interfaces; }; diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index d65a46b8d8d..9403b65ddb5 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -1730,7 +1730,7 @@ static void armsse_register_types(void) .name =3D armsse_variants[i].name, .parent =3D TYPE_ARM_SSE, .class_init =3D armsse_class_init, - .class_data =3D (void *)&armsse_variants[i], + .class_data =3D &armsse_variants[i], }; type_register_static(&ti); } diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index 75b9d712518..a5336d92ff9 100644 --- a/hw/block/m25p80.c +++ b/hw/block/m25p80.c @@ -1893,7 +1893,7 @@ static void m25p80_register_types(void) .name =3D known_devices[i].part_name, .parent =3D TYPE_M25P80, .class_init =3D m25p80_class_init, - .class_data =3D (void *)&known_devices[i], + .class_data =3D &known_devices[i], }; type_register_static(&ti); } diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 80366aaf647..c62afc907b2 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -259,7 +259,7 @@ static const TypeInfo vt82c686b_pm_info =3D { .name =3D TYPE_VT82C686B_PM, .parent =3D TYPE_VIA_PM, .class_init =3D via_pm_class_init, - .class_data =3D (void *)&vt82c686b_pm_init_info, + .class_data =3D &vt82c686b_pm_init_info, }; =20 static const ViaPMInitInfo vt8231_pm_init_info =3D { @@ -272,7 +272,7 @@ static const TypeInfo vt8231_pm_info =3D { .name =3D TYPE_VT8231_PM, .parent =3D TYPE_VIA_PM, .class_init =3D via_pm_class_init, - .class_data =3D (void *)&vt8231_pm_init_info, + .class_data =3D &vt8231_pm_init_info, }; =20 =20 diff --git a/hw/net/e1000.c b/hw/net/e1000.c index d49730f4ad4..13814e84d18 100644 --- a/hw/net/e1000.c +++ b/hw/net/e1000.c @@ -1770,7 +1770,7 @@ static void e1000_register_types(void) =20 type_info.name =3D info->name; type_info.parent =3D TYPE_E1000_BASE; - type_info.class_data =3D (void *)info; + type_info.class_data =3D info; type_info.class_init =3D e1000_class_init; =20 type_register_static(&type_info); diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index b4b926d759a..4952f9bd2cf 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -388,7 +388,7 @@ static void spapr_cpu_core_class_init(ObjectClass *oc, = const void *data) #define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \ { \ .parent =3D TYPE_SPAPR_CPU_CORE, \ - .class_data =3D (void *) POWERPC_CPU_TYPE_NAME(cpu_model), \ + .class_data =3D POWERPC_CPU_TYPE_NAME(cpu_model), \ .class_init =3D spapr_cpu_core_class_init, \ .name =3D SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \ } diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index cfa5516b96c..6104d4202aa 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -2573,7 +2573,7 @@ static void megasas_register_types(void) =20 type_info.name =3D info->name; type_info.parent =3D TYPE_MEGASAS_BASE; - type_info.class_data =3D (void *)info; + type_info.class_data =3D info; type_info.class_init =3D megasas_class_init; type_info.interfaces =3D info->interfaces; =20 diff --git a/hw/sensor/tmp421.c b/hw/sensor/tmp421.c index 263bfa1bbda..3421c440869 100644 --- a/hw/sensor/tmp421.c +++ b/hw/sensor/tmp421.c @@ -382,7 +382,7 @@ static void tmp421_register_types(void) .name =3D devices[i].name, .parent =3D TYPE_TMP421, .class_init =3D tmp421_class_init, - .class_data =3D (void *) &devices[i], + .class_data =3D &devices[i], }; type_register_static(&ti); } diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index c0fd3db0630..95bf7ddd972 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -2497,13 +2497,13 @@ void virtio_pci_types_register(const VirtioPCIDevic= eTypeInfo *t) =20 generic_type_info.parent =3D base_name; generic_type_info.class_init =3D virtio_pci_base_class_init; - generic_type_info.class_data =3D (void *)t; + generic_type_info.class_data =3D t; =20 assert(!t->non_transitional_name); assert(!t->transitional_name); } else { base_type_info.class_init =3D virtio_pci_base_class_init; - base_type_info.class_data =3D (void *)t; + base_type_info.class_data =3D t; } =20 type_register_static(&base_type_info); diff --git a/qom/object.c b/qom/object.c index 06d7367032e..425ee2f0ee8 100644 --- a/qom/object.c +++ b/qom/object.c @@ -57,7 +57,7 @@ struct TypeImpl void (*class_init)(ObjectClass *klass, const void *data); void (*class_base_init)(ObjectClass *klass, const void *data); =20 - void *class_data; + const void *class_data; =20 void (*instance_init)(Object *obj); void (*instance_post_init)(Object *obj); diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 4120f05892a..92669532d74 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2752,7 +2752,7 @@ void arm_cpu_register(const ARMCPUInfo *info) .parent =3D TYPE_ARM_CPU, .instance_init =3D arm_cpu_instance_init, .class_init =3D info->class_init ?: cpu_register_class_init, - .class_data =3D (void *)info, + .class_data =3D info, }; =20 type_info.name =3D g_strdup_printf("%s-" TYPE_ARM_CPU, info->name); diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 1184c92b4c0..eaf5705cdc2 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -855,7 +855,7 @@ void aarch64_cpu_register(const ARMCPUInfo *info) .parent =3D TYPE_AARCH64_CPU, .instance_init =3D aarch64_cpu_instance_init, .class_init =3D info->class_init ?: cpu_register_class_init, - .class_data =3D (void *)info, + .class_data =3D info, }; =20 type_info.name =3D g_strdup_printf("%s-" TYPE_ARM_CPU, info->name); diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 4fe845305ce..1d157a7cec3 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -621,7 +621,7 @@ static void mips_register_cpudef_type(const struct mips= _def_t *def) .name =3D typename, .parent =3D TYPE_MIPS_CPU, .class_init =3D mips_cpu_cpudef_class_init, - .class_data =3D (void *)def, + .class_data =3D def, }; =20 type_register_static(&ti); diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index 972a99236f0..4afef45c72f 100644 --- a/target/s390x/cpu_models.c +++ b/target/s390x/cpu_models.c @@ -1073,7 +1073,7 @@ static void register_types(void) .instance_init =3D s390_cpu_model_initfn, .instance_finalize =3D s390_cpu_model_finalize, .class_init =3D s390_base_cpu_model_class_init, - .class_data =3D (void *) &s390_cpu_defs[i], + .class_data =3D &s390_cpu_defs[i], }; char *name =3D s390_cpu_type_name(s390_cpu_defs[i].name); TypeInfo ti =3D { @@ -1082,7 +1082,7 @@ static void register_types(void) .instance_init =3D s390_cpu_model_initfn, .instance_finalize =3D s390_cpu_model_finalize, .class_init =3D s390_cpu_model_class_init, - .class_data =3D (void *) &s390_cpu_defs[i], + .class_data =3D &s390_cpu_defs[i], }; =20 type_register_static(&ti_base); diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index a2da455e2ca..024b93ef482 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -1078,7 +1078,7 @@ static void sparc_register_cpudef_type(const struct s= parc_def_t *def) .name =3D typename, .parent =3D TYPE_SPARC_CPU, .class_init =3D sparc_cpu_cpudef_class_init, - .class_data =3D (void *)def, + .class_data =3D def, }; =20 type_register_static(&ti); diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c index 649a2e0f913..8f4e12d5c44 100644 --- a/target/xtensa/helper.c +++ b/target/xtensa/helper.c @@ -191,7 +191,7 @@ void xtensa_register_core(XtensaConfigList *node) TypeInfo type =3D { .parent =3D TYPE_XTENSA_CPU, .class_init =3D xtensa_core_class_init, - .class_data =3D (void *)node->config, + .class_data =3D node->config, }; =20 xtensa_finalize_config(node->config); diff --git a/rust/qemu-api/src/qom.rs b/rust/qemu-api/src/qom.rs index f385cb72753..f0a79f96d5e 100644 --- a/rust/qemu-api/src/qom.rs +++ b/rust/qemu-api/src/qom.rs @@ -513,7 +513,7 @@ pub trait ObjectImpl: ObjectType + IsA { class_size: core::mem::size_of::(), class_init: Some(rust_class_init::), class_base_init: Self::CLASS_BASE_INIT, - class_data: core::ptr::null_mut(), + class_data: core::ptr::null(), interfaces: core::ptr::null_mut(), }; =20 diff --git a/scripts/codeconverter/codeconverter/test_regexps.py b/scripts/= codeconverter/codeconverter/test_regexps.py index 72113927960..08857c5008d 100644 --- a/scripts/codeconverter/codeconverter/test_regexps.py +++ b/scripts/codeconverter/codeconverter/test_regexps.py @@ -70,7 +70,7 @@ def fullmatch(regexp, s): .name =3D armsse_variants[i].name, .parent =3D TYPE_ARMSSE, .class_init =3D armsse_class_init, - .class_data =3D (void *)&armsse_variants[i], + .class_data =3D &armsse_variants[i], };''', re.MULTILINE) =20 print(RE_ARRAY_ITEM) --=20 2.47.1