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At the same time, use int instead of unsigned long for flags, to match page_set_flags(). Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20250424011918.599958-13-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/user/page-protection.h | 5 ++--- accel/tcg/user-exec.c | 10 +++++----- linux-user/elfload.c | 19 +++++++++---------- linux-user/syscall.c | 8 ++++---- 4 files changed, 20 insertions(+), 22 deletions(-) diff --git a/include/user/page-protection.h b/include/user/page-protection.h index 1de72e31e68..8f0b769b134 100644 --- a/include/user/page-protection.h +++ b/include/user/page-protection.h @@ -14,6 +14,7 @@ =20 #include "cpu-param.h" #include "exec/target_long.h" +#include "exec/vaddr.h" #include "exec/translation-block.h" =20 int page_unprotect(CPUState *cpu, tb_page_addr_t address, uintptr_t pc); @@ -88,9 +89,7 @@ target_ulong page_find_range_empty(target_ulong min, targ= et_ulong max, __attribute__((returns_nonnull)) void *page_get_target_data(target_ulong address); =20 -typedef int (*walk_memory_regions_fn)(void *, target_ulong, - target_ulong, unsigned long); - +typedef int (*walk_memory_regions_fn)(void *, vaddr, vaddr, int); int walk_memory_regions(void *, walk_memory_regions_fn); =20 void page_dump(FILE *f); diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 17e3be337f5..25d86567e70 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -199,13 +199,13 @@ int walk_memory_regions(void *priv, walk_memory_regio= ns_fn fn) return rc; } =20 -static int dump_region(void *priv, target_ulong start, - target_ulong end, unsigned long prot) +static int dump_region(void *opaque, vaddr start, vaddr end, int prot) { - FILE *f =3D (FILE *)priv; + FILE *f =3D opaque; =20 - fprintf(f, TARGET_FMT_lx"-"TARGET_FMT_lx" "TARGET_FMT_lx" %c%c%c\n", - start, end, end - start, + fprintf(f, TARGET_ABI_FMT_ptr "-" TARGET_ABI_FMT_ptr + " " TARGET_ABI_FMT_ptr " %c%c%c\n", + (abi_ptr)start, (abi_ptr)end, (abi_ptr)(end - start), ((prot & PAGE_READ) ? 'r' : '-'), ((prot & PAGE_WRITE) ? 'w' : '-'), ((prot & PAGE_EXEC) ? 'x' : '-')); diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 7519b6bcda3..e281745e485 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -4044,8 +4044,7 @@ static inline void bswap_note(struct elf_note *en) { } /* * Calculate file (dump) size of given memory region. */ -static size_t vma_dump_size(target_ulong start, target_ulong end, - unsigned long flags) +static size_t vma_dump_size(vaddr start, vaddr end, int flags) { /* The area must be readable. */ if (!(flags & PAGE_READ)) { @@ -4238,8 +4237,8 @@ static int dump_write(int fd, const void *ptr, size_t= size) return (0); } =20 -static int wmr_page_unprotect_regions(void *opaque, target_ulong start, - target_ulong end, unsigned long flag= s) +static int wmr_page_unprotect_regions(void *opaque, vaddr start, + vaddr end, int flags) { if ((flags & (PAGE_WRITE | PAGE_WRITE_ORG)) =3D=3D PAGE_WRITE_ORG) { size_t step =3D MAX(TARGET_PAGE_SIZE, qemu_real_host_page_size()); @@ -4260,8 +4259,8 @@ typedef struct { size_t size; } CountAndSizeRegions; =20 -static int wmr_count_and_size_regions(void *opaque, target_ulong start, - target_ulong end, unsigned long flag= s) +static int wmr_count_and_size_regions(void *opaque, vaddr start, + vaddr end, int flags) { CountAndSizeRegions *css =3D opaque; =20 @@ -4275,8 +4274,8 @@ typedef struct { off_t offset; } FillRegionPhdr; =20 -static int wmr_fill_region_phdr(void *opaque, target_ulong start, - target_ulong end, unsigned long flags) +static int wmr_fill_region_phdr(void *opaque, vaddr start, + vaddr end, int flags) { FillRegionPhdr *d =3D opaque; struct elf_phdr *phdr =3D d->phdr; @@ -4298,8 +4297,8 @@ static int wmr_fill_region_phdr(void *opaque, target_= ulong start, return 0; } =20 -static int wmr_write_region(void *opaque, target_ulong start, - target_ulong end, unsigned long flags) +static int wmr_write_region(void *opaque, vaddr start, + vaddr end, int flags) { int fd =3D *(int *)opaque; size_t size =3D vma_dump_size(start, end, flags); diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 5826ac3adbb..23b901b7133 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -8135,8 +8135,8 @@ static void open_self_maps_4(const struct open_self_m= aps_data *d, * Callback for walk_memory_regions, when read_self_maps() fails. * Proceed without the benefit of host /proc/self/maps cross-check. */ -static int open_self_maps_3(void *opaque, target_ulong guest_start, - target_ulong guest_end, unsigned long flags) +static int open_self_maps_3(void *opaque, vaddr guest_start, + vaddr guest_end, int flags) { static const MapInfo mi =3D { .is_priv =3D true }; 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Thu, 24 Apr 2025 02:47:05 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: Pierrick Bouvier , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 02/13] accel/tcg: Use vaddr in user/page-protection.h Date: Thu, 24 Apr 2025 11:46:42 +0200 Message-ID: <20250424094653.35932-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250424094653.35932-1-philmd@linaro.org> References: <20250424094653.35932-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1745488072753019000 From: Richard Henderson Signed-off-by: Richard Henderson Message-ID: <20250424011918.599958-14-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/user/page-protection.h | 17 +++++------- accel/tcg/user-exec.c | 51 ++++++++++++++++------------------ 2 files changed, 31 insertions(+), 37 deletions(-) diff --git a/include/user/page-protection.h b/include/user/page-protection.h index 8f0b769b134..86143212fdd 100644 --- a/include/user/page-protection.h +++ b/include/user/page-protection.h @@ -12,14 +12,12 @@ #error Cannot include this header from system emulation #endif =20 -#include "cpu-param.h" -#include "exec/target_long.h" #include "exec/vaddr.h" #include "exec/translation-block.h" =20 int page_unprotect(CPUState *cpu, tb_page_addr_t address, uintptr_t pc); =20 -int page_get_flags(target_ulong address); +int page_get_flags(vaddr address); =20 /** * page_set_flags: @@ -32,9 +30,9 @@ int page_get_flags(target_ulong address); * The flag PAGE_WRITE_ORG is positioned automatically depending * on PAGE_WRITE. The mmap_lock should already be held. */ -void page_set_flags(target_ulong start, target_ulong last, int flags); +void page_set_flags(vaddr start, vaddr last, int flags); =20 -void page_reset_target_data(target_ulong start, target_ulong last); +void page_reset_target_data(vaddr start, vaddr last); =20 /** * page_check_range @@ -46,7 +44,7 @@ void page_reset_target_data(target_ulong start, target_ul= ong last); * Return false if any page is unmapped. Thus testing flags =3D=3D 0 is * equivalent to testing for flags =3D=3D PAGE_VALID. */ -bool page_check_range(target_ulong start, target_ulong last, int flags); +bool page_check_range(vaddr start, vaddr last, int flags); =20 /** * page_check_range_empty: @@ -58,7 +56,7 @@ bool page_check_range(target_ulong start, target_ulong la= st, int flags); * The memory lock must be held so that the caller will can ensure * the result stays true until a new mapping can be installed. */ -bool page_check_range_empty(target_ulong start, target_ulong last); +bool page_check_range_empty(vaddr start, vaddr last); =20 /** * page_find_range_empty @@ -72,8 +70,7 @@ bool page_check_range_empty(target_ulong start, target_ul= ong last); * The memory lock must be held, as the caller will want to ensure * the returned range stays empty until a new mapping can be installed. */ -target_ulong page_find_range_empty(target_ulong min, target_ulong max, - target_ulong len, target_ulong align); +vaddr page_find_range_empty(vaddr min, vaddr max, vaddr len, vaddr align); =20 /** * page_get_target_data(address) @@ -87,7 +84,7 @@ target_ulong page_find_range_empty(target_ulong min, targ= et_ulong max, * e.g. with the munmap system call. */ __attribute__((returns_nonnull)) -void *page_get_target_data(target_ulong address); +void *page_get_target_data(vaddr address); =20 typedef int (*walk_memory_regions_fn)(void *, vaddr, vaddr, int); int walk_memory_regions(void *, walk_memory_regions_fn); diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 25d86567e70..43d005e24e4 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -161,7 +161,7 @@ typedef struct PageFlagsNode { =20 static IntervalTreeRoot pageflags_root; =20 -static PageFlagsNode *pageflags_find(target_ulong start, target_ulong last) +static PageFlagsNode *pageflags_find(vaddr start, vaddr last) { IntervalTreeNode *n; =20 @@ -169,8 +169,7 @@ static PageFlagsNode *pageflags_find(target_ulong start= , target_ulong last) return n ? container_of(n, PageFlagsNode, itree) : NULL; } =20 -static PageFlagsNode *pageflags_next(PageFlagsNode *p, target_ulong start, - target_ulong last) +static PageFlagsNode *pageflags_next(PageFlagsNode *p, vaddr start, vaddr = last) { IntervalTreeNode *n; =20 @@ -215,14 +214,14 @@ static int dump_region(void *opaque, vaddr start, vad= dr end, int prot) /* dump memory mappings */ void page_dump(FILE *f) { - const int length =3D sizeof(target_ulong) * 2; + const int length =3D sizeof(abi_ptr) * 2; =20 fprintf(f, "%-*s %-*s %-*s %s\n", length, "start", length, "end", length, "size", "prot"); walk_memory_regions(f, dump_region); } =20 -int page_get_flags(target_ulong address) +int page_get_flags(vaddr address) { PageFlagsNode *p =3D pageflags_find(address, address); =20 @@ -245,7 +244,7 @@ int page_get_flags(target_ulong address) } =20 /* A subroutine of page_set_flags: insert a new node for [start,last]. */ -static void pageflags_create(target_ulong start, target_ulong last, int fl= ags) +static void pageflags_create(vaddr start, vaddr last, int flags) { PageFlagsNode *p =3D g_new(PageFlagsNode, 1); =20 @@ -256,13 +255,13 @@ static void pageflags_create(target_ulong start, targ= et_ulong last, int flags) } =20 /* A subroutine of page_set_flags: remove everything in [start,last]. */ -static bool pageflags_unset(target_ulong start, target_ulong last) +static bool pageflags_unset(vaddr start, vaddr last) { bool inval_tb =3D false; =20 while (true) { PageFlagsNode *p =3D pageflags_find(start, last); - target_ulong p_last; + vaddr p_last; =20 if (!p) { break; @@ -301,8 +300,7 @@ static bool pageflags_unset(target_ulong start, target_= ulong last) * A subroutine of page_set_flags: nothing overlaps [start,last], * but check adjacent mappings and maybe merge into a single range. */ -static void pageflags_create_merge(target_ulong start, target_ulong last, - int flags) +static void pageflags_create_merge(vaddr start, vaddr last, int flags) { PageFlagsNode *next =3D NULL, *prev =3D NULL; =20 @@ -353,11 +351,11 @@ static void pageflags_create_merge(target_ulong start= , target_ulong last, #define PAGE_STICKY (PAGE_ANON | PAGE_PASSTHROUGH | PAGE_TARGET_STICKY) =20 /* A subroutine of page_set_flags: add flags to [start,last]. */ -static bool pageflags_set_clear(target_ulong start, target_ulong last, +static bool pageflags_set_clear(vaddr start, vaddr last, int set_flags, int clear_flags) { PageFlagsNode *p; - target_ulong p_start, p_last; + vaddr p_start, p_last; int p_flags, merge_flags; bool inval_tb =3D false; =20 @@ -492,7 +490,7 @@ static bool pageflags_set_clear(target_ulong start, tar= get_ulong last, return inval_tb; } =20 -void page_set_flags(target_ulong start, target_ulong last, int flags) +void page_set_flags(vaddr start, vaddr last, int flags) { bool reset =3D false; bool inval_tb =3D false; @@ -532,9 +530,9 @@ void page_set_flags(target_ulong start, target_ulong la= st, int flags) } } =20 -bool page_check_range(target_ulong start, target_ulong len, int flags) +bool page_check_range(vaddr start, vaddr len, int flags) { - target_ulong last; + vaddr last; int locked; /* tri-state: =3D0: unlocked, +1: global, -1: local */ bool ret; =20 @@ -610,17 +608,16 @@ bool page_check_range(target_ulong start, target_ulon= g len, int flags) return ret; } =20 -bool page_check_range_empty(target_ulong start, target_ulong last) +bool page_check_range_empty(vaddr start, vaddr last) { assert(last >=3D start); assert_memory_lock(); return pageflags_find(start, last) =3D=3D NULL; } =20 -target_ulong page_find_range_empty(target_ulong min, target_ulong max, - target_ulong len, target_ulong align) +vaddr page_find_range_empty(vaddr min, vaddr max, vaddr len, vaddr align) { - target_ulong len_m1, align_m1; + vaddr len_m1, align_m1; =20 assert(min <=3D max); assert(max <=3D GUEST_ADDR_MAX); @@ -661,7 +658,7 @@ target_ulong page_find_range_empty(target_ulong min, ta= rget_ulong max, void tb_lock_page0(tb_page_addr_t address) { PageFlagsNode *p; - target_ulong start, last; + vaddr start, last; int host_page_size =3D qemu_real_host_page_size(); int prot; =20 @@ -740,7 +737,7 @@ int page_unprotect(CPUState *cpu, tb_page_addr_t addres= s, uintptr_t pc) } } else { int host_page_size =3D qemu_real_host_page_size(); - target_ulong start, len, i; + vaddr start, len, i; int prot; =20 if (host_page_size <=3D TARGET_PAGE_SIZE) { @@ -756,7 +753,7 @@ int page_unprotect(CPUState *cpu, tb_page_addr_t addres= s, uintptr_t pc) prot =3D 0; =20 for (i =3D 0; i < len; i +=3D TARGET_PAGE_SIZE) { - target_ulong addr =3D start + i; + vaddr addr =3D start + i; =20 p =3D pageflags_find(addr, addr); if (p) { @@ -883,7 +880,7 @@ typedef struct TargetPageDataNode { =20 static IntervalTreeRoot targetdata_root; =20 -void page_reset_target_data(target_ulong start, target_ulong last) +void page_reset_target_data(vaddr start, vaddr last) { IntervalTreeNode *n, *next; =20 @@ -897,7 +894,7 @@ void page_reset_target_data(target_ulong start, target_= ulong last) n !=3D NULL; n =3D next, next =3D next ? interval_tree_iter_next(n, start, last) : NULL) { - target_ulong n_start, n_last, p_ofs, p_len; + vaddr n_start, n_last, p_ofs, p_len; TargetPageDataNode *t =3D container_of(n, TargetPageDataNode, itre= e); =20 if (n->start >=3D start && n->last <=3D last) { @@ -921,11 +918,11 @@ void page_reset_target_data(target_ulong start, targe= t_ulong last) } } =20 -void *page_get_target_data(target_ulong address) +void *page_get_target_data(vaddr address) { IntervalTreeNode *n; TargetPageDataNode *t; - target_ulong page, region, p_ofs; + vaddr page, region, p_ofs; =20 page =3D address & TARGET_PAGE_MASK; region =3D address & TBD_MASK; @@ -956,7 +953,7 @@ void *page_get_target_data(target_ulong address) return t->data + p_ofs * TARGET_PAGE_DATA_SIZE; } #else -void page_reset_target_data(target_ulong start, target_ulong last) { } +void page_reset_target_data(vaddr start, vaddr last) { } #endif /* TARGET_PAGE_DATA_SIZE */ =20 /* The system-mode versions of these helpers are in cputlb.c. */ --=20 2.47.1 From nobody Sat Nov 15 23:34:40 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1745488049; cv=none; d=zohomail.com; s=zohoarc; b=BbQgeyTy9Jab6+y1m+JRoSiNO4ovSyuVR7ituR+Gut+huhwEjmcs2EFWhBCrSq0iCW/e3ybMR9POJgwr+aW0gJ/6/72DMduXzZPeIU0xrgbyVwBowTEEZGP5dqMnCqL9k55f84ikZO34Jl+RHaV5FlSBsg3WthdG1tkfQssYH9s= ARC-Message-Signature: i=1; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4409d2ac5a9sm13920295e9.23.2025.04.24.02.47.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 24 Apr 2025 02:47:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1745488030; x=1746092830; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fKVbRu30xoHBRhvO25AZS8axM+b/UNVBgSZLA8vs3WU=; b=paEcNnRm1jKkH9Q1mIktk6g6jDYoNk680rfL7/c9D7Oo6ccGpxRRhHIGILrXCKsuQs VkOB3T9XzI+cnalvw8QcWdIv79xixw9MFgopMK/StG+x+GDYwn6YlH2U6mvpT78r2qTt YbPNlc5s6+Ktdqll+QwWhkie5Y8L//hWZLV1bVeZkUpfIHepCwAVUyvFe8dplNt0qRC6 wUtWymcpzNsvkBX2XCeRJJ92fsfcOpb5mW83q/DKPcj2tM/1sYPY59Gexoz7Tcl4bvXG QvX112p9dzyt7/K2wg5KQqB+o4MBKChp3RngAK3T28aHMcbdwNLjZrb9ClhLcJnngGnX EWyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1745488030; x=1746092830; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fKVbRu30xoHBRhvO25AZS8axM+b/UNVBgSZLA8vs3WU=; b=cJqpkssy7/whTL8G/TsBu+muVmOD8yLCbXUnj4je3h/YEfW+i1s/10iiVt6FGJ3eZ3 TJ7pH7JpuRMtwAUsFhT3gjRXiZ0/g95eDw3uwiT9sv3yj3pu1p95pi8XoznUuaYYrhpL tFN3vZBagqFBimEtEMFsLjbryx4aznrSUIbXsk1N/0LgQfaUBOgkcrJu6Wd8CI0QCnas sD/AlJSx08B8hoYCyFOhE5G5jxdW8mIBd6taKOZYyCjDQdVkPOBMW6q2vX31Dk7+X2pa RikrDYoybl4ABO3DM9AAr28HWtPYeUwXfqx80BLnYGlxLqHVwh/M/aNWUAG6VVCIYIcP l0+A== X-Gm-Message-State: AOJu0YxmiMKNvU3IsGzeyjyhmCflZ9XwJpNApj7FOxKmqDHz13cELlKd Sx5tiotNGv5gkqPcPXZGEE0BRDWQET6E5ZYbeS5oaaWV8MnYHL1HpagVlV5naKMqxkN5EHlL8/C I X-Gm-Gg: ASbGncsWJmCoUASyKaWOU7MpVwdMUNQ21D0bA9jwjRcfBk/AXEx2i6GWaw8qg5SN9/m 2sEQsfLPPfyg+3i6VhB1Eq+W0N4agYfARphw0/4prFjtP3b1WnrG9Ef/3qCgIz9mN/xxCsOyFXv qmOV1ztpvTmK19Xh+0bOy2ZqjvfQ5AKwRfP+ikokxoleKOExubrADjHKDIL5vsvqgJUuTL90hju tGEqiltLyJ3s57j+7+iF/1I5giICznwzATTyqisL0CB6R23S5aWzuRgMMaclaX/r2oF7oVimf/Q /FMjSOSFIVj8qlYJ00SFbVxbzMZqlZ1V3AFDWWbIz/+cYNDZFJ2d21HzTXlFvjsEdBp9dmq99pr Lu8Svr/JVb6CPOhk+oH5w X-Google-Smtp-Source: AGHT+IGmQDpZfKgeqvRv5spGtYiZS6g1s/iF7Jsi5azpmkYulkw7t5vpeV86JPqp+8uopqk6oAC6Bg== X-Received: by 2002:a05:600c:a00d:b0:43d:7588:6688 with SMTP id 5b1f17b1804b1-4409bd18492mr17380165e9.12.1745488029784; Thu, 24 Apr 2025 02:47:09 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: Pierrick Bouvier , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 03/13] accel/tcg: Correct list of included headers in tcg-stub.c Date: Thu, 24 Apr 2025 11:46:43 +0200 Message-ID: <20250424094653.35932-4-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250424094653.35932-1-philmd@linaro.org> References: <20250424094653.35932-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1745488052056019100 In commit 3549118b498 we moved cpu_loop_exit*() declarations to "exec/cpu-common.h" but neglected to update tcg-stub.c. We missed it because "exec/cpu-common.h" is indirectly pulled in via "exec/exec-all.h" -> "exec/translation-block.h". Include it directly instead of the not necessary "exec/exec-all.h". Commit bb6cf6f0168 ("accel/tcg: Factor tcg_cpu_reset_hold() out") removed the need for "exec/tb-flush.h", so remote it too. Fixes: 3549118b498 ("exec: Move cpu_loop_foo() functions to 'cpu-common.h'") Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Mark Cave-Ayland --- accel/stubs/tcg-stub.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c index b2b9881bdfb..3b76b8b17c1 100644 --- a/accel/stubs/tcg-stub.c +++ b/accel/stubs/tcg-stub.c @@ -11,8 +11,7 @@ */ =20 #include "qemu/osdep.h" -#include "exec/tb-flush.h" -#include "exec/exec-all.h" +#include "exec/cpu-common.h" =20 G_NORETURN void cpu_loop_exit(CPUState *cpu) { --=20 2.47.1 From nobody Sat Nov 15 23:34:40 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1745488136; cv=none; d=zohomail.com; s=zohoarc; b=hFSD57K2FhS/viYlOftPjM84nadR/7z81ar1ZwizsEM67I2fJOuzwO622J+jJTSvnQnU4ZQYMBsevEL1RG2AqjDySexBmJzCrYXfzFQ8zNt1EFlD7WRsx4Tg9fU41HjxaVtNHHTxgL47bf7eagZodlO9U8RKqVUqtHfwWF/XjDo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1745488136; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Z+dClDFlT5FzPOmVGUogkFyrT6hsGGcZxW7y5tMgj+s=; b=hGZyyD5Yw9wC3Zen8va9+NCoA7FL1HGbf5mWIwNAW7d7qVFLBvOGlggq7TmofTgFNp3z0qOseFyMBt0l9wlX5QA++r7CCx6+ZsC5GpAyM604FyrwSCzpsCc1ZcrJSOX4EID1OUzLWzNaDH8Y2UFIE2snD8UPltkqmypGHqYx6+Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1745488136833964.1714203894383; Thu, 24 Apr 2025 02:48:56 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u7tAu-0007dF-4x; Thu, 24 Apr 2025 05:47:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u7tAs-0007ce-3j for qemu-devel@nongnu.org; Thu, 24 Apr 2025 05:47:18 -0400 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1u7tAq-0002Zd-CO for qemu-devel@nongnu.org; Thu, 24 Apr 2025 05:47:17 -0400 Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-39c31e4c3e5so513006f8f.0 for ; Thu, 24 Apr 2025 02:47:15 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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All these headers are indirectly pulled in via "exec/translation-block.h". Since we will remove "exec/translation-block.h" in the next commit, include the missing ones, otherwise we'd get errors such: include/exec/exec-all.h:51:1: error: unknown type name 'hwaddr' 51 | hwaddr memory_region_section_get_iotlb(CPUState *cpu, | ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Mark Cave-Ayland --- include/exec/exec-all.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 24383b6abad..c46255e66ef 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -20,8 +20,11 @@ #ifndef EXEC_ALL_H #define EXEC_ALL_H =20 +#include "exec/hwaddr.h" +#include "exec/memattrs.h" #include "exec/mmu-access-type.h" #include "exec/translation-block.h" +#include "exec/vaddr.h" =20 #if defined(CONFIG_TCG) #include "accel/tcg/getpc.h" --=20 2.47.1 From nobody Sat Nov 15 23:34:40 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1745488053; cv=none; d=zohomail.com; s=zohoarc; b=dBEmeg6bY7HjIMU+9Gwg6w8a86EyOvu+zu5Z4Wi8b5uZLHRrjXU8Q9UX6B2ofn73vDeqvtbmqqrI7J6gTLnSfv8ij1xY7E0/bkBbztbb2tz3lCIGIE3zFFELZySVzf7sZjynMNP0YCWhfSWQGufCv2Opoi83T+5u3Ei+/sa/8HU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1745488053; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=3spF3BHyP+3nJq+PBnSsTeYKhoBB0RsO1qRS6M0pmcw=; b=CzObG7UxGV/nDcUo2DX6DeZ5G6MZDy5tgmtu8kZ4j9MdjnyzX8mn6hrkFmBqAnI9BefrZI4mW2UEIR6198T2lergSYh7nR5sVIY6vI7spb+JivBoUSshUeu7sCtX++g1u2b1xZhoFAdOrGOHhLThnPissBdC+gXDjsoLnQBYlPE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1745488053697775.7771292021724; Thu, 24 Apr 2025 02:47:33 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u7tAy-0007eB-Pb; Thu, 24 Apr 2025 05:47:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u7tAx-0007dt-6m for qemu-devel@nongnu.org; Thu, 24 Apr 2025 05:47:23 -0400 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1u7tAv-0002a6-DM for qemu-devel@nongnu.org; Thu, 24 Apr 2025 05:47:22 -0400 Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-43cebe06e9eso5034025e9.3 for ; Thu, 24 Apr 2025 02:47:20 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Thu, 24 Apr 2025 02:47:19 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: Pierrick Bouvier , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 05/13] include/exec: Move tb_invalidate_phys_range to translation-block.h Date: Thu, 24 Apr 2025 11:46:45 +0200 Message-ID: <20250424094653.35932-6-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250424094653.35932-1-philmd@linaro.org> References: <20250424094653.35932-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1745488056067019100 From: Richard Henderson Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20250424011918.599958-15-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/exec/exec-all.h | 5 ----- include/exec/translation-block.h | 4 ++++ 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index c46255e66ef..4c5ad98c6a9 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -23,7 +23,6 @@ #include "exec/hwaddr.h" #include "exec/memattrs.h" #include "exec/mmu-access-type.h" -#include "exec/translation-block.h" #include "exec/vaddr.h" =20 #if defined(CONFIG_TCG) @@ -123,10 +122,6 @@ int probe_access_full_mmu(CPUArchState *env, vaddr add= r, int size, #endif /* !CONFIG_USER_ONLY */ #endif /* CONFIG_TCG */ =20 -/* TranslationBlock invalidate API */ -void tb_invalidate_phys_range(CPUState *cpu, tb_page_addr_t start, - tb_page_addr_t last); - #if !defined(CONFIG_USER_ONLY) =20 /** diff --git a/include/exec/translation-block.h b/include/exec/translation-bl= ock.h index 8b8e730561d..cdce399ebab 100644 --- a/include/exec/translation-block.h +++ b/include/exec/translation-block.h @@ -207,4 +207,8 @@ static inline void tb_set_page_addr1(TranslationBlock *= tb, #endif } =20 +/* TranslationBlock invalidate API */ +void tb_invalidate_phys_range(CPUState *cpu, tb_page_addr_t start, + tb_page_addr_t last); + #endif /* EXEC_TRANSLATION_BLOCK_H */ --=20 2.47.1 From nobody Sat Nov 15 23:34:40 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1745488155; cv=none; d=zohomail.com; s=zohoarc; b=lvuen+seifOiUOVTaxqWDeWGW7PzdCw2/lNJ1tHCyXt9i+yzM9CEhlFasndnS3q1Wyl9MZqVmYU3yHkCJYSOwzVKgfx4MPGHyQ5SbC9FPKLapONFRtOYNpgN4uwefOth52LEBNVry7+0HyNbDT5h6ripL2yr6Z6kXyEOGhNI56w= ARC-Message-Signature: i=1; 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Thu, 24 Apr 2025 02:47:23 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: Pierrick Bouvier , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 06/13] accel/tcg: Compile tb-maint.c twice Date: Thu, 24 Apr 2025 11:46:46 +0200 Message-ID: <20250424094653.35932-7-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250424094653.35932-1-philmd@linaro.org> References: <20250424094653.35932-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1745488156325019100 From: Richard Henderson Signed-off-by: Richard Henderson Message-ID: <20250424011918.599958-16-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- accel/tcg/tb-hash.h | 3 +-- accel/tcg/tb-maint.c | 2 -- accel/tcg/meson.build | 2 +- 3 files changed, 2 insertions(+), 5 deletions(-) diff --git a/accel/tcg/tb-hash.h b/accel/tcg/tb-hash.h index 3bc5042d9d0..f7b159f04cb 100644 --- a/accel/tcg/tb-hash.h +++ b/accel/tcg/tb-hash.h @@ -20,8 +20,7 @@ #ifndef EXEC_TB_HASH_H #define EXEC_TB_HASH_H =20 -#include "exec/cpu-defs.h" -#include "exec/exec-all.h" +#include "exec/vaddr.h" #include "exec/target_page.h" #include "exec/translation-block.h" #include "qemu/xxhash.h" diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index cf12a28eabf..512dae93bdf 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -20,10 +20,8 @@ #include "qemu/osdep.h" #include "qemu/interval-tree.h" #include "qemu/qtree.h" -#include "cpu.h" #include "exec/cputlb.h" #include "exec/log.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/mmap-lock.h" #include "exec/tb-flush.h" diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build index 047afa49a28..3f7b127130b 100644 --- a/accel/tcg/meson.build +++ b/accel/tcg/meson.build @@ -8,6 +8,7 @@ tcg_ss.add(files( 'cpu-exec-common.c', 'tcg-runtime.c', 'tcg-runtime-gvec.c', + 'tb-maint.c', 'translator.c', )) if get_option('plugins') @@ -21,7 +22,6 @@ tcg_specific_ss =3D ss.source_set() tcg_specific_ss.add(files( 'tcg-all.c', 'cpu-exec.c', - 'tb-maint.c', 'translate-all.c', )) tcg_specific_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'= )) --=20 2.47.1 From nobody Sat Nov 15 23:34:40 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Include it explicitly to avoid when refactoring unrelated headers: target/riscv/csr.c:2117:25: error: call to undeclared function 'GETPC' [-= Wimplicit-function-declaration] 2117 | if ((val & RVC) && (GETPC() & ~3) !=3D 0) { | ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Alistair Francis Reviewed-by: Mark Cave-Ayland --- target/riscv/csr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index c52c87faaea..13086438552 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -28,6 +28,7 @@ #include "exec/cputlb.h" #include "exec/tb-flush.h" #include "exec/icount.h" +#include "accel/tcg/getpc.h" #include "qemu/guest-random.h" #include "qapi/error.h" #include --=20 2.47.1 From nobody Sat Nov 15 23:34:40 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1745488116; cv=none; d=zohomail.com; s=zohoarc; b=WtazZEgkc1FFo+4fZgCvae/AeJSCL5whbcmtEnmg/EF2EJ+nN7yILYWWe9j2kKmW02/PeZ51m+YYe+n5CCLZbwAYam/P+bzBVnKzd/p1tPX+cMBw8K447NBz5pCrAJf88xRnMame3YY3kIYElQawh9FPTbqbZnB1GSam7vJh3vU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1745488116; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=J4J0VMJ6GfvwPK+ehChCjxy21KDTNZZmDYppJFi+hTg=; b=dgN0nbxKYWDo6bopVzkKZ0h3Ye87FYLUInFKI8uxGbLh0kvZGpKdhZI83h4dYkifMUd1D0Ig+l4Gs3d4DQLmlOD/oeAPcbMgEgL1URwHK+4YL07n2lEbrJLQB6GiDxAHNnATsZYOzsgbiYsEScPmSydQ3t/pk5c1Mo6HIyc1nKU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1745488116114682.6861681568721; Thu, 24 Apr 2025 02:48:36 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u7tBE-000836-7J; Thu, 24 Apr 2025 05:47:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u7tBA-0007zP-R7 for qemu-devel@nongnu.org; Thu, 24 Apr 2025 05:47:37 -0400 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1u7tB9-0002at-4h for qemu-devel@nongnu.org; Thu, 24 Apr 2025 05:47:36 -0400 Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-39c0e0bc733so674713f8f.1 for ; Thu, 24 Apr 2025 02:47:34 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Brian Cain Reviewed-by: Mark Cave-Ayland --- target/hexagon/macros.h | 1 + target/hexagon/mmvec/macros.h | 1 + 2 files changed, 2 insertions(+) diff --git a/target/hexagon/macros.h b/target/hexagon/macros.h index ee3d4c88e7b..6f82277a415 100644 --- a/target/hexagon/macros.h +++ b/target/hexagon/macros.h @@ -21,6 +21,7 @@ #include "cpu.h" #include "hex_regs.h" #include "reg_fields.h" +#include "accel/tcg/getpc.h" =20 #define GET_FIELD(FIELD, REGIN) \ fEXTRACTU_BITS(REGIN, reg_field_info[FIELD].width, \ diff --git a/target/hexagon/mmvec/macros.h b/target/hexagon/mmvec/macros.h index bcd4a1e8973..c1a88392c05 100644 --- a/target/hexagon/mmvec/macros.h +++ b/target/hexagon/mmvec/macros.h @@ -21,6 +21,7 @@ #include "qemu/host-utils.h" #include "arch.h" #include "mmvec/system_ext_mmvec.h" +#include "accel/tcg/getpc.h" =20 #ifndef QEMU_GENERATE #define VdV (*(MMVector *restrict)(VdV_void)) --=20 2.47.1 From nobody Sat Nov 15 23:34:40 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1745488162; cv=none; d=zohomail.com; s=zohoarc; b=EfrNaMyD59lfmrCw1hHLB917fV5JmDQ6mbLEjJ4eAV57NntA5TcdKGS1dQX4BNai0GkjlUo98hhKupIbrXsOyRYobQEKwAGf417NLbcSUL8EX/DJM3cC7KNW4bwTjUw2ZQpAWWZC55HhNyYVC0XQDDai/AQx/9F/TnQrdakPAEQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1745488162; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=FlhuEFGU9Yqfmcq0obyYoUcjG/F2c98mBOFnS8by1sw=; b=ToZSA0abeKmgCmlV1qyXqv9s7UnM/nBMEicR/r03BS8t8vO8EJEh8nURVPdXf6uZnnjXsaB6zwp2fK19WFK9Arz164Og1TyRY58797IAfBHd2CmdQ86U/3w9MtGpzAoOhiG02b7kHw2nWkRwzcmgO2V7PY/r34ff3TU3ZAfYtLY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1745488162303904.2031355308977; Thu, 24 Apr 2025 02:49:22 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u7tBI-00085p-0o; Thu, 24 Apr 2025 05:47:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u7tBF-00084S-9s for qemu-devel@nongnu.org; Thu, 24 Apr 2025 05:47:41 -0400 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1u7tBD-0002b3-FG for qemu-devel@nongnu.org; Thu, 24 Apr 2025 05:47:40 -0400 Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-39ee5ac4321so869328f8f.1 for ; Thu, 24 Apr 2025 02:47:39 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Include it there (in the common part) instead of the unspecific "exec/exec-all.h" header. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/exec/exec-all.h | 1 - include/exec/helper-proto-common.h | 2 ++ accel/tcg/translate-all.c | 1 + 3 files changed, 3 insertions(+), 1 deletion(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 4c5ad98c6a9..816274bf905 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -26,7 +26,6 @@ #include "exec/vaddr.h" =20 #if defined(CONFIG_TCG) -#include "accel/tcg/getpc.h" =20 /** * probe_access: diff --git a/include/exec/helper-proto-common.h b/include/exec/helper-proto= -common.h index 16782ef46c8..76e6c25becb 100644 --- a/include/exec/helper-proto-common.h +++ b/include/exec/helper-proto-common.h @@ -13,4 +13,6 @@ #include "exec/helper-proto.h.inc" #undef HELPER_H =20 +#include "accel/tcg/getpc.h" + #endif /* HELPER_PROTO_COMMON_H */ diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 38819a507b2..0408e2522a8 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -61,6 +61,7 @@ #include "system/tcg.h" #include "qapi/error.h" #include "accel/tcg/cpu-ops.h" +#include "accel/tcg/getpc.h" #include "tb-jmp-cache.h" #include "tb-hash.h" #include "tb-context.h" --=20 2.47.1 From nobody Sat Nov 15 23:34:40 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1745488102; cv=none; d=zohomail.com; s=zohoarc; b=Pyu5mC8njrBxkVW0nC+meAWnPc2nVAOnAQBP8nKDo1McvuUo0YCLK6UUr41Ne2FuOXdzc/j/4mxR7/7ewS1+x8P6ESsW3iClHRV6o0EdIkNWLN1HVkLI33CYDOXHsWQD3h0PMMxodiQl+jiG9LYO9ixhyFIn13KURQBMpQ5l6dA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1745488102; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=twrcSo4HetcJ/tOp7Scc/UtSqix7ipI/uTd3T2r+yek=; b=V4YVyAJQ+75QnL61Ek0LhlrDf1fQH7nq5M0m9KTWOvEQ0f+NBUoea42OjjDvU5d1Fz/1wFXCgUXmKMqOgdocpIDoJSZSFo04KGl2CN2Jg5z+bGS9lDK20Uz0El8gALiwOCRS8fOpeUByGSCoYxQ/uhMYi6xv55T7tBdirAvlWL4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1745488102149569.0539408622082; Thu, 24 Apr 2025 02:48:22 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u7tBP-0008OM-0g; Thu, 24 Apr 2025 05:47:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u7tBK-0008G6-D0 for qemu-devel@nongnu.org; Thu, 24 Apr 2025 05:47:47 -0400 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1u7tBI-0002bD-Fe for qemu-devel@nongnu.org; Thu, 24 Apr 2025 05:47:46 -0400 Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-3913958ebf2so621052f8f.3 for ; Thu, 24 Apr 2025 02:47:43 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a06d54f157sm1538517f8f.98.2025.04.24.02.47.41 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 24 Apr 2025 02:47:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1745488062; x=1746092862; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=twrcSo4HetcJ/tOp7Scc/UtSqix7ipI/uTd3T2r+yek=; b=KQj4a+9165+0WLJK0amhTnlftVdqs8UhMSFFrpLbtNEJQF3ZakBUqjlWy1NjQonJlX 5shD0YPsnmbVNhPEy7SPoQu9D6jftItLui+lKLVQ9l55b5Eq27XpcQ1is8nSVG/hygo9 LOM045BPJelje3kO9WljPEfRVz7VBGV4V31ej+IvVtkhPQ/PnZA4MV9JsItJYxcbrsPI cg4Epxpz/VeJ3r0RtJZw8NcGw93smClt415urEHBMc7JUSJdCLBuyom4J7Urfj/3V9Yf AdLlgm39LUeVtC/RYiv+U7M7VcvnqB/M4UMJ5JOzufjeuZ9h2HnGwldAi0RNtvi9nPKl 61dQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1745488062; x=1746092862; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=twrcSo4HetcJ/tOp7Scc/UtSqix7ipI/uTd3T2r+yek=; b=VvEo197YVQfr5O0JsdWAIvjrd1XmG+wtdOrHtTsRe2pcieGvsC7Pm2BegxWFj3JI0i qcf/TmB38xNCOb0gb1Z+RjgFAW7ihv54qUwwi/dOIFDeyydXSg1PE0sO8ACXgtnekUhs HIsZHSqfomrAxCAY78k1HoJSXW1dS7j8jqBaG+UQXcKaMFtViQg+bPhbK9WMSCrYNax7 lmCkJzxY+tRyWFVLK5cw1K6GEN6Y/uCOai6PvR4C48o+QsX74DhvlSijNCHNuqVS8ypb sHJyb+6ll/b1iv/hn9tv0G6i5rb4C2NveBrdKcWwpbP5x2npKXxW4o2DB2mkhPGAC3wt YaMQ== X-Gm-Message-State: AOJu0YzsHK6SCZYPQSXF/nDgU8MHj2ygdGNT2+W/HX63y+12AvH7Hgx3 5Id2S/8Rm8LldXL10qrf4bXEDtKZmAQJM8ni+jiBcgZZHRFnaYjeL6pQAeS3/yK4kIzWv6g+0at n X-Gm-Gg: ASbGncui/ClNjJlR1keS6sJFx+1IoLK6U/ifZpCX3xG2LdudVWGH2J5NTWKxEXZnIhU te9BsI4hfLi1FFbXAQMqZFnErVWr/XLnBAY4zU8iFrKfJmg+6Fz2xsv844W6LCQS6QIPFnFO1mK en57nLx8XYSAcSoUaLdlBxz5NS9SAU2NH/gdsPOW47fWcHlgDZWNt5JoaBZ9x21ADwqw2TncOih GrOYYhsvmCyqDfqvVeumJbg/+UddKQ9bjQtFpT5GHW225QgY7JDj+kkOPR3jMtwJJ09VtRMAYIz rv3eUD/GA872kuDCWR23EIU9u8lohHvBr0XPxqOSTX1aYlfWPZR/4LBQ82XuOs7B99/GTB/zwX8 hT1RuCkFp0KjN9MDIv9Jg X-Google-Smtp-Source: AGHT+IHHoEMdE9fsofO98GV+L04/+tSEzxG9XNZ+9y5vjxgGsCY6KW4O2Y/8GTqXJpQJ1QhCA9yP1Q== X-Received: by 2002:a05:6000:1ace:b0:39d:8153:fde5 with SMTP id ffacd0b85a97d-3a06cf5f447mr1483441f8f.24.1745488062263; Thu, 24 Apr 2025 02:47:42 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: Pierrick Bouvier , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 10/13] physmem: Move TCG IOMMU methods around Date: Thu, 24 Apr 2025 11:46:50 +0200 Message-ID: <20250424094653.35932-11-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250424094653.35932-1-philmd@linaro.org> References: <20250424094653.35932-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1745488104270019100 The next commit will restrict TCG specific code in physmem.c using some #ifdef'ry. In order to keep it simple, move iotlb_to_section() and memory_region_section_get_iotlb() around close together. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Mark Cave-Ayland --- system/physmem.c | 50 ++++++++++++++++++++++++------------------------ 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/system/physmem.c b/system/physmem.c index 637f2d85324..ccbeae241c4 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -746,6 +746,31 @@ translate_fail: return &d->map.sections[PHYS_SECTION_UNASSIGNED]; } =20 +MemoryRegionSection *iotlb_to_section(CPUState *cpu, + hwaddr index, MemTxAttrs attrs) +{ + int asidx =3D cpu_asidx_from_attrs(cpu, attrs); + CPUAddressSpace *cpuas =3D &cpu->cpu_ases[asidx]; + AddressSpaceDispatch *d =3D cpuas->memory_dispatch; + int section_index =3D index & ~TARGET_PAGE_MASK; + MemoryRegionSection *ret; + + assert(section_index < d->map.sections_nb); + ret =3D d->map.sections + section_index; + assert(ret->mr); + assert(ret->mr->ops); + + return ret; +} + +/* Called from RCU critical section */ +hwaddr memory_region_section_get_iotlb(CPUState *cpu, + MemoryRegionSection *section) +{ + AddressSpaceDispatch *d =3D flatview_to_dispatch(section->fv); + return section - d->map.sections; +} + void cpu_address_space_init(CPUState *cpu, int asidx, const char *prefix, MemoryRegion *mr) { @@ -1002,14 +1027,6 @@ bool cpu_physical_memory_snapshot_get_dirty(DirtyBit= mapSnapshot *snap, return false; } =20 -/* Called from RCU critical section */ -hwaddr memory_region_section_get_iotlb(CPUState *cpu, - MemoryRegionSection *section) -{ - AddressSpaceDispatch *d =3D flatview_to_dispatch(section->fv); - return section - d->map.sections; -} - static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end, uint16_t section); static subpage_t *subpage_init(FlatView *fv, hwaddr base); @@ -2669,23 +2686,6 @@ static uint16_t dummy_section(PhysPageMap *map, Flat= View *fv, MemoryRegion *mr) return phys_section_add(map, §ion); } =20 -MemoryRegionSection *iotlb_to_section(CPUState *cpu, - hwaddr index, MemTxAttrs attrs) -{ - int asidx =3D cpu_asidx_from_attrs(cpu, attrs); - CPUAddressSpace *cpuas =3D &cpu->cpu_ases[asidx]; - AddressSpaceDispatch *d =3D cpuas->memory_dispatch; - int section_index =3D index & ~TARGET_PAGE_MASK; - MemoryRegionSection *ret; - - assert(section_index < d->map.sections_nb); - ret =3D d->map.sections + section_index; - assert(ret->mr); - assert(ret->mr->ops); - - return ret; -} - static void io_mem_init(void) { memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, N= ULL, --=20 2.47.1 From nobody Sat Nov 15 23:34:40 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1745488123; cv=none; d=zohomail.com; s=zohoarc; b=ivQ1oTO2pfPSBddV7x0JwRhgGo0JLzWxeZfLMeetpoy7SFDO7xIOivqNye84EaMUdt4Vd7nJ5orNGDrOFoJgDkWGI2OKd1+Es3AtEvZN6CIEWlswGbC7S3Kfx9NCLuzMO8SBq/R7lG5l6YOEJf46JeMkZZtWx3//h5dkpVn0hQg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1745488123; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=oDnRsco8X4925YTV8UTDqMtG98oA60/dC49QTKfKMmw=; b=ZdmRt2XBz8tN5S1HXVfAS3kT470s+1iY2UP5x2ZPCpcIzc0UYGMBIpkVE6Aao3Ha94hjIbtE+Nae1tnye3LbNeLeRxGoTm9FSSKVzeHHS9cfC0cVvsLt9gUKaJ7Y8PDplK2dX6/v/JNcBoqihmfrOVZaStWUazbJhDLkfHHxWPg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1745488123667678.3675929785451; Thu, 24 Apr 2025 02:48:43 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u7tBS-00008v-9U; Thu, 24 Apr 2025 05:47:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u7tBP-0008Py-D5 for qemu-devel@nongnu.org; Thu, 24 Apr 2025 05:47:51 -0400 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1u7tBN-0002bO-2X for qemu-devel@nongnu.org; Thu, 24 Apr 2025 05:47:51 -0400 Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-39c30d9085aso577635f8f.1 for ; Thu, 24 Apr 2025 02:47:48 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a06d4c5fc4sm1537508f8f.57.2025.04.24.02.47.46 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 24 Apr 2025 02:47:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1745488067; x=1746092867; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oDnRsco8X4925YTV8UTDqMtG98oA60/dC49QTKfKMmw=; b=hxaBNYaSW9y2IjC5ppfCotnAgZD5rY3SxJqeAWvkMjzMS1e5we2w1qMESn7u2Mumtn GS0jhEXx5AHt8DKcTwb1G+iAgmw1x9k6tCEzna5I9Wm3uSBxmV7QD3d0OaHmbZhQ6RtE SSELAHQFn4GMVqEtOw8JFo6VGiXolXSEFT0zU0hCSbv+UAi+s8Tl+IW5ID5Ms6WM+/56 rwSkuPE/CRcBc8DNGwKm7ID8sVPUPLGdw8Ifg+autfaxQne+i/wQvvVn+RB0iBjqUq08 qiwvpUt1Aook8Q1NWKr4yDm6o7FrJjUsN+iDbqKIqvZGxewr0Hdz23i0qKa6ExYQxrDq V4Vg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1745488067; x=1746092867; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oDnRsco8X4925YTV8UTDqMtG98oA60/dC49QTKfKMmw=; b=Vt6qS7ousWLuJTzAxz1JWuAHmi4oktb47lZ4pT+OVYnZL0/xyVHD1B09Vuviowq0tC GHW8sdTTcucfeUtR7lbwHHTbiRadUE3j5p2OT+hy+Vp7vrO6Hj3984wY3qVW3w2iVfQq DgGrPiJoC7t/ZBcEEtLq7vBHk+OywxhqmzFyFk3szTnho+o/gShDa6DU36O5vSOo7Eie 0N6uOS9WMORk4eO6VPSDl2h6XeJayUThsA6+uSm0Z3afT1IAEMcFkLu41PVduxCaff/5 qG7rgTorfbf+JObtgFLU9TF1Fvggkhc4Z8EyqhP3xfZ5PjPt4w73l8juokmPG6IBcVDe 3Lrg== X-Gm-Message-State: AOJu0YxK0XNE56qubKWrhMqEPx4wUaw5SDXM4MMZSaNRWhb16IjpirzF VIhRbNhh01/Ekrdn+q54O3LN4qqMGqpw4ZuQyXKThD1GhAVcIHPWYvMmZTAug5Uh7btktP4ssBk Y X-Gm-Gg: ASbGncsdr1pLp7ADDKZEsRxkeOapwGoB/QMMRaLbw1Iv4NiRathPHe21swpHCHwGKNa o3knMzyKVB8GJ6SAM7nLVbsRECATM6acXAmYNeqJnhat/B4diO7otJqISe0kVS4+euR08bQmK7n cX8TUkh24fJwIAUIBYQnQQydXTrdlRlN2qyBGnF/UDiiVFsLMisIiaOqKdcyfB785rT3bNbHwsW Da//6fSexJK7zOZ3c4Xtn0PLF5XBQAFYcKvy1/8C4fAw+qKM/pRchYUyx1CPtldqQHp3ufIi22o hUx4X6DXwIe5+gvJBbJg7Sawlhf0s+x6mX08ac7NGLBhOgv80jZCoGaSkPjVf17SlN8app+LQbs rtwm4pHvUquH+60QO0HzT X-Google-Smtp-Source: AGHT+IHyRzhoJ/LZFYRidIgFo8SZDtR46NkMJ6q/iDSIG0yHNPSvsXwyTabomkHkYMhaqjSP0khSZQ== X-Received: by 2002:a5d:5848:0:b0:39c:3122:ad55 with SMTP id ffacd0b85a97d-3a06cf5642bmr1373587f8f.18.1745488067003; Thu, 24 Apr 2025 02:47:47 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: Pierrick Bouvier , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 11/13] physmem: Restrict TCG IOMMU code to TCG accel Date: Thu, 24 Apr 2025 11:46:51 +0200 Message-ID: <20250424094653.35932-12-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250424094653.35932-1-philmd@linaro.org> References: <20250424094653.35932-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1745488125017019000 Restrict iotlb_to_section(), address_space_translate_for_iotlb() and memory_region_section_get_iotlb() to TCG. Declare them in the new "accel/tcg/iommu.h" header. Declare iotlb_to_section() using the MemoryRegionSection typedef. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- MAINTAINERS | 2 +- include/accel/tcg/iommu.h | 41 +++++++++++++++++++++++++++++++++++++++ include/exec/exec-all.h | 26 ------------------------- accel/tcg/cputlb.c | 1 + system/physmem.c | 5 +++++ 5 files changed, 48 insertions(+), 27 deletions(-) create mode 100644 include/accel/tcg/iommu.h diff --git a/MAINTAINERS b/MAINTAINERS index 661a47db5ac..3a37cc73af7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -168,7 +168,7 @@ F: include/exec/helper*.h.inc F: include/exec/helper-info.c.inc F: include/exec/page-protection.h F: include/system/tcg.h -F: include/accel/tcg/cpu-ops.h +F: include/accel/tcg/ F: host/include/*/host/cpuinfo.h F: util/cpuinfo-*.c F: include/tcg/ diff --git a/include/accel/tcg/iommu.h b/include/accel/tcg/iommu.h new file mode 100644 index 00000000000..90cfd6c0ed1 --- /dev/null +++ b/include/accel/tcg/iommu.h @@ -0,0 +1,41 @@ +/* + * TCG IOMMU translations. + * + * Copyright (c) 2003 Fabrice Bellard + * SPDX-License-Identifier: LGPL-2.1-or-later + */ +#ifndef ACCEL_TCG_IOMMU_H +#define ACCEL_TCG_IOMMU_H + +#ifdef CONFIG_USER_ONLY +#error Cannot include accel/tcg/iommu.h from user emulation +#endif + +#include "exec/hwaddr.h" +#include "exec/memattrs.h" + +/** + * iotlb_to_section: + * @cpu: CPU performing the access + * @index: TCG CPU IOTLB entry + * + * Given a TCG CPU IOTLB entry, return the MemoryRegionSection that + * it refers to. @index will have been initially created and returned + * by memory_region_section_get_iotlb(). + */ +MemoryRegionSection *iotlb_to_section(CPUState *cpu, + hwaddr index, MemTxAttrs attrs); + +MemoryRegionSection *address_space_translate_for_iotlb(CPUState *cpu, + int asidx, + hwaddr addr, + hwaddr *xlat, + hwaddr *plen, + MemTxAttrs attrs, + int *prot); + +hwaddr memory_region_section_get_iotlb(CPUState *cpu, + MemoryRegionSection *section); + +#endif + diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 816274bf905..b9eb9bc4b63 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -21,7 +21,6 @@ #define EXEC_ALL_H =20 #include "exec/hwaddr.h" -#include "exec/memattrs.h" #include "exec/mmu-access-type.h" #include "exec/vaddr.h" =20 @@ -121,29 +120,4 @@ int probe_access_full_mmu(CPUArchState *env, vaddr add= r, int size, #endif /* !CONFIG_USER_ONLY */ #endif /* CONFIG_TCG */ =20 -#if !defined(CONFIG_USER_ONLY) - -/** - * iotlb_to_section: - * @cpu: CPU performing the access - * @index: TCG CPU IOTLB entry - * - * Given a TCG CPU IOTLB entry, return the MemoryRegionSection that - * it refers to. @index will have been initially created and returned - * by memory_region_section_get_iotlb(). - */ -struct MemoryRegionSection *iotlb_to_section(CPUState *cpu, - hwaddr index, MemTxAttrs attr= s); -#endif - -#if !defined(CONFIG_USER_ONLY) - -MemoryRegionSection * -address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, - hwaddr *xlat, hwaddr *plen, - MemTxAttrs attrs, int *prot); -hwaddr memory_region_section_get_iotlb(CPUState *cpu, - MemoryRegionSection *section); -#endif - #endif diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index ca69128232c..d11989f5674 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "qemu/main-loop.h" #include "accel/tcg/cpu-ops.h" +#include "accel/tcg/iommu.h" #include "exec/exec-all.h" #include "exec/page-protection.h" #include "system/memory.h" diff --git a/system/physmem.c b/system/physmem.c index ccbeae241c4..f1ec0902c78 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -29,6 +29,7 @@ =20 #ifdef CONFIG_TCG #include "accel/tcg/cpu-ops.h" +#include "accel/tcg/iommu.h" #endif /* CONFIG_TCG */ =20 #include "exec/exec-all.h" @@ -587,6 +588,8 @@ MemoryRegion *flatview_translate(FlatView *fv, hwaddr a= ddr, hwaddr *xlat, return mr; } =20 +#ifdef CONFIG_TCG + typedef struct TCGIOMMUNotifier { IOMMUNotifier n; MemoryRegion *mr; @@ -771,6 +774,8 @@ hwaddr memory_region_section_get_iotlb(CPUState *cpu, return section - d->map.sections; } =20 +#endif /* CONFIG_TCG */ + void cpu_address_space_init(CPUState *cpu, int asidx, const char *prefix, MemoryRegion *mr) { --=20 2.47.1 From nobody Sat Nov 15 23:34:40 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1745488094; cv=none; d=zohomail.com; s=zohoarc; b=dICXiYWF1cEd3+kzo6NcZpID2Kb6dBWe10ZXylkqyhD7JzAXUB5hJTXRFf7M4qx6V0lzIxtyYHN5fslkYHd6Sl5pk4FqgCIXSL1ttIwzjqO9kJ2W1aUQMEcd80fbblPdwtsv4ONTFtRgbiYEwDPuWHeTFZCxdiypWrOFPzJUv/o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4409d2e0414sm13937315e9.40.2025.04.24.02.47.50 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 24 Apr 2025 02:47:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1745488072; x=1746092872; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TSjBpDqqccDDSqyByKqT/sgEReyZnqYYvG3Sgb4WXuQ=; b=DnpTxx311h8PpZwZoK+2Kq8k6wXNmnzSZP/e+JVICqalEgWYYDIR50lkFwU97csdpk j6zP+I0HfTYjmPdXVcGSjyM+9gbsVKakmYMyQAsiotuY3cKcnRWE6fCYG51IkOmZfvBq y2sBD6YHoeQz+33VjcFrAcVWejm5n6qUAmzrHD4t4BshVcWzlLyYlLjSy2zbj0RL0E5a ectGpRRVUSCx94bmWUjX9mZir7YQke0fa7OUn+X/4pcRTCBc61PrFl7HpLO6y06zIQCx kUnV/idu5W9VDc2JUUL2VD5zQo5f3aW9k0pL785XOltSXFJ1LFDhDOXdhFAEECOBQe/x 4Luw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1745488072; x=1746092872; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TSjBpDqqccDDSqyByKqT/sgEReyZnqYYvG3Sgb4WXuQ=; b=uVl2GbwtQQqmCwc8YMsf71dDxyHg1gZE1zbhwKjl/pEYcKOPCfJvS/Y1DLyWXSA7fU mgcWbqNo4dXuzp/6s19rRV5rTebFoHvvn4niSE4SXZg7iAbyLuvuEeQmGb4s5CS0dUuO 4GJorkhRPpfjzFXuRRRgdwnbATKY1BdxlN5BeaRiS42Smu4rDGzAjjW9VgwrWjhxbKld Go4yxSCxnOeZHg/UFBqaNpMXTjvsAXuymVZaI5IdrVnfgXkIaHmwxZp68lZiSPaYK5Cv gNJ45L3f2xdgHRcxuuCHsylufhSrpjXoc9+U9DZpDHaRIXNK0PM6QL/uF1hUmRtPF8op GpvQ== X-Gm-Message-State: AOJu0YzGWQNJ/ryeMTizI2wcNpWAh1QTMOMqZkZfhGcd12Lwyhio4yS9 Ke2QY8Ncfg1x1fxPsiVWMt8UakbZ54L6qLAR8IQTkScqfRIBfX+ALovS/+aNe3nSVjNHuRtkvB2 G X-Gm-Gg: ASbGnctl8IZWNUo899J2r4caq5jTfZlpZ33rx4gYQ7R6HmA+VJXimks7KI7PRiXNmK2 sgn5/9kd9356qNPkxzjElVaLXcvOnC0up4VjN33ObhPiwn8ly32yar1x+YpCpmXI/9oxYf6Yuxf Zl3Izh577IQVJsNRZDZLND6+s+2U9hzti2xvBZazvEMbXK7NCR3/TS9LioLO7qqmHKlPo2PzP3d 8q1dUBeHtIlLHU1QjItIuz5s6d9sd54Hc8NBDSf5O2jsuiR4noPYcD3nESCFpgMkyQ3jsG6RYdA 1OhKcbiJHEtav+7ybEB8FT836b6S8NdUJsBV29vf2Urk3NTHBoTeqDzSuNes0zor0RLfuuLGEeX VlkRHVUaRXCfwkCHCe5H8 X-Google-Smtp-Source: AGHT+IGsvXbAm4zH1eU8c5JvFJz08y2NKd4wC/ZCoKZ3ZL92zbltN7jPccaBVDKnNZLbJ+SRv83TSg== X-Received: by 2002:a05:600c:3b8c:b0:43d:fa59:be39 with SMTP id 5b1f17b1804b1-4409bd8bd4amr14421365e9.33.1745488071811; Thu, 24 Apr 2025 02:47:51 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: Pierrick Bouvier , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 12/13] accel/tcg: Extract probe API out of 'exec/exec-all.h' Date: Thu, 24 Apr 2025 11:46:52 +0200 Message-ID: <20250424094653.35932-13-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250424094653.35932-1-philmd@linaro.org> References: <20250424094653.35932-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1745488096557019100 Declare probe methods in "accel/tcg/probe.h" to emphasize they are specific to TCG accelerator. target/arm/ptw.c is the only non-TCG specific file, its call to the probe API is already guarded within CONFIG_TCG checks. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Mark Cave-Ayland Suggested-by: Richard Henderson --- include/accel/tcg/probe.h | 110 +++++++++++++++++++++++++++ include/exec/exec-all.h | 100 ------------------------ target/hexagon/mmvec/macros.h | 1 + accel/tcg/cputlb.c | 1 + accel/tcg/user-exec.c | 1 + semihosting/uaccess.c | 1 + target/arm/helper.c | 1 + target/arm/ptw.c | 3 + target/arm/tcg/helper-a64.c | 1 + target/arm/tcg/mte_helper.c | 1 + target/arm/tcg/op_helper.c | 1 + target/arm/tcg/sve_helper.c | 1 + target/hexagon/op_helper.c | 1 + target/hppa/mem_helper.c | 1 + target/hppa/op_helper.c | 1 + target/i386/tcg/access.c | 1 + target/i386/tcg/seg_helper.c | 1 + target/i386/tcg/system/excp_helper.c | 1 + target/mips/tcg/msa_helper.c | 1 + target/ppc/mem_helper.c | 1 + target/riscv/op_helper.c | 1 + target/riscv/vector_helper.c | 1 + target/s390x/tcg/mem_helper.c | 1 + target/xtensa/mmu_helper.c | 1 + 24 files changed, 134 insertions(+), 100 deletions(-) create mode 100644 include/accel/tcg/probe.h diff --git a/include/accel/tcg/probe.h b/include/accel/tcg/probe.h new file mode 100644 index 00000000000..b748c00ba96 --- /dev/null +++ b/include/accel/tcg/probe.h @@ -0,0 +1,110 @@ +/* + * Probe guest virtual addresses for access permissions. + * + * Copyright (c) 2003 Fabrice Bellard + * SPDX-License-Identifier: LGPL-2.1-or-later + */ +#ifndef ACCEL_TCG_PROBE_H +#define ACCEL_TCG_PROBE_H + +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + +#include "exec/mmu-access-type.h" +#include "exec/vaddr.h" + +/** + * probe_access: + * @env: CPUArchState + * @addr: guest virtual address to look up + * @size: size of the access + * @access_type: read, write or execute permission + * @mmu_idx: MMU index to use for lookup + * @retaddr: return address for unwinding + * + * Look up the guest virtual address @addr. Raise an exception if the + * page does not satisfy @access_type. Raise an exception if the + * access (@addr, @size) hits a watchpoint. For writes, mark a clean + * page as dirty. + * + * Finally, return the host address for a page that is backed by RAM, + * or NULL if the page requires I/O. + */ +void *probe_access(CPUArchState *env, vaddr addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retad= dr); + +static inline void *probe_write(CPUArchState *env, vaddr addr, int size, + int mmu_idx, uintptr_t retaddr) +{ + return probe_access(env, addr, size, MMU_DATA_STORE, mmu_idx, retaddr); +} + +static inline void *probe_read(CPUArchState *env, vaddr addr, int size, + int mmu_idx, uintptr_t retaddr) +{ + return probe_access(env, addr, size, MMU_DATA_LOAD, mmu_idx, retaddr); +} + +/** + * probe_access_flags: + * @env: CPUArchState + * @addr: guest virtual address to look up + * @size: size of the access + * @access_type: read, write or execute permission + * @mmu_idx: MMU index to use for lookup + * @nonfault: suppress the fault + * @phost: return value for host address + * @retaddr: return address for unwinding + * + * Similar to probe_access, loosely returning the TLB_FLAGS_MASK for + * the page, and storing the host address for RAM in @phost. + * + * If @nonfault is set, do not raise an exception but return TLB_INVALID_M= ASK. + * Do not handle watchpoints, but include TLB_WATCHPOINT in the returned f= lags. + * Do handle clean pages, so exclude TLB_NOTDIRY from the returned flags. + * For simplicity, all "mmio-like" flags are folded to TLB_MMIO. + */ +int probe_access_flags(CPUArchState *env, vaddr addr, int size, + MMUAccessType access_type, int mmu_idx, + bool nonfault, void **phost, uintptr_t retaddr); + +#ifndef CONFIG_USER_ONLY + +/** + * probe_access_full: + * Like probe_access_flags, except also return into @pfull. + * + * The CPUTLBEntryFull structure returned via @pfull is transient + * and must be consumed or copied immediately, before any further + * access or changes to TLB @mmu_idx. + * + * This function will not fault if @nonfault is set, but will + * return TLB_INVALID_MASK if the page is not mapped, or is not + * accessible with @access_type. + * + * This function will return TLB_MMIO in order to force the access + * to be handled out-of-line if plugins wish to instrument the access. + */ +int probe_access_full(CPUArchState *env, vaddr addr, int size, + MMUAccessType access_type, int mmu_idx, + bool nonfault, void **phost, + CPUTLBEntryFull **pfull, uintptr_t retaddr); + +/** + * probe_access_full_mmu: + * Like probe_access_full, except: + * + * This function is intended to be used for page table accesses by + * the target mmu itself. Since such page walking happens while + * handling another potential mmu fault, this function never raises + * exceptions (akin to @nonfault true for probe_access_full). + * Likewise this function does not trigger plugin instrumentation. + */ +int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size, + MMUAccessType access_type, int mmu_idx, + void **phost, CPUTLBEntryFull **pfull); + +#endif /* !CONFIG_USER_ONLY */ + +#endif diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index b9eb9bc4b63..9ef7569a0b8 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -20,104 +20,4 @@ #ifndef EXEC_ALL_H #define EXEC_ALL_H =20 -#include "exec/hwaddr.h" -#include "exec/mmu-access-type.h" -#include "exec/vaddr.h" - -#if defined(CONFIG_TCG) - -/** - * probe_access: - * @env: CPUArchState - * @addr: guest virtual address to look up - * @size: size of the access - * @access_type: read, write or execute permission - * @mmu_idx: MMU index to use for lookup - * @retaddr: return address for unwinding - * - * Look up the guest virtual address @addr. Raise an exception if the - * page does not satisfy @access_type. Raise an exception if the - * access (@addr, @size) hits a watchpoint. For writes, mark a clean - * page as dirty. - * - * Finally, return the host address for a page that is backed by RAM, - * or NULL if the page requires I/O. - */ -void *probe_access(CPUArchState *env, vaddr addr, int size, - MMUAccessType access_type, int mmu_idx, uintptr_t retad= dr); - -static inline void *probe_write(CPUArchState *env, vaddr addr, int size, - int mmu_idx, uintptr_t retaddr) -{ - return probe_access(env, addr, size, MMU_DATA_STORE, mmu_idx, retaddr); -} - -static inline void *probe_read(CPUArchState *env, vaddr addr, int size, - int mmu_idx, uintptr_t retaddr) -{ - return probe_access(env, addr, size, MMU_DATA_LOAD, mmu_idx, retaddr); -} - -/** - * probe_access_flags: - * @env: CPUArchState - * @addr: guest virtual address to look up - * @size: size of the access - * @access_type: read, write or execute permission - * @mmu_idx: MMU index to use for lookup - * @nonfault: suppress the fault - * @phost: return value for host address - * @retaddr: return address for unwinding - * - * Similar to probe_access, loosely returning the TLB_FLAGS_MASK for - * the page, and storing the host address for RAM in @phost. - * - * If @nonfault is set, do not raise an exception but return TLB_INVALID_M= ASK. - * Do not handle watchpoints, but include TLB_WATCHPOINT in the returned f= lags. - * Do handle clean pages, so exclude TLB_NOTDIRY from the returned flags. - * For simplicity, all "mmio-like" flags are folded to TLB_MMIO. - */ -int probe_access_flags(CPUArchState *env, vaddr addr, int size, - MMUAccessType access_type, int mmu_idx, - bool nonfault, void **phost, uintptr_t retaddr); - -#ifndef CONFIG_USER_ONLY - -/** - * probe_access_full: - * Like probe_access_flags, except also return into @pfull. - * - * The CPUTLBEntryFull structure returned via @pfull is transient - * and must be consumed or copied immediately, before any further - * access or changes to TLB @mmu_idx. - * - * This function will not fault if @nonfault is set, but will - * return TLB_INVALID_MASK if the page is not mapped, or is not - * accessible with @access_type. - * - * This function will return TLB_MMIO in order to force the access - * to be handled out-of-line if plugins wish to instrument the access. - */ -int probe_access_full(CPUArchState *env, vaddr addr, int size, - MMUAccessType access_type, int mmu_idx, - bool nonfault, void **phost, - CPUTLBEntryFull **pfull, uintptr_t retaddr); - -/** - * probe_access_full_mmu: - * Like probe_access_full, except: - * - * This function is intended to be used for page table accesses by - * the target mmu itself. Since such page walking happens while - * handling another potential mmu fault, this function never raises - * exceptions (akin to @nonfault true for probe_access_full). - * Likewise this function does not trigger plugin instrumentation. - */ -int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size, - MMUAccessType access_type, int mmu_idx, - void **phost, CPUTLBEntryFull **pfull); - -#endif /* !CONFIG_USER_ONLY */ -#endif /* CONFIG_TCG */ - #endif diff --git a/target/hexagon/mmvec/macros.h b/target/hexagon/mmvec/macros.h index c1a88392c05..c7840fbf2e1 100644 --- a/target/hexagon/mmvec/macros.h +++ b/target/hexagon/mmvec/macros.h @@ -22,6 +22,7 @@ #include "arch.h" #include "mmvec/system_ext_mmvec.h" #include "accel/tcg/getpc.h" +#include "accel/tcg/probe.h" =20 #ifndef QEMU_GENERATE #define VdV (*(MMVector *restrict)(VdV_void)) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index d11989f5674..b346af942a0 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -21,6 +21,7 @@ #include "qemu/main-loop.h" #include "accel/tcg/cpu-ops.h" #include "accel/tcg/iommu.h" +#include "accel/tcg/probe.h" #include "exec/exec-all.h" #include "exec/page-protection.h" #include "system/memory.h" diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 43d005e24e4..697fdf18241 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -27,6 +27,7 @@ #include "qemu/bitops.h" #include "qemu/rcu.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/probe.h" #include "user/cpu_loop.h" #include "qemu/main-loop.h" #include "user/page-protection.h" diff --git a/semihosting/uaccess.c b/semihosting/uaccess.c index 81ffecaaba4..ebbb300f86a 100644 --- a/semihosting/uaccess.c +++ b/semihosting/uaccess.c @@ -9,6 +9,7 @@ =20 #include "qemu/osdep.h" #include "accel/tcg/cpu-mmu-index.h" +#include "accel/tcg/probe.h" #include "exec/exec-all.h" #include "exec/target_page.h" #include "exec/tlb-flags.h" diff --git a/target/arm/helper.c b/target/arm/helper.c index c6fd2900126..2f039b2db33 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -30,6 +30,7 @@ #include "qapi/error.h" #include "qemu/guest-random.h" #ifdef CONFIG_TCG +#include "accel/tcg/probe.h" #include "semihosting/common-semi.h" #endif #include "cpregs.h" diff --git a/target/arm/ptw.c b/target/arm/ptw.c index e0e82ae507f..58f1cd0b34c 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -14,6 +14,9 @@ #include "exec/page-protection.h" #include "exec/target_page.h" #include "exec/tlb-flags.h" +#ifdef CONFIG_TCG +#include "accel/tcg/probe.h" +#endif #include "cpu.h" #include "internals.h" #include "cpu-features.h" diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c index 08d8f63ffea..ac86629432a 100644 --- a/target/arm/tcg/helper-a64.c +++ b/target/arm/tcg/helper-a64.c @@ -31,6 +31,7 @@ #include "exec/cpu-common.h" #include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/probe.h" #include "exec/target_page.h" #include "exec/tlb-flags.h" #include "qemu/int128.h" diff --git a/target/arm/tcg/mte_helper.c b/target/arm/tcg/mte_helper.c index 7dc5fb776b3..8fbdcc8fb95 100644 --- a/target/arm/tcg/mte_helper.c +++ b/target/arm/tcg/mte_helper.c @@ -30,6 +30,7 @@ #include "system/ram_addr.h" #endif #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/probe.h" #include "exec/helper-proto.h" #include "exec/tlb-flags.h" #include "accel/tcg/cpu-ops.h" diff --git a/target/arm/tcg/op_helper.c b/target/arm/tcg/op_helper.c index 38d49cbb9d8..d50b8720ad6 100644 --- a/target/arm/tcg/op_helper.c +++ b/target/arm/tcg/op_helper.c @@ -25,6 +25,7 @@ #include "cpu-features.h" #include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/probe.h" #include "cpregs.h" =20 #define SIGNBIT (uint32_t)0x80000000 diff --git a/target/arm/tcg/sve_helper.c b/target/arm/tcg/sve_helper.c index 87b6b4b3e64..50aca54eaa3 100644 --- a/target/arm/tcg/sve_helper.c +++ b/target/arm/tcg/sve_helper.c @@ -32,6 +32,7 @@ #include "sve_ldst_internal.h" #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/cpu-ops.h" +#include "accel/tcg/probe.h" #ifdef CONFIG_USER_ONLY #include "user/page-protection.h" #endif diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index 3f3d86db2b2..dd726b43187 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -19,6 +19,7 @@ #include "qemu/log.h" #include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/probe.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" #include "cpu.h" diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index 554d7bf4d14..a5f73aedf82 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -23,6 +23,7 @@ #include "exec/exec-all.h" #include "exec/cputlb.h" #include "accel/tcg/cpu-mmu-index.h" +#include "accel/tcg/probe.h" #include "exec/page-protection.h" #include "exec/target_page.h" #include "exec/helper-proto.h" diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 2398ce2c648..32207c1a4c8 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -23,6 +23,7 @@ #include "exec/exec-all.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/probe.h" #include "qemu/timer.h" #include "trace.h" #ifdef CONFIG_USER_ONLY diff --git a/target/i386/tcg/access.c b/target/i386/tcg/access.c index 0fdd587eddf..ee5b4514597 100644 --- a/target/i386/tcg/access.c +++ b/target/i386/tcg/access.c @@ -4,6 +4,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/probe.h" #include "exec/exec-all.h" #include "exec/target_page.h" #include "access.h" diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c index 3af902e0ec5..e45d71fa1ad 100644 --- a/target/i386/tcg/seg_helper.c +++ b/target/i386/tcg/seg_helper.c @@ -24,6 +24,7 @@ #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/probe.h" #include "exec/log.h" #include "helper-tcg.h" #include "seg_helper.h" diff --git a/target/i386/tcg/system/excp_helper.c b/target/i386/tcg/system/= excp_helper.c index 93614aa3e54..c1626215877 100644 --- a/target/i386/tcg/system/excp_helper.c +++ b/target/i386/tcg/system/excp_helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/probe.h" #include "exec/cputlb.h" #include "exec/page-protection.h" #include "exec/target_page.h" diff --git a/target/mips/tcg/msa_helper.c b/target/mips/tcg/msa_helper.c index 14de4a71ff6..4d9a4468e53 100644 --- a/target/mips/tcg/msa_helper.c +++ b/target/mips/tcg/msa_helper.c @@ -23,6 +23,7 @@ #include "tcg/tcg.h" #include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/probe.h" #include "exec/helper-proto.h" #include "exec/memop.h" #include "exec/target_page.h" diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index d7e8d678f4b..50f05a915ed 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -25,6 +25,7 @@ #include "exec/helper-proto.h" #include "helper_regs.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/probe.h" #include "internal.h" #include "qemu/atomic128.h" =20 diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 5b0db2c45ab..abb1d284dce 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -24,6 +24,7 @@ #include "exec/exec-all.h" #include "exec/cputlb.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/probe.h" #include "exec/helper-proto.h" #include "exec/tlb-flags.h" #include "trace.h" diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index b8ae7044578..5ccb294e319 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -23,6 +23,7 @@ #include "exec/memop.h" #include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/probe.h" #include "exec/page-protection.h" #include "exec/helper-proto.h" #include "exec/tlb-flags.h" diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index 0cdfd380ce4..9e77cde81bd 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -29,6 +29,7 @@ #include "exec/cputlb.h" #include "exec/page-protection.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/probe.h" #include "exec/target_page.h" #include "exec/tlb-flags.h" #include "accel/tcg/cpu-ops.h" diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c index a7dd8100555..182c6e35c17 100644 --- a/target/xtensa/mmu_helper.c +++ b/target/xtensa/mmu_helper.c @@ -34,6 +34,7 @@ #include "qemu/host-utils.h" #include "exec/cputlb.h" #include "accel/tcg/cpu-mmu-index.h" +#include "accel/tcg/probe.h" #include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/target_page.h" --=20 2.47.1 From nobody Sat Nov 15 23:34:40 2025 Delivered-To: importer@patchew.org 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Mechanical change running: $ sed -i '/exec\/exec-all.h/d' $(git grep -wl exec/exec-all.h) Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Mark Cave-Ayland --- MAINTAINERS | 1 - bsd-user/qemu.h | 1 - include/exec/exec-all.h | 23 ----------------------- include/system/ram_addr.h | 1 - linux-user/user-internals.h | 1 - target/arm/tcg/translate.h | 1 - target/i386/tcg/helper-tcg.h | 1 - accel/hvf/hvf-accel-ops.c | 1 - accel/tcg/cputlb.c | 1 - accel/tcg/translate-all.c | 1 - accel/tcg/user-exec.c | 1 - bsd-user/main.c | 1 - hw/ppc/spapr_nested.c | 1 - hw/riscv/riscv-iommu-sys.c | 1 - hw/sh4/sh7750.c | 1 - linux-user/main.c | 1 - semihosting/uaccess.c | 1 - system/physmem.c | 1 - target/alpha/cpu.c | 1 - target/alpha/fpu_helper.c | 1 - target/alpha/int_helper.c | 1 - target/alpha/mem_helper.c | 1 - target/alpha/translate.c | 1 - target/alpha/vax_helper.c | 1 - target/arm/cpu.c | 1 - target/arm/debug_helper.c | 1 - target/arm/helper.c | 1 - target/arm/ptw.c | 1 - target/arm/tcg/helper-a64.c | 1 - target/arm/tcg/m_helper.c | 1 - target/arm/tcg/mte_helper.c | 1 - target/arm/tcg/mve_helper.c | 1 - target/arm/tcg/op_helper.c | 1 - target/arm/tcg/pauth_helper.c | 1 - target/arm/tcg/sme_helper.c | 1 - target/arm/tcg/sve_helper.c | 1 - target/arm/tcg/tlb_helper.c | 1 - target/arm/tcg/translate-a64.c | 1 - target/avr/cpu.c | 1 - target/avr/translate.c | 1 - target/hexagon/cpu.c | 1 - target/hexagon/op_helper.c | 1 - target/hppa/cpu.c | 1 - target/hppa/fpu_helper.c | 1 - target/hppa/helper.c | 1 - target/hppa/mem_helper.c | 1 - target/hppa/op_helper.c | 1 - target/hppa/sys_helper.c | 1 - target/hppa/translate.c | 1 - target/i386/tcg/access.c | 1 - target/i386/tcg/excp_helper.c | 1 - target/i386/tcg/int_helper.c | 1 - target/i386/tcg/mem_helper.c | 1 - target/i386/tcg/mpx_helper.c | 1 - target/i386/tcg/seg_helper.c | 1 - target/i386/tcg/system/bpt_helper.c | 1 - target/i386/tcg/translate.c | 1 - target/i386/tcg/user/excp_helper.c | 1 - target/i386/tcg/user/seg_helper.c | 1 - target/loongarch/cpu.c | 1 - target/loongarch/tcg/fpu_helper.c | 1 - target/loongarch/tcg/iocsr_helper.c | 1 - target/loongarch/tcg/op_helper.c | 1 - target/loongarch/tcg/tlb_helper.c | 1 - target/loongarch/tcg/vec_helper.c | 1 - target/m68k/fpu_helper.c | 1 - target/m68k/helper.c | 1 - target/m68k/op_helper.c | 1 - target/m68k/translate.c | 1 - target/microblaze/cpu.c | 1 - target/microblaze/op_helper.c | 1 - target/microblaze/translate.c | 1 - target/mips/cpu.c | 1 - target/mips/system/physaddr.c | 1 - target/mips/tcg/exception.c | 1 - target/mips/tcg/fpu_helper.c | 1 - target/mips/tcg/ldst_helper.c | 1 - target/mips/tcg/msa_helper.c | 1 - target/mips/tcg/op_helper.c | 1 - target/mips/tcg/system/special_helper.c | 1 - target/mips/tcg/system/tlb_helper.c | 1 - target/openrisc/cpu.c | 1 - target/openrisc/exception.c | 1 - target/openrisc/exception_helper.c | 1 - target/openrisc/fpu_helper.c | 1 - target/openrisc/interrupt.c | 1 - target/openrisc/interrupt_helper.c | 1 - target/openrisc/sys_helper.c | 1 - target/openrisc/translate.c | 1 - target/ppc/excp_helper.c | 1 - target/ppc/fpu_helper.c | 1 - target/ppc/machine.c | 1 - target/ppc/mem_helper.c | 1 - target/ppc/misc_helper.c | 1 - target/ppc/mmu-hash32.c | 1 - target/ppc/mmu-hash64.c | 1 - target/ppc/mmu-radix64.c | 1 - target/ppc/mmu_common.c | 1 - target/ppc/mmu_helper.c | 1 - target/ppc/power8-pmu.c | 1 - target/ppc/tcg-excp_helper.c | 1 - target/ppc/timebase_helper.c | 1 - target/ppc/translate.c | 1 - target/ppc/user_only_helper.c | 1 - target/riscv/cpu.c | 1 - target/riscv/cpu_helper.c | 1 - target/riscv/crypto_helper.c | 1 - target/riscv/csr.c | 1 - target/riscv/debug.c | 1 - target/riscv/fpu_helper.c | 1 - target/riscv/m128_helper.c | 1 - target/riscv/op_helper.c | 1 - target/riscv/tcg/tcg-cpu.c | 1 - target/riscv/translate.c | 1 - target/riscv/vcrypto_helper.c | 1 - target/riscv/vector_helper.c | 1 - target/riscv/zce_helper.c | 1 - target/rx/op_helper.c | 1 - target/rx/translate.c | 1 - target/s390x/interrupt.c | 1 - target/s390x/mmu_helper.c | 1 - target/s390x/sigp.c | 1 - target/s390x/tcg/cc_helper.c | 1 - target/s390x/tcg/crypto_helper.c | 1 - target/s390x/tcg/excp_helper.c | 1 - target/s390x/tcg/fpu_helper.c | 1 - target/s390x/tcg/int_helper.c | 1 - target/s390x/tcg/mem_helper.c | 1 - target/s390x/tcg/misc_helper.c | 1 - target/s390x/tcg/translate.c | 1 - target/s390x/tcg/vec_fpu_helper.c | 1 - target/s390x/tcg/vec_helper.c | 1 - target/sh4/cpu.c | 1 - target/sh4/helper.c | 1 - target/sh4/op_helper.c | 1 - target/sh4/translate.c | 1 - target/sparc/cpu.c | 1 - target/sparc/fop_helper.c | 1 - target/sparc/helper.c | 1 - target/sparc/ldst_helper.c | 1 - target/sparc/machine.c | 1 - target/sparc/translate.c | 1 - target/sparc/win_helper.c | 1 - target/tricore/cpu.c | 1 - target/tricore/op_helper.c | 1 - target/tricore/translate.c | 1 - target/xtensa/dbg_helper.c | 1 - target/xtensa/exc_helper.c | 1 - target/xtensa/fpu_helper.c | 1 - target/xtensa/mmu_helper.c | 1 - target/xtensa/op_helper.c | 1 - target/xtensa/translate.c | 1 - target/xtensa/win_helper.c | 1 - 153 files changed, 175 deletions(-) delete mode 100644 include/exec/exec-all.h diff --git a/MAINTAINERS b/MAINTAINERS index 3a37cc73af7..9e677a26c52 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -493,7 +493,6 @@ M: Richard Henderson R: Paolo Bonzini S: Maintained F: include/exec/cpu*.h -F: include/exec/exec-all.h F: include/exec/target_long.h F: include/qemu/accel.h F: include/system/accel-*.h diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h index 244670dd24d..93388e7c34e 100644 --- a/bsd-user/qemu.h +++ b/bsd-user/qemu.h @@ -23,7 +23,6 @@ #include "cpu.h" #include "qemu/units.h" #include "accel/tcg/cpu-ldst.h" -#include "exec/exec-all.h" =20 #include "user/abitypes.h" #include "user/cpu_loop.h" diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h deleted file mode 100644 index 9ef7569a0b8..00000000000 --- a/include/exec/exec-all.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * internal execution defines for qemu - * - * Copyright (c) 2003 Fabrice Bellard - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ - -#ifndef EXEC_ALL_H -#define EXEC_ALL_H - -#endif diff --git a/include/system/ram_addr.h b/include/system/ram_addr.h index b4e4425acbb..15a1b1a4fa2 100644 --- a/include/system/ram_addr.h +++ b/include/system/ram_addr.h @@ -24,7 +24,6 @@ #include "exec/cputlb.h" #include "exec/ramlist.h" #include "system/ramblock.h" -#include "exec/exec-all.h" #include "system/memory.h" #include "exec/target_page.h" #include "qemu/rcu.h" diff --git a/linux-user/user-internals.h b/linux-user/user-internals.h index 4aa253b5663..691b9a1775f 100644 --- a/linux-user/user-internals.h +++ b/linux-user/user-internals.h @@ -19,7 +19,6 @@ #define LINUX_USER_USER_INTERNALS_H =20 #include "user/thunk.h" -#include "exec/exec-all.h" #include "qemu/log.h" =20 extern char *exec_path; diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h index 53e485d28ac..1bfdb0fb9bb 100644 --- a/target/arm/tcg/translate.h +++ b/target/arm/tcg/translate.h @@ -4,7 +4,6 @@ #include "cpu.h" #include "tcg/tcg-op.h" #include "tcg/tcg-op-gvec.h" -#include "exec/exec-all.h" #include "exec/translator.h" #include "exec/translation-block.h" #include "exec/helper-gen.h" diff --git a/target/i386/tcg/helper-tcg.h b/target/i386/tcg/helper-tcg.h index 54d845379cd..6b3f19855f1 100644 --- a/target/i386/tcg/helper-tcg.h +++ b/target/i386/tcg/helper-tcg.h @@ -20,7 +20,6 @@ #ifndef I386_HELPER_TCG_H #define I386_HELPER_TCG_H =20 -#include "exec/exec-all.h" #include "qemu/host-utils.h" =20 /* Maximum instruction code size */ diff --git a/accel/hvf/hvf-accel-ops.c b/accel/hvf/hvf-accel-ops.c index 601c3bc0ac6..bbd774dbc94 100644 --- a/accel/hvf/hvf-accel-ops.c +++ b/accel/hvf/hvf-accel-ops.c @@ -51,7 +51,6 @@ #include "qemu/error-report.h" #include "qemu/main-loop.h" #include "system/address-spaces.h" -#include "exec/exec-all.h" #include "gdbstub/enums.h" #include "hw/boards.h" #include "system/accel-ops.h" diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index b346af942a0..5b6d6f79751 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -22,7 +22,6 @@ #include "accel/tcg/cpu-ops.h" #include "accel/tcg/iommu.h" #include "accel/tcg/probe.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "system/memory.h" #include "accel/tcg/cpu-ldst.h" diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 0408e2522a8..31c7f9927f2 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -21,7 +21,6 @@ =20 #include "trace.h" #include "disas/disas.h" -#include "exec/exec-all.h" #include "tcg/tcg.h" #if defined(CONFIG_USER_ONLY) #include "qemu.h" diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 697fdf18241..70feee8df99 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -21,7 +21,6 @@ #include "disas/disas.h" #include "cpu.h" #include "exec/vaddr.h" -#include "exec/exec-all.h" #include "exec/tlb-flags.h" #include "tcg/tcg.h" #include "qemu/bitops.h" diff --git a/bsd-user/main.c b/bsd-user/main.c index fdb160bed0f..fa7645a56ea 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -36,7 +36,6 @@ #include "qemu/help_option.h" #include "qemu/module.h" #include "qemu/plugin.h" -#include "exec/exec-all.h" #include "user/guest-base.h" #include "user/page-protection.h" #include "tcg/startup.h" diff --git a/hw/ppc/spapr_nested.c b/hw/ppc/spapr_nested.c index a79e398c132..9cc6083feee 100644 --- a/hw/ppc/spapr_nested.c +++ b/hw/ppc/spapr_nested.c @@ -1,6 +1,5 @@ #include "qemu/osdep.h" #include "qemu/cutils.h" -#include "exec/exec-all.h" #include "exec/cputlb.h" #include "exec/target_long.h" #include "helper_regs.h" diff --git a/hw/riscv/riscv-iommu-sys.c b/hw/riscv/riscv-iommu-sys.c index 65b24fb07de..bbe839ed241 100644 --- a/hw/riscv/riscv-iommu-sys.c +++ b/hw/riscv/riscv-iommu-sys.c @@ -26,7 +26,6 @@ #include "qemu/host-utils.h" #include "qemu/module.h" #include "qom/object.h" -#include "exec/exec-all.h" #include "trace.h" =20 #include "riscv-iommu.h" diff --git a/hw/sh4/sh7750.c b/hw/sh4/sh7750.c index 41306fb6008..300eabc595d 100644 --- a/hw/sh4/sh7750.c +++ b/hw/sh4/sh7750.c @@ -36,7 +36,6 @@ #include "sh7750_regnames.h" #include "hw/sh4/sh_intc.h" #include "hw/timer/tmu012.h" -#include "exec/exec-all.h" #include "exec/cputlb.h" #include "trace.h" =20 diff --git a/linux-user/main.c b/linux-user/main.c index e2ec5970bed..4af7f49f383 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -40,7 +40,6 @@ #include "qemu/plugin.h" #include "user/guest-base.h" #include "user/page-protection.h" -#include "exec/exec-all.h" #include "exec/gdbstub.h" #include "gdbstub/user.h" #include "tcg/startup.h" diff --git a/semihosting/uaccess.c b/semihosting/uaccess.c index ebbb300f86a..4554844e15b 100644 --- a/semihosting/uaccess.c +++ b/semihosting/uaccess.c @@ -10,7 +10,6 @@ #include "qemu/osdep.h" #include "accel/tcg/cpu-mmu-index.h" #include "accel/tcg/probe.h" -#include "exec/exec-all.h" #include "exec/target_page.h" #include "exec/tlb-flags.h" #include "semihosting/uaccess.h" diff --git a/system/physmem.c b/system/physmem.c index f1ec0902c78..3f4fd69d9a5 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -32,7 +32,6 @@ #include "accel/tcg/iommu.h" #endif /* CONFIG_TCG */ =20 -#include "exec/exec-all.h" #include "exec/cputlb.h" #include "exec/page-protection.h" #include "exec/target_page.h" diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 35fb145d27f..cb3f382dc64 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -23,7 +23,6 @@ #include "qapi/error.h" #include "qemu/qemu-print.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "exec/target_page.h" #include "fpu/softfloat.h" diff --git a/target/alpha/fpu_helper.c b/target/alpha/fpu_helper.c index 6aefb9b851a..30f3c7fd185 100644 --- a/target/alpha/fpu_helper.c +++ b/target/alpha/fpu_helper.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" =20 diff --git a/target/alpha/int_helper.c b/target/alpha/int_helper.c index 5672696f6f1..6bfe63500e0 100644 --- a/target/alpha/int_helper.c +++ b/target/alpha/int_helper.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" =20 diff --git a/target/alpha/mem_helper.c b/target/alpha/mem_helper.c index a4d5adb40c6..2113fe33ae2 100644 --- a/target/alpha/mem_helper.c +++ b/target/alpha/mem_helper.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" =20 static void do_unaligned_access(CPUAlphaState *env, vaddr addr, uintptr_t = retaddr) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 7f3195a5dcc..cebab0318cf 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -21,7 +21,6 @@ #include "cpu.h" #include "system/cpus.h" #include "qemu/host-utils.h" -#include "exec/exec-all.h" #include "tcg/tcg-op.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" diff --git a/target/alpha/vax_helper.c b/target/alpha/vax_helper.c index f94fb519dbd..c1d201e7b4d 100644 --- a/target/alpha/vax_helper.c +++ b/target/alpha/vax_helper.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" =20 diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 377791c84dd..e149a462505 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -33,7 +33,6 @@ #endif /* CONFIG_TCG */ #include "internals.h" #include "cpu-features.h" -#include "exec/exec-all.h" #include "exec/target_page.h" #include "hw/qdev-properties.h" #if !defined(CONFIG_USER_ONLY) diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c index 473ee2af38e..de7999f6a94 100644 --- a/target/arm/debug_helper.c +++ b/target/arm/debug_helper.c @@ -11,7 +11,6 @@ #include "internals.h" #include "cpu-features.h" #include "cpregs.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "exec/watchpoint.h" #include "system/tcg.h" diff --git a/target/arm/helper.c b/target/arm/helper.c index 2f039b2db33..8de4eb2c1fa 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -20,7 +20,6 @@ #include "qemu/bitops.h" #include "qemu/qemu-print.h" #include "exec/cputlb.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "hw/irq.h" #include "system/cpu-timers.h" diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 58f1cd0b34c..894120c9aea 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -10,7 +10,6 @@ #include "qemu/log.h" #include "qemu/range.h" #include "qemu/main-loop.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/target_page.h" #include "exec/tlb-flags.h" diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c index ac86629432a..590717ecd8c 100644 --- a/target/arm/tcg/helper-a64.c +++ b/target/arm/tcg/helper-a64.c @@ -29,7 +29,6 @@ #include "internals.h" #include "qemu/crc32c.h" #include "exec/cpu-common.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/probe.h" #include "exec/target_page.h" diff --git a/target/arm/tcg/m_helper.c b/target/arm/tcg/m_helper.c index 37dc98dc35c..6614719832e 100644 --- a/target/arm/tcg/m_helper.c +++ b/target/arm/tcg/m_helper.c @@ -15,7 +15,6 @@ #include "qemu/main-loop.h" #include "qemu/bitops.h" #include "qemu/log.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #ifdef CONFIG_TCG #include "accel/tcg/cpu-ldst.h" diff --git a/target/arm/tcg/mte_helper.c b/target/arm/tcg/mte_helper.c index 8fbdcc8fb95..13d7ac00972 100644 --- a/target/arm/tcg/mte_helper.c +++ b/target/arm/tcg/mte_helper.c @@ -21,7 +21,6 @@ #include "qemu/log.h" #include "cpu.h" #include "internals.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #ifdef CONFIG_USER_ONLY #include "user/cpu_loop.h" diff --git a/target/arm/tcg/mve_helper.c b/target/arm/tcg/mve_helper.c index f9f67d1f88e..506d1c34757 100644 --- a/target/arm/tcg/mve_helper.c +++ b/target/arm/tcg/mve_helper.c @@ -23,7 +23,6 @@ #include "vec_internal.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" -#include "exec/exec-all.h" #include "tcg/tcg.h" #include "fpu/softfloat.h" #include "crypto/clmul.h" diff --git a/target/arm/tcg/op_helper.c b/target/arm/tcg/op_helper.c index d50b8720ad6..dc3f83c37dc 100644 --- a/target/arm/tcg/op_helper.c +++ b/target/arm/tcg/op_helper.c @@ -23,7 +23,6 @@ #include "exec/target_page.h" #include "internals.h" #include "cpu-features.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/probe.h" #include "cpregs.h" diff --git a/target/arm/tcg/pauth_helper.c b/target/arm/tcg/pauth_helper.c index 59bf27541dc..c591c3052c3 100644 --- a/target/arm/tcg/pauth_helper.c +++ b/target/arm/tcg/pauth_helper.c @@ -21,7 +21,6 @@ #include "cpu.h" #include "internals.h" #include "cpu-features.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "exec/helper-proto.h" #include "tcg/tcg-gvec-desc.h" diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c index 96b84c37a2d..3226895cae3 100644 --- a/target/arm/tcg/sme_helper.c +++ b/target/arm/tcg/sme_helper.c @@ -23,7 +23,6 @@ #include "tcg/tcg-gvec-desc.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" -#include "exec/exec-all.h" #include "qemu/int128.h" #include "fpu/softfloat.h" #include "vec_internal.h" diff --git a/target/arm/tcg/sve_helper.c b/target/arm/tcg/sve_helper.c index 50aca54eaa3..9f20ecb51d3 100644 --- a/target/arm/tcg/sve_helper.c +++ b/target/arm/tcg/sve_helper.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internals.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/helper-proto.h" #include "exec/target_page.h" diff --git a/target/arm/tcg/tlb_helper.c b/target/arm/tcg/tlb_helper.c index 8841f039bc6..5ea4d6590f2 100644 --- a/target/arm/tcg/tlb_helper.c +++ b/target/arm/tcg/tlb_helper.c @@ -9,7 +9,6 @@ #include "cpu.h" #include "internals.h" #include "cpu-features.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" =20 =20 diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 43408c71bbd..11053f083a0 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -17,7 +17,6 @@ * License along with this library; if not, see . */ #include "qemu/osdep.h" -#include "exec/exec-all.h" #include "exec/target_page.h" #include "translate.h" #include "translate-a64.h" diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 84f3b839c9b..86e53ef9f65 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -21,7 +21,6 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu/qemu-print.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "system/address-spaces.h" #include "cpu.h" diff --git a/target/avr/translate.c b/target/avr/translate.c index b9c592c899a..804b0b21dbd 100644 --- a/target/avr/translate.c +++ b/target/avr/translate.c @@ -22,7 +22,6 @@ #include "qemu/qemu-print.h" #include "tcg/tcg.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "tcg/tcg-op.h" #include "exec/helper-proto.h" diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 3c5191282ea..9f93c170092 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -19,7 +19,6 @@ #include "qemu/qemu-print.h" #include "cpu.h" #include "internal.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "qapi/error.h" #include "hw/qdev-properties.h" diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index dd726b43187..444799d3ade 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -17,7 +17,6 @@ =20 #include "qemu/osdep.h" #include "qemu/log.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/probe.h" #include "exec/helper-proto.h" diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 10e18c945ef..6acbf3de27a 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -24,7 +24,6 @@ #include "qemu/timer.h" #include "cpu.h" #include "qemu/module.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "exec/target_page.h" #include "fpu/softfloat.h" diff --git a/target/hppa/fpu_helper.c b/target/hppa/fpu_helper.c index a62d9d30831..ddd0a343d63 100644 --- a/target/hppa/fpu_helper.c +++ b/target/hppa/fpu_helper.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" =20 diff --git a/target/hppa/helper.c b/target/hppa/helper.c index ac7f58f0afe..d7f8495d982 100644 --- a/target/hppa/helper.c +++ b/target/hppa/helper.c @@ -21,7 +21,6 @@ #include "qemu/log.h" #include "cpu.h" #include "fpu/softfloat.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qemu/qemu-print.h" #include "hw/hppa/hppa_hardware.h" diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index a5f73aedf82..9bdd0a6f23d 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/cputlb.h" #include "accel/tcg/cpu-mmu-index.h" #include "accel/tcg/probe.h" diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 32207c1a4c8..0458378abb2 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/probe.h" diff --git a/target/hppa/sys_helper.c b/target/hppa/sys_helper.c index 052a6a88a27..6e65fadcc7b 100644 --- a/target/hppa/sys_helper.c +++ b/target/hppa/sys_helper.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qemu/timer.h" #include "system/runstate.h" diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 14f38333222..156c3dedd18 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "qemu/host-utils.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "tcg/tcg-op.h" #include "tcg/tcg-op-gvec.h" diff --git a/target/i386/tcg/access.c b/target/i386/tcg/access.c index ee5b4514597..97e3f0e7568 100644 --- a/target/i386/tcg/access.c +++ b/target/i386/tcg/access.c @@ -5,7 +5,6 @@ #include "cpu.h" #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/probe.h" -#include "exec/exec-all.h" #include "exec/target_page.h" #include "access.h" =20 diff --git a/target/i386/tcg/excp_helper.c b/target/i386/tcg/excp_helper.c index de71e68f986..6fb8036d988 100644 --- a/target/i386/tcg/excp_helper.c +++ b/target/i386/tcg/excp_helper.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "qemu/log.h" #include "system/runstate.h" #include "exec/helper-proto.h" diff --git a/target/i386/tcg/int_helper.c b/target/i386/tcg/int_helper.c index 1a02e9d8434..46741d9f68a 100644 --- a/target/i386/tcg/int_helper.c +++ b/target/i386/tcg/int_helper.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "cpu.h" -#include "exec/exec-all.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" #include "qapi/error.h" diff --git a/target/i386/tcg/mem_helper.c b/target/i386/tcg/mem_helper.c index 84a08152171..9e7c2d80293 100644 --- a/target/i386/tcg/mem_helper.c +++ b/target/i386/tcg/mem_helper.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "qemu/int128.h" #include "qemu/atomic128.h" diff --git a/target/i386/tcg/mpx_helper.c b/target/i386/tcg/mpx_helper.c index a0f816dfae0..fa8abcc4820 100644 --- a/target/i386/tcg/mpx_helper.c +++ b/target/i386/tcg/mpx_helper.c @@ -21,7 +21,6 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" -#include "exec/exec-all.h" #include "exec/target_page.h" #include "helper-tcg.h" =20 diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c index e45d71fa1ad..0ca081b286d 100644 --- a/target/i386/tcg/seg_helper.c +++ b/target/i386/tcg/seg_helper.c @@ -22,7 +22,6 @@ #include "cpu.h" #include "qemu/log.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/probe.h" #include "exec/log.h" diff --git a/target/i386/tcg/system/bpt_helper.c b/target/i386/tcg/system/b= pt_helper.c index 08ccd3f5e69..aebb5caac37 100644 --- a/target/i386/tcg/system/bpt_helper.c +++ b/target/i386/tcg/system/bpt_helper.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "exec/watchpoint.h" #include "tcg/helper-tcg.h" diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 1dcc35f5dfa..6eaa0457314 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -21,7 +21,6 @@ #include "qemu/host-utils.h" #include "cpu.h" #include "accel/tcg/cpu-mmu-index.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "tcg/tcg-op.h" #include "tcg/tcg-op-gvec.h" diff --git a/target/i386/tcg/user/excp_helper.c b/target/i386/tcg/user/excp= _helper.c index b3bdb7831a7..98fab4cbc3f 100644 --- a/target/i386/tcg/user/excp_helper.c +++ b/target/i386/tcg/user/excp_helper.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "tcg/helper-tcg.h" =20 void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr, diff --git a/target/i386/tcg/user/seg_helper.c b/target/i386/tcg/user/seg_h= elper.c index 5692dd51953..263f59937fe 100644 --- a/target/i386/tcg/user/seg_helper.c +++ b/target/i386/tcg/user/seg_helper.c @@ -21,7 +21,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "tcg/helper-tcg.h" #include "tcg/seg_helper.h" diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index fe9462b3b7e..b6f89f0f392 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -15,7 +15,6 @@ #include "system/kvm.h" #include "kvm/kvm_loongarch.h" #include "hw/qdev-properties.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "cpu.h" #include "internals.h" diff --git a/target/loongarch/tcg/fpu_helper.c b/target/loongarch/tcg/fpu_h= elper.c index fc3fd0561e3..fc9c64c20a8 100644 --- a/target/loongarch/tcg/fpu_helper.c +++ b/target/loongarch/tcg/fpu_helper.c @@ -8,7 +8,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "fpu/softfloat.h" #include "internals.h" diff --git a/target/loongarch/tcg/iocsr_helper.c b/target/loongarch/tcg/ioc= sr_helper.c index e62170de3ce..c155f48564d 100644 --- a/target/loongarch/tcg/iocsr_helper.c +++ b/target/loongarch/tcg/iocsr_helper.c @@ -9,7 +9,6 @@ #include "cpu.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" =20 #define GET_MEMTXATTRS(cas) \ diff --git a/target/loongarch/tcg/op_helper.c b/target/loongarch/tcg/op_hel= per.c index 94e3b28016a..16ac0d43bc9 100644 --- a/target/loongarch/tcg/op_helper.c +++ b/target/loongarch/tcg/op_helper.c @@ -10,7 +10,6 @@ #include "cpu.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "internals.h" #include "qemu/crc32c.h" diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_h= elper.c index 9a76a2a205f..1d5ba567b97 100644 --- a/target/loongarch/tcg/tlb_helper.c +++ b/target/loongarch/tcg/tlb_helper.c @@ -13,7 +13,6 @@ #include "internals.h" #include "exec/helper-proto.h" #include "exec/cputlb.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/target_page.h" #include "accel/tcg/cpu-ldst.h" diff --git a/target/loongarch/tcg/vec_helper.c b/target/loongarch/tcg/vec_h= elper.c index 3faf52cbc46..a270998e638 100644 --- a/target/loongarch/tcg/vec_helper.c +++ b/target/loongarch/tcg/vec_helper.c @@ -7,7 +7,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" #include "internals.h" diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index ac4a0d85be5..56012863c85 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -21,7 +21,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "softfloat.h" =20 diff --git a/target/m68k/helper.c b/target/m68k/helper.c index f73e0def234..5479acc5b99 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -21,7 +21,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/cputlb.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/target_page.h" #include "exec/gdbstub.h" diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 242aecccbbc..f29ae12af84 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -20,7 +20,6 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "semihosting/semihost.h" =20 diff --git a/target/m68k/translate.c b/target/m68k/translate.c index b1266a7875b..97afceb1297 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -20,7 +20,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "exec/target_page.h" #include "tcg/tcg-op.h" diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index edfb05758b3..658d3cb3d7b 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -27,7 +27,6 @@ #include "cpu.h" #include "qemu/module.h" #include "hw/qdev-properties.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "exec/gdbstub.h" #include "exec/translation-block.h" diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c index 4624ce5b672..9e838dfa153 100644 --- a/target/microblaze/op_helper.c +++ b/target/microblaze/op_helper.c @@ -23,7 +23,6 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "fpu/softfloat.h" =20 diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 7dcad6cf0d7..ad4a85407d0 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -20,7 +20,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "tcg/tcg-op.h" #include "exec/helper-proto.h" diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 473cecdebca..26f4f038cde 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -29,7 +29,6 @@ #include "qemu/module.h" #include "system/kvm.h" #include "system/qtest.h" -#include "exec/exec-all.h" #include "hw/qdev-properties.h" #include "hw/qdev-clock.h" #include "fpu_helper.h" diff --git a/target/mips/system/physaddr.c b/target/mips/system/physaddr.c index 505781d84c1..b8e1a5ac98e 100644 --- a/target/mips/system/physaddr.c +++ b/target/mips/system/physaddr.c @@ -18,7 +18,6 @@ */ #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "../internal.h" =20 diff --git a/target/mips/tcg/exception.c b/target/mips/tcg/exception.c index 1a8902ea1bc..d32bcebf469 100644 --- a/target/mips/tcg/exception.c +++ b/target/mips/tcg/exception.c @@ -23,7 +23,6 @@ #include "cpu.h" #include "internal.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" =20 target_ulong exception_resume_pc(CPUMIPSState *env) diff --git a/target/mips/tcg/fpu_helper.c b/target/mips/tcg/fpu_helper.c index 45d593de489..36af9808025 100644 --- a/target/mips/tcg/fpu_helper.c +++ b/target/mips/tcg/fpu_helper.c @@ -24,7 +24,6 @@ #include "cpu.h" #include "internal.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "fpu/softfloat.h" #include "fpu_helper.h" =20 diff --git a/target/mips/tcg/ldst_helper.c b/target/mips/tcg/ldst_helper.c index 2fb879fcbcc..10319bf03a6 100644 --- a/target/mips/tcg/ldst_helper.c +++ b/target/mips/tcg/ldst_helper.c @@ -23,7 +23,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "exec/memop.h" #include "internal.h" diff --git a/target/mips/tcg/msa_helper.c b/target/mips/tcg/msa_helper.c index 4d9a4468e53..fe4cd1c7b5f 100644 --- a/target/mips/tcg/msa_helper.c +++ b/target/mips/tcg/msa_helper.c @@ -21,7 +21,6 @@ #include "cpu.h" #include "internal.h" #include "tcg/tcg.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/probe.h" #include "exec/helper-proto.h" diff --git a/target/mips/tcg/op_helper.c b/target/mips/tcg/op_helper.c index 65403f1a87b..b906d10204b 100644 --- a/target/mips/tcg/op_helper.c +++ b/target/mips/tcg/op_helper.c @@ -22,7 +22,6 @@ #include "cpu.h" #include "internal.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "exec/memop.h" #include "fpu_helper.h" =20 diff --git a/target/mips/tcg/system/special_helper.c b/target/mips/tcg/syst= em/special_helper.c index 3ce3ae1e124..b54cbe88a38 100644 --- a/target/mips/tcg/system/special_helper.c +++ b/target/mips/tcg/system/special_helper.c @@ -22,7 +22,6 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "internal.h" =20 diff --git a/target/mips/tcg/system/tlb_helper.c b/target/mips/tcg/system/t= lb_helper.c index e477ef812ae..eccaf3624cb 100644 --- a/target/mips/tcg/system/tlb_helper.c +++ b/target/mips/tcg/system/tlb_helper.c @@ -22,7 +22,6 @@ #include "cpu.h" #include "internal.h" #include "exec/cputlb.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/target_page.h" #include "accel/tcg/cpu-ldst.h" diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 6601e0c0666..d3c366dd86a 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -21,7 +21,6 @@ #include "qapi/error.h" #include "qemu/qemu-print.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "fpu/softfloat-helpers.h" #include "tcg/tcg.h" diff --git a/target/openrisc/exception.c b/target/openrisc/exception.c index 8699c3dcea4..e213be36b6b 100644 --- a/target/openrisc/exception.c +++ b/target/openrisc/exception.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exception.h" =20 G_NORETURN void raise_exception(OpenRISCCPU *cpu, uint32_t excp) diff --git a/target/openrisc/exception_helper.c b/target/openrisc/exception= _helper.c index 1f5be4bed90..c2c9d136528 100644 --- a/target/openrisc/exception_helper.c +++ b/target/openrisc/exception_helper.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "exception.h" =20 diff --git a/target/openrisc/fpu_helper.c b/target/openrisc/fpu_helper.c index 8b81d2f62f7..dba997255c6 100644 --- a/target/openrisc/fpu_helper.c +++ b/target/openrisc/fpu_helper.c @@ -20,7 +20,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" =20 diff --git a/target/openrisc/interrupt.c b/target/openrisc/interrupt.c index b3b5b405779..486823094c8 100644 --- a/target/openrisc/interrupt.c +++ b/target/openrisc/interrupt.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "cpu.h" -#include "exec/exec-all.h" #include "gdbstub/helpers.h" #include "qemu/host-utils.h" #ifndef CONFIG_USER_ONLY diff --git a/target/openrisc/interrupt_helper.c b/target/openrisc/interrupt= _helper.c index ab4ea88b692..1553ebc71b0 100644 --- a/target/openrisc/interrupt_helper.c +++ b/target/openrisc/interrupt_helper.c @@ -20,7 +20,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" =20 void HELPER(rfe)(CPUOpenRISCState *env) diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c index 92badf017f7..951f8e247a7 100644 --- a/target/openrisc/sys_helper.c +++ b/target/openrisc/sys_helper.c @@ -20,7 +20,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/cputlb.h" #include "exec/target_page.h" #include "exec/helper-proto.h" diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index d4ce60188bd..3b6843768b0 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -21,7 +21,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "accel/tcg/cpu-mmu-index.h" -#include "exec/exec-all.h" #include "tcg/tcg-op.h" #include "qemu/log.h" #include "qemu/bitops.h" diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index da8b525a41b..1efdc4066eb 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -24,7 +24,6 @@ #include "system/system.h" #include "system/runstate.h" #include "cpu.h" -#include "exec/exec-all.h" #include "internal.h" #include "helper_regs.h" #include "hw/ppc/ppc.h" diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index d93cfed17b4..07b782f971b 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -19,7 +19,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "internal.h" #include "fpu/softfloat.h" =20 diff --git a/target/ppc/machine.c b/target/ppc/machine.c index 98df5b4a3a2..d72e5ecb94b 100644 --- a/target/ppc/machine.c +++ b/target/ppc/machine.c @@ -1,6 +1,5 @@ #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "system/kvm.h" #include "system/tcg.h" #include "helper_regs.h" diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index 50f05a915ed..aa1af44d22a 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/target_page.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c index 46ae454afd3..e7d94625185 100644 --- a/target/ppc/misc_helper.c +++ b/target/ppc/misc_helper.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/cputlb.h" #include "exec/helper-proto.h" #include "qemu/error-report.h" diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c index 5bd3efe70e8..8b980a5aa90 100644 --- a/target/ppc/mmu-hash32.c +++ b/target/ppc/mmu-hash32.c @@ -20,7 +20,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/target_page.h" #include "system/kvm.h" diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index 3ba4810497e..dd337558aa6 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "qemu/units.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "qemu/error-report.h" #include "qemu/qemu-print.h" diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index 4ab5f3bb920..33ac3412901 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "qemu/error-report.h" #include "system/kvm.h" diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index 394a0c9bb60..52d48615ac2 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -24,7 +24,6 @@ #include "kvm_ppc.h" #include "mmu-hash64.h" #include "mmu-hash32.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/target_page.h" #include "exec/log.h" diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 2138666122b..ac607054027 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -25,7 +25,6 @@ #include "mmu-hash64.h" #include "mmu-hash32.h" #include "exec/cputlb.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/target_page.h" #include "exec/log.h" diff --git a/target/ppc/power8-pmu.c b/target/ppc/power8-pmu.c index db9ee8e96b0..2a7a5b493af 100644 --- a/target/ppc/power8-pmu.c +++ b/target/ppc/power8-pmu.c @@ -13,7 +13,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "helper_regs.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qemu/error-report.h" #include "qemu/timer.h" diff --git a/target/ppc/tcg-excp_helper.c b/target/ppc/tcg-excp_helper.c index 2b15e5f2f07..f835be51563 100644 --- a/target/ppc/tcg-excp_helper.c +++ b/target/ppc/tcg-excp_helper.c @@ -21,7 +21,6 @@ #include "qemu/log.h" #include "target/ppc/cpu.h" #include "accel/tcg/cpu-ldst.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "system/runstate.h" =20 diff --git a/target/ppc/timebase_helper.c b/target/ppc/timebase_helper.c index 73120323b4e..7209b418fb6 100644 --- a/target/ppc/timebase_helper.c +++ b/target/ppc/timebase_helper.c @@ -20,7 +20,6 @@ #include "cpu.h" #include "hw/ppc/ppc.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "qemu/log.h" #include "qemu/main-loop.h" =20 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 399107d319a..f2cd3308f80 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -21,7 +21,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" -#include "exec/exec-all.h" #include "exec/target_page.h" #include "tcg/tcg-op.h" #include "tcg/tcg-op-gvec.h" diff --git a/target/ppc/user_only_helper.c b/target/ppc/user_only_helper.c index a4d07a0d0dd..ae210eb8474 100644 --- a/target/ppc/user_only_helper.c +++ b/target/ppc/user_only_helper.c @@ -20,7 +20,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "internal.h" =20 void ppc_cpu_record_sigsegv(CPUState *cs, vaddr address, diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 2b830b33178..1b2a42141f0 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -24,7 +24,6 @@ #include "cpu.h" #include "cpu_vendorid.h" #include "internals.h" -#include "exec/exec-all.h" #include "qapi/error.h" #include "qapi/visitor.h" #include "qemu/error-report.h" diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 619c76cc001..f2e90a9889f 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -24,7 +24,6 @@ #include "internals.h" #include "pmu.h" #include "exec/cputlb.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/target_page.h" #include "system/memory.h" diff --git a/target/riscv/crypto_helper.c b/target/riscv/crypto_helper.c index bb084e00efe..a0fb54bc50c 100644 --- a/target/riscv/crypto_helper.c +++ b/target/riscv/crypto_helper.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "crypto/aes.h" #include "crypto/aes-round.h" diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 13086438552..a32e1455c91 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -24,7 +24,6 @@ #include "tcg/tcg-cpu.h" #include "pmu.h" #include "time_helper.h" -#include "exec/exec-all.h" #include "exec/cputlb.h" #include "exec/tb-flush.h" #include "exec/icount.h" diff --git a/target/riscv/debug.c b/target/riscv/debug.c index 7fc9e121e11..94f06b25737 100644 --- a/target/riscv/debug.c +++ b/target/riscv/debug.c @@ -28,7 +28,6 @@ #include "qapi/error.h" #include "cpu.h" #include "trace.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "exec/watchpoint.h" #include "system/cpu-timers.h" diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c index 91b1a56d10a..706bdfa61d5 100644 --- a/target/riscv/fpu_helper.c +++ b/target/riscv/fpu_helper.c @@ -19,7 +19,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "qemu/host-utils.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" #include "internals.h" diff --git a/target/riscv/m128_helper.c b/target/riscv/m128_helper.c index ec14aaa901a..7d9b83b1b2c 100644 --- a/target/riscv/m128_helper.c +++ b/target/riscv/m128_helper.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" =20 target_ulong HELPER(divu_i128)(CPURISCVState *env, diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index abb1d284dce..05316f2088c 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -21,7 +21,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internals.h" -#include "exec/exec-all.h" #include "exec/cputlb.h" #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/probe.h" diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 426145c3b9f..916fd6fb43a 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -18,7 +18,6 @@ */ =20 #include "qemu/osdep.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "tcg-cpu.h" #include "cpu.h" diff --git a/target/riscv/translate.c b/target/riscv/translate.c index cef61b5b290..85128f997b7 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -20,7 +20,6 @@ #include "qemu/log.h" #include "cpu.h" #include "tcg/tcg-op.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" #include "exec/target_page.h" diff --git a/target/riscv/vcrypto_helper.c b/target/riscv/vcrypto_helper.c index 1526de96f53..9a0d9b4f536 100644 --- a/target/riscv/vcrypto_helper.c +++ b/target/riscv/vcrypto_helper.c @@ -26,7 +26,6 @@ #include "crypto/aes-round.h" #include "crypto/sm4.h" #include "exec/memop.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "internals.h" #include "vector_internals.h" diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 5ccb294e319..8eea3e6df03 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -21,7 +21,6 @@ #include "qemu/bitops.h" #include "cpu.h" #include "exec/memop.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/probe.h" #include "exec/page-protection.h" diff --git a/target/riscv/zce_helper.c b/target/riscv/zce_helper.c index 50d65f386c7..55221f5f375 100644 --- a/target/riscv/zce_helper.c +++ b/target/riscv/zce_helper.c @@ -18,7 +18,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" =20 diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c index a2f1f3824d9..2b190a4b2cf 100644 --- a/target/rx/op_helper.c +++ b/target/rx/op_helper.c @@ -19,7 +19,6 @@ #include "qemu/osdep.h" #include "qemu/bitops.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" #include "fpu/softfloat.h" diff --git a/target/rx/translate.c b/target/rx/translate.c index bbda703be86..19a9584a829 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -20,7 +20,6 @@ #include "qemu/bswap.h" #include "qemu/qemu-print.h" #include "cpu.h" -#include "exec/exec-all.h" #include "tcg/tcg-op.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index 4ae6e2ddeaa..1dca835c5d8 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -11,7 +11,6 @@ #include "cpu.h" #include "kvm/kvm_s390x.h" #include "s390x-internal.h" -#include "exec/exec-all.h" #include "system/kvm.h" #include "system/tcg.h" #include "hw/s390x/ioinst.h" diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 0e133cb9a53..00946e9c0fe 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -23,7 +23,6 @@ #include "kvm/kvm_s390x.h" #include "system/kvm.h" #include "system/tcg.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/target_page.h" #include "hw/hw.h" diff --git a/target/s390x/sigp.c b/target/s390x/sigp.c index a3347f12362..5e95c4978f9 100644 --- a/target/s390x/sigp.c +++ b/target/s390x/sigp.c @@ -16,7 +16,6 @@ #include "system/runstate.h" #include "system/address-spaces.h" #include "exec/cputlb.h" -#include "exec/exec-all.h" #include "system/tcg.h" #include "trace.h" #include "qapi/qapi-types-machine.h" diff --git a/target/s390x/tcg/cc_helper.c b/target/s390x/tcg/cc_helper.c index b36f8cdc8b9..6595ac763c3 100644 --- a/target/s390x/tcg/cc_helper.c +++ b/target/s390x/tcg/cc_helper.c @@ -22,7 +22,6 @@ #include "cpu.h" #include "s390x-internal.h" #include "tcg_s390x.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" =20 diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_hel= per.c index 642c1b18c4c..4447bb66eee 100644 --- a/target/s390x/tcg/crypto_helper.c +++ b/target/s390x/tcg/crypto_helper.c @@ -17,7 +17,6 @@ #include "s390x-internal.h" #include "tcg_s390x.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" =20 static uint64_t R(uint64_t x, int c) diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index 6cd813e1abf..e4c75d0ce01 100644 --- a/target/s390x/tcg/excp_helper.c +++ b/target/s390x/tcg/excp_helper.c @@ -23,7 +23,6 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "exec/cputlb.h" -#include "exec/exec-all.h" #include "exec/target_page.h" #include "exec/watchpoint.h" #include "s390x-internal.h" diff --git a/target/s390x/tcg/fpu_helper.c b/target/s390x/tcg/fpu_helper.c index 5041c139627..1ba43715ac1 100644 --- a/target/s390x/tcg/fpu_helper.c +++ b/target/s390x/tcg/fpu_helper.c @@ -22,7 +22,6 @@ #include "cpu.h" #include "s390x-internal.h" #include "tcg_s390x.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" =20 diff --git a/target/s390x/tcg/int_helper.c b/target/s390x/tcg/int_helper.c index 253c0364157..fbda396f5b4 100644 --- a/target/s390x/tcg/int_helper.c +++ b/target/s390x/tcg/int_helper.c @@ -22,7 +22,6 @@ #include "cpu.h" #include "s390x-internal.h" #include "tcg_s390x.h" -#include "exec/exec-all.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index 9e77cde81bd..857005b1202 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -25,7 +25,6 @@ #include "tcg_s390x.h" #include "exec/helper-proto.h" #include "exec/cpu-common.h" -#include "exec/exec-all.h" #include "exec/cputlb.h" #include "exec/page-protection.h" #include "accel/tcg/cpu-ldst.h" diff --git a/target/s390x/tcg/misc_helper.c b/target/s390x/tcg/misc_helper.c index d5088493ead..f7101be5745 100644 --- a/target/s390x/tcg/misc_helper.c +++ b/target/s390x/tcg/misc_helper.c @@ -26,7 +26,6 @@ #include "qemu/host-utils.h" #include "exec/helper-proto.h" #include "qemu/timer.h" -#include "exec/exec-all.h" #include "exec/cputlb.h" #include "accel/tcg/cpu-ldst.h" #include "exec/target_page.h" diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 00073c5560e..4fdb79f1747 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -31,7 +31,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "s390x-internal.h" -#include "exec/exec-all.h" #include "tcg/tcg-op.h" #include "tcg/tcg-op-gvec.h" #include "qemu/log.h" diff --git a/target/s390x/tcg/vec_fpu_helper.c b/target/s390x/tcg/vec_fpu_h= elper.c index 1bbaa82fe8a..744f800fb6c 100644 --- a/target/s390x/tcg/vec_fpu_helper.c +++ b/target/s390x/tcg/vec_fpu_helper.c @@ -15,7 +15,6 @@ #include "vec.h" #include "tcg_s390x.h" #include "tcg/tcg-gvec-desc.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" =20 diff --git a/target/s390x/tcg/vec_helper.c b/target/s390x/tcg/vec_helper.c index 781ccc565bd..46ec4a947dd 100644 --- a/target/s390x/tcg/vec_helper.c +++ b/target/s390x/tcg/vec_helper.c @@ -17,7 +17,6 @@ #include "tcg/tcg-gvec-desc.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" -#include "exec/exec-all.h" =20 void HELPER(gvec_vbperm)(void *v1, const void *v2, const void *v3, uint32_t desc) diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 861fdd47f76..0a04f149d70 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -24,7 +24,6 @@ #include "qemu/qemu-print.h" #include "cpu.h" #include "migration/vmstate.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "fpu/softfloat-helpers.h" #include "tcg/tcg.h" diff --git a/target/sh4/helper.c b/target/sh4/helper.c index b41d14d5d7c..fb7642bda1b 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -21,7 +21,6 @@ =20 #include "cpu.h" #include "exec/cputlb.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/target_page.h" #include "exec/log.h" diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index e7fcad3c1b7..557b1bf4972 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -19,7 +19,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include "fpu/softfloat.h" =20 diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 5ce477d0add..f2877157b1c 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "tcg/tcg-op.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index f7d231c6f8b..c864217175b 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -23,7 +23,6 @@ #include "qemu/module.h" #include "qemu/qemu-print.h" #include "accel/tcg/cpu-mmu-index.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "hw/qdev-properties.h" #include "qapi/visitor.h" diff --git a/target/sparc/fop_helper.c b/target/sparc/fop_helper.c index c25097d07f5..a49334150d3 100644 --- a/target/sparc/fop_helper.c +++ b/target/sparc/fop_helper.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" =20 diff --git a/target/sparc/helper.c b/target/sparc/helper.c index 7846ddd6f62..9163b9d46ad 100644 --- a/target/sparc/helper.c +++ b/target/sparc/helper.c @@ -19,7 +19,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "qemu/timer.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c index 4c5dba19d11..2c63eb9e036 100644 --- a/target/sparc/ldst_helper.c +++ b/target/sparc/ldst_helper.c @@ -23,7 +23,6 @@ #include "cpu.h" #include "tcg/tcg.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "exec/cputlb.h" #include "exec/page-protection.h" #include "exec/target_page.h" diff --git a/target/sparc/machine.c b/target/sparc/machine.c index 222e5709c55..4dd75aff74a 100644 --- a/target/sparc/machine.c +++ b/target/sparc/machine.c @@ -1,6 +1,5 @@ #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "qemu/timer.h" =20 #include "migration/cpu.h" diff --git a/target/sparc/translate.c b/target/sparc/translate.c index adebddf27b2..241378889c3 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -22,7 +22,6 @@ =20 #include "cpu.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "exec/target_page.h" #include "tcg/tcg-op.h" #include "tcg/tcg-op-gvec.h" diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c index 0c4b09f2c14..9ad9d01e8b9 100644 --- a/target/sparc/win_helper.c +++ b/target/sparc/win_helper.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "qemu/main-loop.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "trace.h" =20 diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index a4f93e7d910..bdbcaf0dfcc 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "cpu.h" -#include "exec/exec-all.h" #include "exec/translation-block.h" #include "qemu/error-report.h" #include "tcg/debug-assert.h" diff --git a/target/tricore/op_helper.c b/target/tricore/op_helper.c index ae559b69220..9910c13f4b5 100644 --- a/target/tricore/op_helper.c +++ b/target/tricore/op_helper.c @@ -18,7 +18,6 @@ #include "cpu.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" -#include "exec/exec-all.h" #include "accel/tcg/cpu-ldst.h" #include /* for crc32 */ =20 diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 7cd26d8eaba..11496654e4b 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -20,7 +20,6 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/exec-all.h" #include "tcg/tcg-op.h" #include "accel/tcg/cpu-ldst.h" #include "qemu/qemu-print.h" diff --git a/target/xtensa/dbg_helper.c b/target/xtensa/dbg_helper.c index c4f4298a50c..3b91f7c38ac 100644 --- a/target/xtensa/dbg_helper.c +++ b/target/xtensa/dbg_helper.c @@ -30,7 +30,6 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" -#include "exec/exec-all.h" #include "exec/watchpoint.h" #include "system/address-spaces.h" =20 diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c index ca629f071d1..b611c9bf97c 100644 --- a/target/xtensa/exc_helper.c +++ b/target/xtensa/exc_helper.c @@ -32,7 +32,6 @@ #include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "qemu/atomic.h" -#include "exec/exec-all.h" =20 void HELPER(exception)(CPUXtensaState *env, uint32_t excp) { diff --git a/target/xtensa/fpu_helper.c b/target/xtensa/fpu_helper.c index 53fc7cfd2af..5358060c50a 100644 --- a/target/xtensa/fpu_helper.c +++ b/target/xtensa/fpu_helper.c @@ -30,7 +30,6 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" -#include "exec/exec-all.h" #include "fpu/softfloat.h" =20 enum { diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c index 182c6e35c17..71330fc84b9 100644 --- a/target/xtensa/mmu_helper.c +++ b/target/xtensa/mmu_helper.c @@ -35,7 +35,6 @@ #include "exec/cputlb.h" #include "accel/tcg/cpu-mmu-index.h" #include "accel/tcg/probe.h" -#include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/target_page.h" #include "system/memory.h" diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index c125fa49464..fc47ebaaf50 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -30,7 +30,6 @@ #include "exec/helper-proto.h" #include "exec/page-protection.h" #include "qemu/host-utils.h" -#include "exec/exec-all.h" #include "system/memory.h" #include "qemu/atomic.h" #include "qemu/timer.h" diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 5ebd4a512c9..2ba4b1ae66d 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -31,7 +31,6 @@ #include "qemu/osdep.h" =20 #include "cpu.h" -#include "exec/exec-all.h" #include "tcg/tcg-op.h" #include "qemu/log.h" #include "qemu/qemu-print.h" diff --git a/target/xtensa/win_helper.c b/target/xtensa/win_helper.c index ec9ff44db05..4b25f8f4de7 100644 --- a/target/xtensa/win_helper.c +++ b/target/xtensa/win_helper.c @@ -30,7 +30,6 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" -#include "exec/exec-all.h" =20 static void copy_window_from_phys(CPUXtensaState *env, uint32_t window, uint32_t phys, uint32_t= n) --=20 2.47.1