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Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson Message-ID: <20250401080938.32278-9-philmd@linaro.org> --- target/i386/cpu.h | 1 - target/i386/tcg/seg_helper.h | 4 ++++ target/i386/cpu.c | 16 ---------------- target/i386/tcg/seg_helper.c | 16 ++++++++++++++++ 4 files changed, 20 insertions(+), 17 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 119efc6c60..c9f39e99d3 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2598,7 +2598,6 @@ static inline bool is_mmu_index_32(int mmu_index) } =20 int x86_mmu_index_pl(CPUX86State *env, unsigned pl); -int cpu_mmu_index_kernel(CPUX86State *env); =20 #define CC_DST (env->cc_dst) #define CC_SRC (env->cc_src) diff --git a/target/i386/tcg/seg_helper.h b/target/i386/tcg/seg_helper.h index 6b8606cd6d..ea98e1a98e 100644 --- a/target/i386/tcg/seg_helper.h +++ b/target/i386/tcg/seg_helper.h @@ -20,6 +20,8 @@ #ifndef SEG_HELPER_H #define SEG_HELPER_H =20 +#include "cpu.h" + //#define DEBUG_PCALL =20 #ifdef DEBUG_PCALL @@ -31,6 +33,8 @@ # define LOG_PCALL_STATE(cpu) do { } while (0) #endif =20 +int cpu_mmu_index_kernel(CPUX86State *env); + /* * TODO: Convert callers to compute cpu_mmu_index_kernel once * and use *_mmuidx_ra directly. diff --git a/target/i386/cpu.c b/target/i386/cpu.c index c596e2174d..fd85663833 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -8681,22 +8681,6 @@ static int x86_cpu_mmu_index(CPUState *cs, bool ifet= ch) return x86_mmu_index_pl(env, env->hflags & HF_CPL_MASK); } =20 -static int x86_mmu_index_kernel_pl(CPUX86State *env, unsigned pl) -{ - int mmu_index_32 =3D (env->hflags & HF_LMA_MASK) ? 0 : 1; - int mmu_index_base =3D - !(env->hflags & HF_SMAP_MASK) ? MMU_KNOSMAP64_IDX : - (pl < 3 && (env->eflags & AC_MASK) - ? MMU_KNOSMAP64_IDX : MMU_KSMAP64_IDX); - - return mmu_index_base + mmu_index_32; -} - -int cpu_mmu_index_kernel(CPUX86State *env) -{ - return x86_mmu_index_kernel_pl(env, env->hflags & HF_CPL_MASK); -} - static void x86_disas_set_info(CPUState *cs, disassemble_info *info) { X86CPU *cpu =3D X86_CPU(cs); diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c index 71962113fb..f4370202fe 100644 --- a/target/i386/tcg/seg_helper.c +++ b/target/i386/tcg/seg_helper.c @@ -128,6 +128,22 @@ int get_pg_mode(CPUX86State *env) return pg_mode; } =20 +static int x86_mmu_index_kernel_pl(CPUX86State *env, unsigned pl) +{ + int mmu_index_32 =3D (env->hflags & HF_LMA_MASK) ? 0 : 1; + int mmu_index_base =3D + !(env->hflags & HF_SMAP_MASK) ? MMU_KNOSMAP64_IDX : + (pl < 3 && (env->eflags & AC_MASK) + ? MMU_KNOSMAP64_IDX : MMU_KSMAP64_IDX); + + return mmu_index_base + mmu_index_32; +} + +int cpu_mmu_index_kernel(CPUX86State *env) +{ + return x86_mmu_index_kernel_pl(env, env->hflags & HF_CPL_MASK); +} + /* return non zero if error */ static inline int load_segment_ra(CPUX86State *env, uint32_t *e1_ptr, uint32_t *e2_ptr, int selector, --=20 2.43.0