From nobody Sun Nov 16 00:58:30 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1744275069561500.02509658245856; Thu, 10 Apr 2025 01:51:09 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2ncE-0005uS-V7; Thu, 10 Apr 2025 04:50:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u2nc7-0005sh-F2 for qemu-devel@nongnu.org; Thu, 10 Apr 2025 04:50:23 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u2nc4-0006LW-Gs for qemu-devel@nongnu.org; Thu, 10 Apr 2025 04:50:23 -0400 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxC3I+hvdnwbq2AA--.42019S3; Thu, 10 Apr 2025 16:50:06 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMBx3MQ8hvdna7V3AA--.27572S2; Thu, 10 Apr 2025 16:50:04 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH] hw/intc/loongarch_pch_msi: Remove gpio input handler Date: Thu, 10 Apr 2025 16:50:04 +0800 Message-Id: <20250410085004.3577627-1-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMBx3MQ8hvdna7V3AA--.27572S2 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1744275074014019100 Content-Type: text/plain; charset="utf-8" MSI interrupt is triggered by writing message on specified memory address. In generic it is used by PCI devices, and no device is connected pch MSI irqchip with GPIO pin line method, here remove gpio input setting for MSI controller. Signed-off-by: Bibo Mao Reviewed-by: Song Gao Tested-by: Song Gao --- hw/intc/loongarch_pch_msi.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/hw/intc/loongarch_pch_msi.c b/hw/intc/loongarch_pch_msi.c index 66b5c1e660..bc93504ff7 100644 --- a/hw/intc/loongarch_pch_msi.c +++ b/hw/intc/loongarch_pch_msi.c @@ -42,13 +42,6 @@ static const MemoryRegionOps loongarch_pch_msi_ops =3D { .endianness =3D DEVICE_LITTLE_ENDIAN, }; =20 -static void pch_msi_irq_handler(void *opaque, int irq, int level) -{ - LoongArchPCHMSI *s =3D LOONGARCH_PCH_MSI(opaque); - - qemu_set_irq(s->pch_msi_irq[irq], level); -} - static void loongarch_pch_msi_realize(DeviceState *dev, Error **errp) { LoongArchPCHMSI *s =3D LOONGARCH_PCH_MSI(dev); @@ -59,9 +52,7 @@ static void loongarch_pch_msi_realize(DeviceState *dev, E= rror **errp) } =20 s->pch_msi_irq =3D g_new(qemu_irq, s->irq_num); - qdev_init_gpio_out(dev, s->pch_msi_irq, s->irq_num); - qdev_init_gpio_in(dev, pch_msi_irq_handler, s->irq_num); } =20 static void loongarch_pch_msi_unrealize(DeviceState *dev) base-commit: 56c6e249b6988c1b6edc2dd34ebb0f1e570a1365 --=20 2.39.3