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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec1663060sm2049385e9.14.2025.04.02.14.03.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 02 Apr 2025 14:03:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1743627820; x=1744232620; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=W61Nij3hGw3m1XytqemSo+GMlPX7UfCwI1m0BO9rotE=; b=efi/ULBUOW3N1U0xx0+N+U3WCGEYIdyphmZ6ZR0/wd6fTfc70irMWSlXVncH/ih/9a H0PKz+cx8H/Z56lFHBmFNLRNMHyhog9lBSdYNhnSdQq3cJgiZ4vUamORVthJoGsE9YYt Tsbfdn9ZomYNkQsaR0YDBUSSSOeoBnxPC66WHAxAK4aynoA0Nfm/Bz9dJEzcv0tx2Lln M5Pf2eQnZugyTTc3UtXPTbUUrcsvYeG4ME7uaWhj+5dNgpMNDCxnVYLyEBCK2qanKG85 XWSyzSdfON6e8TW7jqymM9FuFeqkqZ2S8F8FCn2qsnlS4ECrVav/gscKVMaaE/PmXNGj irZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743627820; x=1744232620; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=W61Nij3hGw3m1XytqemSo+GMlPX7UfCwI1m0BO9rotE=; b=MWWlrzJHYQZ2AVcAXauwaOvtH6vM/WGuwL+02j5VYzp8Uvo5y89lw9Gtvy19MHdlwq qX/bgMb+OBPIJJSG+to1HA8YwBMm7081NBCBaHJRApi6xZQuXgMJVSYYaPUfhpF+96/N s3gdLERMe8OzWOwqRgUpFlwAyGRf2uzgEbqEPp6qNAgDh8/c12NPCcUa+TX49JucR4A3 1UUEW0YMiBa9EbO9v3+9Yx5EfJt4eQ5iqq+gdFZJfIwJuVfzn+Pise9xj7FxTNe9vAAS y5juSv9ag9NmfJtGCBMmNEPZwjsmxY+fo0LMxVuDjgL8yvxJIGgcY3r65FTUonaOm75a oGEg== X-Forwarded-Encrypted: i=1; AJvYcCXD9JwyTptCWbIUjcMj0pHA9NhOMFAlCl62qm8O3qcsj7FEK+78JLgfyoDX0EDF1NHr1SCU5EwkRB8z@nongnu.org X-Gm-Message-State: AOJu0Yxjs4GZKEOK+9oMEB65EyWmnASBlZ1+niiCPps1p7/0fEyE0j69 wVcfpt2FB/MDVRF4WHBjTjk4EMncYn78FK0uovG+M+eYkmoiKj8SybUNEKn5LIb24stNDGRO315 v X-Gm-Gg: ASbGnctopI9vf5aXd9HIKuvDhyW3K3RiudOVLh8ashQbjmG/ivnNUZa+TGh7R3YtIY4 2lU/hu9qSv7MC0swAw8GpUZVkfW7pNwtMZinV0HMWZi0gO1hq7Tm+73xYHebNVV+dcpaFROdVov WJIK6NN1+ZSi9iNJw6raxg1WI732PbK0MieF6d6ZEw+bs3IVjJ0g2cH6n4EFCY63hopa5rqhs7T ca8Dje69gFfA1ABz8T/1VBAUB0gowjBzdODUraer7yK+HXvE+TO3r4d+DfKeLex28k1Cnv1YmEq 7bn0BhAL5w9IJM75kUrBKnmdNAvc68GFDMsP1rOujiJQTSl4olyg8vQKbZdD4B9ak4fTqAQ+uKo /zHQ/Ztaso+87FRwgvpw= X-Google-Smtp-Source: AGHT+IF9RfFz9q3umE5DmYiy5miHELFOM4ShkSjN6alDGEzZ4BPCWVOYBWOiuQ5PQQNbucun19iVjA== X-Received: by 2002:a05:6000:1787:b0:38d:badf:9df5 with SMTP id ffacd0b85a97d-39c2975344dmr3835507f8f.17.1743627819975; Wed, 02 Apr 2025 14:03:39 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Richard Henderson , qemu-devel@nongnu.org Subject: [PATCH-for-10.1 02/43] tcg: Always define TARGET_INSN_START_EXTRA_WORDS Date: Wed, 2 Apr 2025 23:02:47 +0200 Message-ID: <20250402210328.52897-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250402210328.52897-1-philmd@linaro.org> References: <20250402210328.52897-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1743628374126019100 Do not define TARGET_INSN_START_EXTRA_WORDS under the hood, have each target explicitly define it. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- include/tcg/insn-start-words.h | 4 ---- include/tcg/tcg-op.h | 2 +- target/alpha/cpu-param.h | 2 ++ target/avr/cpu-param.h | 2 ++ target/hexagon/cpu-param.h | 2 ++ target/loongarch/cpu-param.h | 2 ++ target/ppc/cpu-param.h | 2 ++ target/rx/cpu-param.h | 2 ++ target/tricore/cpu-param.h | 2 ++ target/xtensa/cpu-param.h | 2 ++ 10 files changed, 17 insertions(+), 5 deletions(-) diff --git a/include/tcg/insn-start-words.h b/include/tcg/insn-start-words.h index 50c18bd326d..394c191da8d 100644 --- a/include/tcg/insn-start-words.h +++ b/include/tcg/insn-start-words.h @@ -8,10 +8,6 @@ =20 #include "cpu.h" =20 -#ifndef TARGET_INSN_START_EXTRA_WORDS -# define TARGET_INSN_START_WORDS 1 -#else # define TARGET_INSN_START_WORDS (1 + TARGET_INSN_START_EXTRA_WORDS) -#endif =20 #endif /* TARGET_INSN_START_WORDS */ diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h index bc46b5570c4..cded92a4479 100644 --- a/include/tcg/tcg-op.h +++ b/include/tcg/tcg-op.h @@ -23,7 +23,7 @@ # error #endif =20 -#ifndef TARGET_INSN_START_EXTRA_WORDS +#if TARGET_INSN_START_EXTRA_WORDS =3D=3D 0 static inline void tcg_gen_insn_start(target_ulong pc) { TCGOp *op =3D tcg_emit_op(INDEX_op_insn_start, 64 / TCG_TARGET_REG_BIT= S); diff --git a/target/alpha/cpu-param.h b/target/alpha/cpu-param.h index 63989e71c06..dd44feb1793 100644 --- a/target/alpha/cpu-param.h +++ b/target/alpha/cpu-param.h @@ -24,6 +24,8 @@ # define TARGET_VIRT_ADDR_SPACE_BITS (30 + TARGET_PAGE_BITS) #endif =20 +#define TARGET_INSN_START_EXTRA_WORDS 0 + /* Alpha processors have a weak memory model */ #define TCG_GUEST_DEFAULT_MO (0) =20 diff --git a/target/avr/cpu-param.h b/target/avr/cpu-param.h index f5248ce9e79..9d37848d97d 100644 --- a/target/avr/cpu-param.h +++ b/target/avr/cpu-param.h @@ -25,6 +25,8 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 24 #define TARGET_VIRT_ADDR_SPACE_BITS 24 =20 +#define TARGET_INSN_START_EXTRA_WORDS 0 + #define TCG_GUEST_DEFAULT_MO 0 =20 #endif diff --git a/target/hexagon/cpu-param.h b/target/hexagon/cpu-param.h index 45ee7b46409..635d509e743 100644 --- a/target/hexagon/cpu-param.h +++ b/target/hexagon/cpu-param.h @@ -23,4 +23,6 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 36 #define TARGET_VIRT_ADDR_SPACE_BITS 32 =20 +#define TARGET_INSN_START_EXTRA_WORDS 0 + #endif diff --git a/target/loongarch/cpu-param.h b/target/loongarch/cpu-param.h index 52437946e56..dbe414bb35a 100644 --- a/target/loongarch/cpu-param.h +++ b/target/loongarch/cpu-param.h @@ -13,6 +13,8 @@ =20 #define TARGET_PAGE_BITS 12 =20 +#define TARGET_INSN_START_EXTRA_WORDS 0 + #define TCG_GUEST_DEFAULT_MO (0) =20 #endif diff --git a/target/ppc/cpu-param.h b/target/ppc/cpu-param.h index 553ad2f4c6a..d0651d2ac89 100644 --- a/target/ppc/cpu-param.h +++ b/target/ppc/cpu-param.h @@ -37,6 +37,8 @@ # define TARGET_PAGE_BITS 12 #endif =20 +#define TARGET_INSN_START_EXTRA_WORDS 0 + #define TCG_GUEST_DEFAULT_MO 0 =20 #endif diff --git a/target/rx/cpu-param.h b/target/rx/cpu-param.h index ef1970a09e9..84934f3bcaf 100644 --- a/target/rx/cpu-param.h +++ b/target/rx/cpu-param.h @@ -24,4 +24,6 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 =20 +#define TARGET_INSN_START_EXTRA_WORDS 0 + #endif diff --git a/target/tricore/cpu-param.h b/target/tricore/cpu-param.h index 790242ef3d2..eb33a67c419 100644 --- a/target/tricore/cpu-param.h +++ b/target/tricore/cpu-param.h @@ -12,4 +12,6 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 =20 +#define TARGET_INSN_START_EXTRA_WORDS 0 + #endif diff --git a/target/xtensa/cpu-param.h b/target/xtensa/cpu-param.h index 5e4848ad059..e7cb747aaae 100644 --- a/target/xtensa/cpu-param.h +++ b/target/xtensa/cpu-param.h @@ -16,6 +16,8 @@ #define TARGET_VIRT_ADDR_SPACE_BITS 32 #endif =20 +#define TARGET_INSN_START_EXTRA_WORDS 0 + /* Xtensa processors have a weak memory model */ #define TCG_GUEST_DEFAULT_MO (0) =20 --=20 2.47.1