From nobody Sat Apr 5 15:01:06 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1743518380; cv=none; d=zohomail.com; s=zohoarc; b=MrkdUe5A6stoyUKUavtweXj4rQYUJpBiYuPhl/DkuRIE0hDk+wOgqMKvJGS/St/MBrVDFe7Glbbv3WnA8dvHe1ZsUdWjnXNOtUqYWHu92ZVk5ilElrEgn8y+70OZLF6CZbfni3VbCaRrt/WDcyIzsFRlfSzSQmjuGkYerswvKWs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1743518380; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=PGZy+I0deTs+g3yJl2U3yByVtr9+2Jm1QifNo3I5skg=; b=S6Yz7/LvAqh8aOpeuRbx/D/pH9xlxri2O5qFT3iZYUdfsiH6Fr6wD/+3XphbW9tIzNYCrWsz83iXsuf6hVIJ8JW3I4cBapRqqVXSMpc/sDKsAp1M9ZbolDen6Pl4EJFYmGuSayyLpDfUE+3Igf9aS7oTC4eP0cmCkpB2lObmozs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1743518379935767.4336785724506; Tue, 1 Apr 2025 07:39:39 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tzbz0-0006J7-1I; Tue, 01 Apr 2025 09:48:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzbuI-0000Yw-ST for qemu-devel@nongnu.org; Tue, 01 Apr 2025 09:44:06 -0400 Received: from mgamail.intel.com ([192.198.163.16]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tzbuE-0006Zf-8g for qemu-devel@nongnu.org; Tue, 01 Apr 2025 09:43:57 -0400 Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2025 06:42:45 -0700 Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa008.fm.intel.com with ESMTP; 01 Apr 2025 06:42:43 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1743515034; x=1775051034; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xsvCG5PKYAl5zA9Q6TrXmGU62MgEcnF7Km+/JJfw55A=; b=lFXSDnHkiZDwdh3y8XHNa+JTiG1HsOJPnQkNcdXVuzieAAjil1Rh+bc2 eRy5GoIHK3uGSksQtHc8cI7pAwiDnx1wVrWWo7++tczK5xjK7ocKWHSCq DZ7oMK4W5f9pc9KIw9zdgTqzAU7YaV5tq/9kfEyg5756Lb6F4gdwIqERu FdzlqjZJ9TEyyucVJ4Eg16+dNEw06VkySs3cFc92VXybMCpDCzC4OFoNI 2C83ovm0eMNGtPhA/0ns84AlWZ0mYgNInWmBQm77RT1Pcv4WXVsHrbfHH dhnd7ZArMBmevVPPXxMwWq6+hpG+DbDIVqohYKuKuq0fjbDLYH5sj5Uhe Q==; X-CSE-ConnectionGUID: gc/p/NPoQuac9f+AExTFhA== X-CSE-MsgGUID: ltJPWSJiSd2v7h19yRnoeQ== X-IronPort-AV: E=McAfee;i="6700,10204,11391"; a="32433475" X-IronPort-AV: E=Sophos;i="6.14,293,1736841600"; d="scan'208";a="32433475" X-CSE-ConnectionGUID: sSLWwrCwRIa6OTLqXtIk9w== X-CSE-MsgGUID: glcSvyNBQDqTQZA5/m9tew== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,293,1736841600"; d="scan'208";a="126640145" From: Xiaoyao Li To: Paolo Bonzini , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= Cc: "Michael S. Tsirkin" , Markus Armbruster , Francesco Lavra , Marcelo Tosatti , qemu-devel@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Rick Edgecombe , Xiaoyao Li Subject: [PATCH v8 37/55] i386/tdx: Disable PIC for TDX VMs Date: Tue, 1 Apr 2025 09:01:47 -0400 Message-Id: <20250401130205.2198253-38-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250401130205.2198253-1-xiaoyao.li@intel.com> References: <20250401130205.2198253-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.198.163.16; envelope-from=xiaoyao.li@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.997, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.999, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1743518381965019000 Content-Type: text/plain; charset="utf-8" Legacy PIC (8259) cannot be supported for TDX VMs since TDX module doesn't allow directly interrupt injection. Using posted interrupts for the PIC is not a viable option as the guest BIOS/kernel will not do EOI for PIC IRQs, i.e. will leave the vIRR bit set. Hence disable PIC for TDX VMs and error out if user wants PIC. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann Reviewed-by: Daniel P. Berrang=C3=A9 --- target/i386/kvm/tdx.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c index 0eefd058f7a2..0d30506c2021 100644 --- a/target/i386/kvm/tdx.c +++ b/target/i386/kvm/tdx.c @@ -383,6 +383,13 @@ static int tdx_kvm_init(ConfidentialGuestSupport *cgs,= Error **errp) return -EINVAL; } =20 + if (x86ms->pic =3D=3D ON_OFF_AUTO_AUTO) { + x86ms->pic =3D ON_OFF_AUTO_OFF; + } else if (x86ms->pic =3D=3D ON_OFF_AUTO_ON) { + error_setg(errp, "TDX VM doesn't support PIC"); + return -EINVAL; + } + if (!tdx_caps) { r =3D get_tdx_capabilities(errp); if (r) { --=20 2.34.1