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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Paolo Bonzini <pbonzini@redhat.com>, Zhao Liu <zhao1.liu@intel.com>,
Alistair Francis <alistair.francis@wdc.com>, qemu-riscv@nongnu.org,
Anton Johansson <anjo@rev.ng>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Weiwei Li <liwei1518@gmail.com>,
Pierrick Bouvier <pierrick.bouvier@linaro.org>,
=?UTF-8?q?Alex=20Benn=C3=A9e?= <alex.bennee@linaro.org>,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH-for-10.1 v2] target/riscv/gdbstub: Replace ldtul_p() ->
ldn_p(sizeof(target_ulong))
Date: Tue, 25 Mar 2025 16:49:13 +0100
Message-ID: <20250325154913.95283-1-philmd@linaro.org>
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Replace the few ldtul_p() calls by a generic ldn_p() ones.
No logical change.
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/riscv/gdbstub.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c
index 18e88f416af..c1dc54e47d6 100644
--- a/target/riscv/gdbstub.c
+++ b/target/riscv/gdbstub.c
@@ -193,7 +193,7 @@ static int riscv_gdb_set_csr(CPUState *cs, uint8_t *mem=
_buf, int n)
CPURISCVState *env =3D &cpu->env;
=20
if (n < CSR_TABLE_SIZE) {
- target_ulong val =3D ldtul_p(mem_buf);
+ target_ulong val =3D ldn_p(mem_buf, sizeof(val));
int result;
=20
result =3D riscv_csrrw_debug(env, n, NULL, val, -1);
@@ -229,15 +229,17 @@ static int riscv_gdb_set_virtual(CPUState *cs, uint8_=
t *mem_buf, int n)
RISCVCPU *cpu =3D RISCV_CPU(cs);
CPURISCVState *env =3D &cpu->env;
=20
- target_ulong new_priv =3D ldtul_p(mem_buf) & 0x3;
+ target_ulong new_priv;
+ size_t regsize =3D sizeof(new_priv);
bool new_virt =3D 0;
=20
+ new_priv =3D ldn_p(mem_buf, regsize) & 0x3;
if (new_priv =3D=3D PRV_RESERVED) {
new_priv =3D PRV_S;
}
=20
if (new_priv !=3D PRV_M) {
- new_virt =3D (ldtul_p(mem_buf) & BIT(2)) >> 2;
+ new_virt =3D (ldn_p(mem_buf, regsize) & BIT(2)) >> 2;
}
=20
if (riscv_has_ext(env, RVH) && new_virt !=3D env->virt_enabled) {
--=20
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