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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3997f9efc9bsm13813579f8f.87.2025.03.25.08.41.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 25 Mar 2025 08:41:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1742917294; x=1743522094; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=43G6xaQEasg9QNPZtMYOEGymQHF1cxnYCa0rqpPVw3M=; b=PCWXh4dewFoveyQZZ9VkhTZ4gUrbCUUk07sdvjHVh+oaM4hYDYrP9+TisISxd6/03g tau4gRUb4NsxNdJMPBJjidYcXxc29t/aqJefo8ay8ntFIj9isYC/BtQU6x2aocs0/L7M dJItqvfpvg9M2I00P+O3oEp87YRcwQwTVhrnw7oDYb4gKRtPJhUuiOBvwC+Yo2m/ICA+ nD2Q/+0hQH969w3ZRfld66n8o2ZVOyZlt+WNmngBp1ckS95EtqXqIJ/p0dveNK3M2d6P YY0WoilNqo+B29wFICrXIijI8xC7LQ/ZEIQfTpgeL/h2aCaQ9HKohdP3UHmiFVDNqSVs rS9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742917294; x=1743522094; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=43G6xaQEasg9QNPZtMYOEGymQHF1cxnYCa0rqpPVw3M=; b=kR1z/M5H2HjmLZq2uyXgdYWIL+Sego884VKB+TOF6CIbPlHKDzHsLm8astUKbvLMV5 Voi7siO4LqKObJOU/78CbSPsUdUgmdBs4ml7YXZ0vXW6sRfRYc81TbEzW/85xZ9XjNUi gF5VWfD0onKa2vAkloVTU6CwroUN2deAuSsjrkszxgPkZrvzueMSFm2xcruq4s/jypYY w3IQxL4CInVRRQlxq+JB4B5EqJidzH+N9gsViN1HeXmjf0qOuDpIkMGl3ZCoN2JZ873Y MWQaxjtdgBiWVdj9fj0EgRR6q5jVppkgZ9MpizyD9RpMBimyll5D++u0R2ppf8g1i4N9 ESqw== X-Gm-Message-State: AOJu0YzVDAoHjoEM58k85cyI0eymaJ5N+tlvI1bGULhLN1VqwYOiUaim yZ8qxUsP+84XR4cfWAqeS5pFGZY6/L5hgoUU2GfKZUsC1ra7M3GBpt3gQckNrJ/R5GZ4Nj8rjt8 U X-Gm-Gg: ASbGnctuY7YNoY+Auwey9RE399rHXeEjg67GrI/WDSdqAcD/ysckeZ4XlDHGjPQEpEI c1E9H1bi3f1pm8nFV2o2QtHc1OA7uONwpG8i5LX+BSn/lpFIdZafoipp9ccleiLFWXL50YQYl87 MSSXzdiVZYKHSc1Ff76eLy/WslutCpSC65CYQLWqB7SNF7B8k2l9PuKycLUFnFytz91eCqkTXMC diyKiNdiW5yFoCgn5Vc09IBJNmVqRnCERtQRxElx9ugJH2rY7h2BGWCGzqoxF9HmKMbfeFta3Ji 5O2UYmS3N8+O5pVcFPDyeZlFDKDe8+UHQwsheBy8UP7q67uNw20Xaip1oLWuGAI7bA+KNR4qsYD p/j59+BcZKE3wsavYO1U= X-Google-Smtp-Source: AGHT+IEv/no7EQQ27qMSrJSowSSNlar+A0XV6+rr/4VRZfQHIVT3VCLUqd9YdVHs+1WLkyXEFMhw+g== X-Received: by 2002:a05:6000:418a:b0:391:3fa7:bf77 with SMTP id ffacd0b85a97d-3997f9148eemr10819618f8f.31.1742917294073; Tue, 25 Mar 2025 08:41:34 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Pierrick Bouvier , Zhao Liu , Marcel Apfelbaum , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Jiaxun Yang , Aurelien Jarno , Aleksandar Rikalo , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Anton Johansson Subject: [PATCH-for-10.1 7/8] target/mips: Get CPU register size using mips_cpu_is_64bit() Date: Tue, 25 Mar 2025 16:40:57 +0100 Message-ID: <20250325154058.92735-8-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250325154058.92735-1-philmd@linaro.org> References: <20250325154058.92735-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1742917356259019100 CPU registers size is static and depends on the type of CPU. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier --- target/mips/gdbstub.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/target/mips/gdbstub.c b/target/mips/gdbstub.c index b9fc667373e..84fd3de4137 100644 --- a/target/mips/gdbstub.c +++ b/target/mips/gdbstub.c @@ -75,11 +75,16 @@ int mips_cpu_gdb_read_register(CPUState *cs, GByteArray= *mem_buf, int n) return 0; } =20 +static size_t mips_regsize(MIPSCPU *cpu) +{ + return mips_cpu_is_64bit(cpu) ? sizeof(uint64_t) : sizeof(uint32_t); +} + int mips_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { CPUMIPSState *env =3D cpu_env(cs); target_ulong tmp; - size_t regsize =3D sizeof(tmp); + size_t regsize =3D mips_regsize(MIPS_CPU(cs)); =20 tmp =3D ldn_p(mem_buf, regsize); =20 --=20 2.47.1