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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d4fdbd0a9sm151230465e9.38.2025.03.25.05.39.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 25 Mar 2025 05:39:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1742906375; x=1743511175; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NRiDNSfza2GYouIqjVX2heKQgBy/qgPHwE2OCmqBWtw=; b=FwP4QE6eTeYH+Dbks2rNP0MLSU+IakD3qMMpp9Rj8f1OVIarMwqCCTjcejwZ8o+cqp BxPUMe2jsGqSkHahcHABkq96K5GARJXpuxq3TVKpS6df9coC7Xh0rTqqaBnQFOzUh5W2 Tqwl0ky8qw2iCgke5GcUJ1DAwrw9eDAbsczxDcTqFT+QRPeLE/UAg6RibNg0E0fzkyF/ //in0fk6JcjoTl/YokLAT6EyYaMYDs3PSmljeLBAvIYJeoHLi/jrrHnsKlO1usOyNh++ 6YMvNWLXl+TOEJHgg/wI6bLsJ3OD4ITy7y5x9IlZzccas4DKUtGsIg1c1fLaUIRpiJbJ ElaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742906375; x=1743511175; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NRiDNSfza2GYouIqjVX2heKQgBy/qgPHwE2OCmqBWtw=; b=plmc8GYIM3QX39El9kP9lsdShYPj5B9VhptE0udhBmunjS7XV6G7R4+m2pL9VquM4S rpWipmJj+lAflCnuOl5LsGnHEjW8ORlHBCCJyHa80qQOfFomkurclWddcNZPJvSakgkl 7of5lmb4nLJXw111QK6x6g/NQY0VkC83BSRlr119tkkzIDe1ip+FBicBijwF6S4WBMiC XWkKhNSianAuoY76yF1+rt5q6EDXT0bJ7m1mQgUVP2SjcevP6A/bawWzHNrGqnXD/InC xjjQvFrTbIssI6/DJUys33/jK1yVOppnkofDaNcnRclHh65fWRxNSG0hoLWchOqtZcdF YvXQ== X-Gm-Message-State: AOJu0Yzc7wcLAWmk/qPFMzBcaavYCsKwGKJrR6g0DQOex7Tvqxe32LRQ 654eIJhJenhskzQXgXfVUHLusnQV90aW/kVEi6Sj+0C+866sRweLluQNzw04nXO6TAZCcKFHjxG G X-Gm-Gg: ASbGncuuduGDjBLXLOLS1agrkXChHwgIsVzmq9gMuGTIQ3P/h9rT49Z0fo8q8+VirvJ aa8tbMRBF3rAednTjWRvPrUnfQCElTlXsZuVaOg6xvPQ+G11XiwKbbHusDygRJ5QmKnPK4aWpYl WCxlOPQPEAKuxaaymG5m7l+OsSviaqjAyBrz7OIk4pJNEWD/gzD5HLX/YUHVk8A19X90AD/rtnL XjnB6eG3741oQkJvEj/gRgfGyl8cEOsTwbBV+1MeAUv1sr0YXNgWdCf5/2WVNmFVwoditkn6DqQ hbHy56+YceFxxWlS/NbNJirXqScJZPzK7lSuBBrv69MA/h9uWB+Mig71dyZCSxrO4RyfrdChfmT HBkqMYFuivWJS9A/AYxE= X-Google-Smtp-Source: AGHT+IGkR0G5jetXxrJEiY19iSavAKopIU7YGwPotlmAKPc+GqQ11WPVtrBgTS4ZJUlMxtpmE42NpQ== X-Received: by 2002:a05:600c:4e94:b0:43c:f16a:641e with SMTP id 5b1f17b1804b1-43d509e2e7bmr122857925e9.6.1742906374865; Tue, 25 Mar 2025 05:39:34 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Frederic Konrad , Artyom Tarasenko , Mark Cave-Ayland , =?UTF-8?q?Cl=C3=A9ment=20Chigot?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.1 1/4] target/sparc: Expose more CPU features Date: Tue, 25 Mar 2025 13:39:24 +0100 Message-ID: <20250325123927.74939-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250325123927.74939-1-philmd@linaro.org> References: <20250325123927.74939-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1742906456911019100 Various features were not displayed or settable from command line. Diff of 'qemu-system-sparc -cpu help': ... TI-SuperSparc-60 (IU 40000000 FPU 00000000 MMU 01000800 NWINS 8) TI-SuperSparc-61 (IU 44000000 FPU 00000000 MMU 01000000 NWINS 8) TI-SuperSparc-II (IU 40000000 FPU 00000000 MMU 08000000 NWINS 8) - LEON2 (IU f2000000 FPU 00080000 MMU f2000000 NWINS 8) - LEON3 (IU f3000000 FPU 00080000 MMU f3000000 NWINS 8) + LEON2 (IU f2000000 FPU 00080000 MMU f2000000 NWINS 8) +sh= utdown + LEON3 (IU f3000000 FPU 00080000 MMU f3000000 NWINS 8) +sh= utdown +asr17 +cachectrl +powerdown +casa Default CPU feature flags (use '-' to remove): mul div fsmuld -Available CPU feature flags (use '+' to add): float128 +Available CPU feature flags (use '+' to add): shutdown asr17 cachectrl po= werdown casa float128 Numerical features (use '=3D' to set): iu_version fpu_version mmu_version= nwindows Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/sparc/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 57161201173..37406227cb7 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -548,6 +548,11 @@ static const sparc_def_t sparc_defs[] =3D { /* This must match sparc_cpu_properties[]. */ static const char * const feature_name[] =3D { [CPU_FEATURE_BIT_FLOAT128] =3D "float128", + [CPU_FEATURE_BIT_TA0_SHUTDOWN] =3D "shutdown", + [CPU_FEATURE_BIT_POWERDOWN] =3D "powerdown", + [CPU_FEATURE_BIT_CACHE_CTRL] =3D "cachectrl", + [CPU_FEATURE_BIT_ASR17] =3D "asr17", + [CPU_FEATURE_BIT_CASA] =3D "casa", #ifdef TARGET_SPARC64 [CPU_FEATURE_BIT_CMT] =3D "cmt", [CPU_FEATURE_BIT_GL] =3D "gl", --=20 2.47.1