From nobody Thu Apr 3 11:46:27 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17428859066739.983964643019249; Mon, 24 Mar 2025 23:58:26 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1twyBe-0003e8-6V; Tue, 25 Mar 2025 02:54:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1twyAc-0000HD-12; Tue, 25 Mar 2025 02:53:54 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1twyAQ-00021D-QM; Tue, 25 Mar 2025 02:53:53 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 1363E107D85; Tue, 25 Mar 2025 09:49:34 +0300 (MSK) Received: from gandalf.tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with ESMTP id A9D061D5E90; Tue, 25 Mar 2025 09:50:43 +0300 (MSK) Received: by gandalf.tls.msk.ru (Postfix, from userid 1000) id 9282257068; Tue, 25 Mar 2025 09:50:43 +0300 (MSK) From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Chao Liu , Daniel Henrique Barboza , Alistair Francis , Michael Tokarev Subject: [Stable-9.2.3 67/69] target/riscv: fix handling of nop for vstart >= vl in some vector instruction Date: Tue, 25 Mar 2025 09:50:40 +0300 Message-Id: <20250325065043.3263864-16-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1742885907072019000 Content-Type: text/plain; charset="utf-8" From: Chao Liu Recently, when I was writing a RISCV test, I found that when VL is set to 0= , the instruction should be nop, but when I tested it, I found that QEMU will tre= at all elements as tail elements, and in the case of VTA=3D1, write all elemen= ts to 1. After troubleshooting, it was found that the vext_vx_rm_1 function was call= ed in the vext_vx_rm_2, and then the vext_set_elems_1s function was called to pro= cess the tail element, but only VSTART >=3D vl was checked in the vext_vx_rm_1 function, which caused the tail element to still be processed even if it was returned in advance. So I've made the following change: Put VSTART_CHECK_EARLY_EXIT(env) at the beginning of the vext_vx_rm_2 funct= ion, so that the VSTART register is checked correctly. Fixes: df4252b2ec ("target/riscv/vector_helpers: do early exit when vstart >=3D vl") Signed-off-by: Chao Liu Reviewed-by: Daniel Henrique Barboza Message-ID: Signed-off-by: Alistair Francis (cherry picked from commit 4e9e2478dfd26480bbf50367a67b9be0edafef2b) Signed-off-by: Michael Tokarev diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 08c7b4eaaf..9394a7233c 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -2151,8 +2151,6 @@ vext_vv_rm_1(void *vd, void *v0, void *vs1, void *vs2, uint32_t vl, uint32_t vm, int vxrm, opivv2_rm_fn *fn, uint32_t vma, uint32_t esz) { - VSTART_CHECK_EARLY_EXIT(env, vl); - for (uint32_t i =3D env->vstart; i < vl; i++) { if (!vm && !vext_elem_mask(v0, i)) { /* set masked-off elements to 1s */ @@ -2176,6 +2174,8 @@ vext_vv_rm_2(void *vd, void *v0, void *vs1, void *vs2, uint32_t vta =3D vext_vta(desc); uint32_t vma =3D vext_vma(desc); =20 + VSTART_CHECK_EARLY_EXIT(env, vl); + switch (env->vxrm) { case 0: /* rnu */ vext_vv_rm_1(vd, v0, vs1, vs2, @@ -2278,8 +2278,6 @@ vext_vx_rm_1(void *vd, void *v0, target_long s1, void= *vs2, uint32_t vl, uint32_t vm, int vxrm, opivx2_rm_fn *fn, uint32_t vma, uint32_t esz) { - VSTART_CHECK_EARLY_EXIT(env, vl); - for (uint32_t i =3D env->vstart; i < vl; i++) { if (!vm && !vext_elem_mask(v0, i)) { /* set masked-off elements to 1s */ @@ -2303,6 +2301,8 @@ vext_vx_rm_2(void *vd, void *v0, target_long s1, void= *vs2, uint32_t vta =3D vext_vta(desc); uint32_t vma =3D vext_vma(desc); =20 + VSTART_CHECK_EARLY_EXIT(env, vl); + switch (env->vxrm) { case 0: /* rnu */ vext_vx_rm_1(vd, v0, s1, vs2, @@ -4638,6 +4638,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, = \ uint32_t i; \ TD s1 =3D *((TD *)vs1 + HD(0)); \ \ + VSTART_CHECK_EARLY_EXIT(env, vl); \ + \ for (i =3D env->vstart; i < vl; i++) { \ TS2 s2 =3D *((TS2 *)vs2 + HS2(i)); \ if (!vm && !vext_elem_mask(v0, i)) { \ @@ -4726,6 +4728,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, = \ uint32_t i; \ TD s1 =3D *((TD *)vs1 + HD(0)); \ \ + VSTART_CHECK_EARLY_EXIT(env, vl); \ + \ for (i =3D env->vstart; i < vl; i++) { \ TS2 s2 =3D *((TS2 *)vs2 + HS2(i)); \ if (!vm && !vext_elem_mask(v0, i)) { \ @@ -4890,6 +4894,8 @@ static void vmsetm(void *vd, void *v0, void *vs2, CPU= RISCVState *env, int i; bool first_mask_bit =3D false; =20 + VSTART_CHECK_EARLY_EXIT(env, vl); + for (i =3D env->vstart; i < vl; i++) { if (!vm && !vext_elem_mask(v0, i)) { /* set masked-off elements to 1s */ @@ -4962,6 +4968,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs2, CPUR= ISCVState *env, \ uint32_t sum =3D 0; = \ int i; \ \ + VSTART_CHECK_EARLY_EXIT(env, vl); \ + \ for (i =3D env->vstart; i < vl; i++) { = \ if (!vm && !vext_elem_mask(v0, i)) { \ /* set masked-off elements to 1s */ \ @@ -5320,6 +5328,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void= *vs2, \ uint32_t vta =3D vext_vta(desc); = \ uint32_t num =3D 0, i; = \ \ + VSTART_CHECK_EARLY_EXIT(env, vl); \ + \ for (i =3D env->vstart; i < vl; i++) { = \ if (!vext_elem_mask(vs1, i)) { \ continue; \ --=20 2.39.5