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([38.39.164.180]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-301bf58b413sm14595120a91.13.2025.03.24.21.59.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Mar 2025 21:59:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1742878783; x=1743483583; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JtusWKYTrMDoHpdfg0nshB8ODIflkcfJFt+VFvekQoU=; b=fV3eTQSLHlCNRbuDaBE1mU+AknsXZZS2d1ywwIUvCGoaPNwGUERvQESf8XSbo2fnQt e+HDnWHlEdNWjTV+UKfiWIY6WVIM7k0Rb6WMKknZWbDNjSAgusDxw0sTxTguhQLBNnfL wFsaVxDHFKza+73/Hh0tpikZpQRyte6LnINtsV6k02Sy+nLF4ZLKqPEM8NqEP4OpjrV/ CyrxJY0DsU6hrln+g6gNyumc8OU6aT7fZdk0RkPQ9smuKtAJgMBjCR2dNLVx1BUfPsc0 mEk9yOzhug0gYwW0DQiGp8QksK+h3CP7pqekxZxKE6V1ZtXHoJR2TyBEtsjSIjKb6Dsl GdiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742878783; x=1743483583; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JtusWKYTrMDoHpdfg0nshB8ODIflkcfJFt+VFvekQoU=; b=bCERvgWVj/BmtqYCCSNQOXed6P1UEb3YRpGsX0rlGUNJt6DsM3DPamYg/84KtxZwBY uhiH/+OIQjlljh32kLMMnuaPWBoz1AsZJwRdFhPHqNvS8RBluaN635Zu/pgLXly1KWOn EZPqL1epWcFflOAvkegwwMvGkWjPg/5zSTKeeBhQvO48xIZHgOC6b4PlkF0mocf+NOOX fFXYJPPlq2Sa0vAoQIjRXkkd6RrvTPa5UfwwOtswC+dULgDb9LPgLUQvBtOFh53GxMut aYvrM+JVv/4pfB5UTQ7kSN6ZEY4bEO1B9p6dNnZFNXkjBDw6ae6uwzQNqwGlaFWiu6lA IkEw== X-Gm-Message-State: AOJu0Yx55bnjXOf8lz2LcsyDOvxJucKE/Db6vofO0ahopeFNGoL1FRSt ynT3FDjBe7ysvVGthOtXg64pQaVJnP72KPsnXo1npLwiqmzFw6k99795+ohDDsdQSaeRAMRbUsj I X-Gm-Gg: ASbGncvq8QL2w4wyqITOE37Y6/wFC27BrusnTh2WkJJ1AbgQWiqVblbZVMda6cvFnk9 FJl3LKHc4wrETgeYpQzAUEGlqYNEfl/sM8F1U2hZXFFE41dHzq5nRnn37rnyfQ4xiG4+zb8Yg3A sLwoqDHsTU96mCJHq45U2Kp4ErFmGxH9IMSJ43OeaHCEe5uGsAobEUp1bf9SjJS5ZvulK2LQwsk Rp37uuBAoNIvWxNcSG6AM/6Q1NxuQqGtKWm44CofW2DHiDA+8ubNu0/2/VpUdZAHese8a+TTW54 /SYvWg2yFk2JZ2ysgQN4bfDra5iVZz2XgBMtF+VK+iCQWyGKOQUX9CY= X-Google-Smtp-Source: AGHT+IF7fVNDkEZpxZD3TpaipUefPuzR5blv1e1P/DipQrGSgNSjRKkE8a4ucCi3CcRYcjp1MOK1Kw== X-Received: by 2002:a17:903:46c3:b0:21b:d2b6:ca7f with SMTP id d9443c01a7336-22780e07919mr289321195ad.32.1742878782353; Mon, 24 Mar 2025 21:59:42 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: Peter Maydell , Richard Henderson , qemu-arm@nongnu.org, Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , kvm@vger.kernel.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Pierrick Bouvier Subject: [PATCH v3 22/29] target/arm/cpu: remove inline stubs for aarch32 emulation Date: Mon, 24 Mar 2025 21:59:07 -0700 Message-Id: <20250325045915.994760-23-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250325045915.994760-1-pierrick.bouvier@linaro.org> References: <20250325045915.994760-1-pierrick.bouvier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=pierrick.bouvier@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1742878979463019000 Content-Type: text/plain; charset="utf-8" Directly condition associated calls in target/arm/helper.c for now. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- target/arm/cpu.h | 8 -------- target/arm/helper.c | 6 ++++++ 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index b1c3e463267..c1a0faed3ad 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1222,7 +1222,6 @@ int arm_cpu_write_elf32_note(WriteCoreDumpFunction f,= CPUState *cs, */ void arm_emulate_firmware_reset(CPUState *cpustate, int target_el); =20 -#ifdef TARGET_AARCH64 int aarch64_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq); @@ -1254,13 +1253,6 @@ static inline uint64_t *sve_bswap64(uint64_t *dst, u= int64_t *src, int nr) #endif } =20 -#else -static inline void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq) { } -static inline void aarch64_sve_change_el(CPUARMState *env, int o, - int n, bool a) -{ } -#endif - void aarch64_sync_32_to_64(CPUARMState *env); void aarch64_sync_64_to_32(CPUARMState *env); =20 diff --git a/target/arm/helper.c b/target/arm/helper.c index fa23e309040..73e98532c03 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6564,7 +6564,9 @@ static void zcr_write(CPUARMState *env, const ARMCPRe= gInfo *ri, */ new_len =3D sve_vqm1_for_el(env, cur_el); if (new_len < old_len) { +#ifdef TARGET_AARCH64 aarch64_sve_narrow_vq(env, new_len + 1); +#endif } } =20 @@ -10648,7 +10650,9 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *= cs) * Note that new_el can never be 0. If cur_el is 0, then * el0_a64 is is_a64(), else el0_a64 is ignored. */ +#ifdef TARGET_AARCH64 aarch64_sve_change_el(env, cur_el, new_el, is_a64(env)); +#endif } =20 if (cur_el < new_el) { @@ -11665,7 +11669,9 @@ void aarch64_sve_change_el(CPUARMState *env, int ol= d_el, =20 /* When changing vector length, clear inaccessible state. */ if (new_len < old_len) { +#ifdef TARGET_AARCH64 aarch64_sve_narrow_vq(env, new_len + 1); +#endif } } #endif --=20 2.39.5