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Iglesias" , Markus Armbruster , Akihiko Odaki , qemu-ppc@nongnu.org, Richard Henderson , Thomas Huth , David Gibson , Daniel Henrique Barboza , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Ilya Leoshkevich , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , qemu-s390x@nongnu.org, Wainer dos Santos Moschetta , =?UTF-8?q?Alex=20Benn=C3=A9e?= , David Hildenbrand , Pierrick Bouvier Subject: [PATCH v2 09/11] target/ppc: convert gdbstub to new helpers Date: Mon, 24 Mar 2025 10:21:40 +0000 Message-Id: <20250324102142.67022-10-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250324102142.67022-1-alex.bennee@linaro.org> References: <20250324102142.67022-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x629.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1742811829659116600 By passing the explicit state of LE/BE via the memop we can avoid the messing about we do with ppc_maybe_bswap_register() at least for supplying register values to gdbstub. The fact we still need the helper for setting the values probably indicates we could do with a reverse helper, possibly to setting env vars directly? This is complicated by aliasing though. We also have to deal with heavy usage of target_ulong so we copy some macro stuff from the old helpers.h and add a gdb_get_regl_value() helper. Signed-off-by: Alex Benn=C3=A9e --- v2 - use new helpers - fix bunch of target_ulong cases --- target/ppc/gdbstub.c | 195 ++++++++++++++++++++++++------------------- 1 file changed, 111 insertions(+), 84 deletions(-) diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c index c09e93abaf..b96c3ac5b8 100644 --- a/target/ppc/gdbstub.c +++ b/target/ppc/gdbstub.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/gdbstub.h" -#include "gdbstub/helpers.h" +#include "gdbstub/registers.h" #include "internal.h" =20 static int ppc_gdb_register_len_apple(int n) @@ -74,12 +74,12 @@ static int ppc_gdb_register_len(int n) } =20 /* - * We need to present the registers to gdb in the "current" memory - * ordering. For user-only mode we get this for free; - * TARGET_BIG_ENDIAN is set to the proper ordering for the - * binary, and cannot be changed. For system mode, - * TARGET_BIG_ENDIAN is always set, and we must check the current - * mode of the chip to see if we're running in little-endian. + * We need to map the target endian registers from gdb in the + * "current" memory ordering. For user-only mode we get this for free; + * TARGET_BIG_ENDIAN is set to the proper ordering for the binary, and + * cannot be changed. For system mode, TARGET_BIG_ENDIAN is always + * set, and we must check the current mode of the chip to see if we're + * running in little-endian. */ static void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, i= nt len) { @@ -98,6 +98,41 @@ static void ppc_maybe_bswap_register(CPUPPCState *env, u= int8_t *mem_buf, int len #endif } =20 +/* + * We need to present the registers to gdb in the "current" memory + * ordering. For user-only mode this is hardwired by TARGET_BIG_ENDIAN + * and cannot be changed. For system mode we must check the current + * mode of the chip to see if we're running in little-endian. + */ +static MemOp ppc_gdb_memop(CPUPPCState *env, int len) +{ +#ifndef CONFIG_USER_ONLY + MemOp end =3D FIELD_EX64(env->msr, MSR, LE) ? MO_LE : MO_BE; +#else + #ifdef TARGET_BIG_ENDIAN + MemOp end =3D MO_BE; + #else + MemOp end =3D MO_LE; + #endif +#endif + + return size_memop(len) | end; +} + +/* + * Helpers copied from helpers.h just for handling target_ulong values + * from gdbstub's GByteArray based on what the build config is. This + * will need fixing for single-binary. + */ + +#if TARGET_LONG_BITS =3D=3D 64 +#define ldtul_p(addr) ldq_p(addr) +#define gdb_get_regl_value(m, b, v) gdb_get_reg64_value(m, b, v) +#else +#define ldtul_p(addr) ldl_p(addr) +#define gdb_get_regl_value(m, b, v) gdb_get_reg32_value(m, b, v) +#endif + /* * Old gdb always expects FP registers. Newer (xml-aware) gdb only * expects whatever the target description contains. Due to a @@ -109,51 +144,50 @@ static void ppc_maybe_bswap_register(CPUPPCState *env= , uint8_t *mem_buf, int len int ppc_cpu_gdb_read_register(CPUState *cs, GByteArray *buf, int n) { CPUPPCState *env =3D cpu_env(cs); - uint8_t *mem_buf; int r =3D ppc_gdb_register_len(n); + MemOp mo; =20 if (!r) { return r; } =20 + mo =3D ppc_gdb_memop(env, r); + if (n < 32) { /* gprs */ - gdb_get_regl(buf, env->gpr[n]); + return gdb_get_regl_value(mo, buf, &env->gpr[n]); } else { switch (n) { case 64: - gdb_get_regl(buf, env->nip); - break; + return gdb_get_regl_value(mo, buf, &env->nip); case 65: - gdb_get_regl(buf, env->msr); - break; + return gdb_get_regl_value(mo, buf, &env->msr); case 66: { uint32_t cr =3D ppc_get_cr(env); - gdb_get_reg32(buf, cr); - break; + return gdb_get_register_value(ppc_gdb_memop(env, 4), buf, = &cr); } case 67: - gdb_get_regl(buf, env->lr); + return gdb_get_regl_value(mo, buf, &env->lr); break; case 68: - gdb_get_regl(buf, env->ctr); + return gdb_get_regl_value(mo, buf, &env->ctr); break; case 69: - gdb_get_reg32(buf, cpu_read_xer(env)); - break; + uint32_t val =3D cpu_read_xer(env); + return gdb_get_register_value(ppc_gdb_memop(env, 4), buf, &val= ); } } - mem_buf =3D buf->data + buf->len - r; - ppc_maybe_bswap_register(env, mem_buf, r); - return r; + + return 0; } =20 int ppc_cpu_gdb_read_register_apple(CPUState *cs, GByteArray *buf, int n) { CPUPPCState *env =3D cpu_env(cs); - uint8_t *mem_buf; int r =3D ppc_gdb_register_len_apple(n); + MemOp mo =3D ppc_gdb_memop(env, r); + int actual =3D 0; =20 if (!r) { return r; @@ -161,44 +195,48 @@ int ppc_cpu_gdb_read_register_apple(CPUState *cs, GBy= teArray *buf, int n) =20 if (n < 32) { /* gprs */ - gdb_get_reg64(buf, env->gpr[n]); + actual =3D gdb_get_regl_value(mo, buf, &env->gpr[n]); } else if (n < 64) { /* fprs */ - gdb_get_reg64(buf, *cpu_fpr_ptr(env, n - 32)); + actual =3D gdb_get_reg64_value(mo, buf, cpu_fpr_ptr(env, n - 32)); } else if (n < 96) { - /* Altivec */ - gdb_get_reg64(buf, n - 64); - gdb_get_reg64(buf, 0); + /* Altivec - where are they? ppc_vsr_t vsr[64]? */ + uint64_t empty =3D 0; + actual =3D gdb_get_reg64_value(mo, buf, &empty); + actual =3D gdb_get_reg64_value(mo, buf, &empty); } else { switch (n) { case 64 + 32: - gdb_get_reg64(buf, env->nip); + actual =3D gdb_get_regl_value(mo, buf, &env->nip); break; case 65 + 32: - gdb_get_reg64(buf, env->msr); + actual =3D gdb_get_regl_value(mo, buf, &env->msr); break; case 66 + 32: - { - uint32_t cr =3D ppc_get_cr(env); - gdb_get_reg32(buf, cr); - break; - } + { + uint32_t cr =3D ppc_get_cr(env); + actual =3D gdb_get_reg32_value(mo, buf, &cr); + break; + } case 67 + 32: - gdb_get_reg64(buf, env->lr); + actual =3D gdb_get_regl_value(mo, buf, &env->lr); break; case 68 + 32: - gdb_get_reg64(buf, env->ctr); + actual =3D gdb_get_regl_value(mo, buf, &env->ctr); break; case 69 + 32: - gdb_get_reg32(buf, cpu_read_xer(env)); + { + uint32_t xer =3D cpu_read_xer(env); + actual =3D gdb_get_reg32_value(mo, buf, &xer); break; + } case 70 + 32: - gdb_get_reg64(buf, env->fpscr); + actual =3D gdb_get_regl_value(mo, buf, &env->fpscr); break; } } - mem_buf =3D buf->data + buf->len - r; - ppc_maybe_bswap_register(env, mem_buf, r); + + g_assert(r =3D=3D actual); return r; } =20 @@ -210,6 +248,9 @@ int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t *m= em_buf, int n) if (!r) { return r; } + + g_assert(r =3D=3D n); + =20 ppc_maybe_bswap_register(env, mem_buf, r); if (n < 32) { /* gprs */ @@ -367,18 +408,16 @@ static int gdb_get_spr_reg(CPUState *cs, GByteArray *= buf, int n) { PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; + MemOp mo =3D ppc_gdb_memop(env, TARGET_LONG_SIZE); + target_ulong val; int reg; - int len; =20 reg =3D gdb_find_spr_idx(env, n); if (reg < 0) { return 0; } =20 - len =3D TARGET_LONG_SIZE; - /* Handle those SPRs that are not part of the env->spr[] array */ - target_ulong val; switch (reg) { #if defined(TARGET_PPC64) case SPR_CFAR: @@ -400,10 +439,7 @@ static int gdb_get_spr_reg(CPUState *cs, GByteArray *b= uf, int n) default: val =3D env->spr[reg]; } - gdb_get_regl(buf, val); - - ppc_maybe_bswap_register(env, gdb_get_reg_ptr(buf, len), len); - return len; + return gdb_get_regl_value(mo, buf, &val); } =20 static int gdb_set_spr_reg(CPUState *cs, uint8_t *mem_buf, int n) @@ -441,18 +477,14 @@ static int gdb_get_float_reg(CPUState *cs, GByteArray= *buf, int n) { PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; - uint8_t *mem_buf; + MemOp mo; if (n < 32) { - gdb_get_reg64(buf, *cpu_fpr_ptr(env, n)); - mem_buf =3D gdb_get_reg_ptr(buf, 8); - ppc_maybe_bswap_register(env, mem_buf, 8); - return 8; + mo =3D ppc_gdb_memop(env, 8); + return gdb_get_reg64_value(mo, buf, cpu_fpr_ptr(env, n)); } if (n =3D=3D 32) { - gdb_get_reg32(buf, env->fpscr); - mem_buf =3D gdb_get_reg_ptr(buf, 4); - ppc_maybe_bswap_register(env, mem_buf, 4); - return 4; + mo =3D ppc_gdb_memop(env, TARGET_LONG_SIZE); + return gdb_get_regl_value(mo, buf, &env->fpscr); } return 0; } @@ -479,26 +511,21 @@ static int gdb_get_avr_reg(CPUState *cs, GByteArray *= buf, int n) { PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; - uint8_t *mem_buf; + MemOp mo; =20 if (n < 32) { ppc_avr_t *avr =3D cpu_avr_ptr(env, n); - gdb_get_reg128(buf, avr->VsrD(0), avr->VsrD(1)); - mem_buf =3D gdb_get_reg_ptr(buf, 16); - ppc_maybe_bswap_register(env, mem_buf, 16); - return 16; + mo =3D ppc_gdb_memop(env, 16); + return gdb_get_register_value(mo, buf, avr); } if (n =3D=3D 32) { - gdb_get_reg32(buf, ppc_get_vscr(env)); - mem_buf =3D gdb_get_reg_ptr(buf, 4); - ppc_maybe_bswap_register(env, mem_buf, 4); - return 4; + uint32_t vscr =3D ppc_get_vscr(env); + mo =3D ppc_gdb_memop(env, 4); + return gdb_get_reg32_value(mo, buf, &vscr); } if (n =3D=3D 33) { - gdb_get_reg32(buf, (uint32_t)env->spr[SPR_VRSAVE]); - mem_buf =3D gdb_get_reg_ptr(buf, 4); - ppc_maybe_bswap_register(env, mem_buf, 4); - return 4; + mo =3D ppc_gdb_memop(env, TARGET_LONG_SIZE); + return gdb_get_regl_value(mo, buf, &env->spr[SPR_VRSAVE]); } return 0; } @@ -532,25 +559,25 @@ static int gdb_get_spe_reg(CPUState *cs, GByteArray *= buf, int n) { PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; + MemOp mo; =20 if (n < 32) { #if defined(TARGET_PPC64) - gdb_get_reg32(buf, env->gpr[n] >> 32); - ppc_maybe_bswap_register(env, gdb_get_reg_ptr(buf, 4), 4); + uint32_t low =3D env->gpr[n] >> 32; + mo =3D ppc_gdb_memop(env, 4); + return gdb_get_reg32_value(mo, buf, &low); #else - gdb_get_reg32(buf, env->gprh[n]); + mo =3D ppc_gdb_memop(env, 4); + return gdb_get_reg32_value(mo, buf, &env->gprh[n]); #endif - return 4; } if (n =3D=3D 32) { - gdb_get_reg64(buf, env->spe_acc); - ppc_maybe_bswap_register(env, gdb_get_reg_ptr(buf, 8), 8); - return 8; + mo =3D ppc_gdb_memop(env, 8); + return gdb_get_reg64_value(mo, buf, &env->spe_acc); } if (n =3D=3D 33) { - gdb_get_reg32(buf, env->spe_fscr); - ppc_maybe_bswap_register(env, gdb_get_reg_ptr(buf, 4), 4); - return 4; + mo =3D ppc_gdb_memop(env, 4); + return gdb_get_reg32_value(mo, buf, &env->spe_fscr); } return 0; } @@ -593,9 +620,9 @@ static int gdb_get_vsx_reg(CPUState *cs, GByteArray *bu= f, int n) CPUPPCState *env =3D &cpu->env; =20 if (n < 32) { - gdb_get_reg64(buf, *cpu_vsrl_ptr(env, n)); - ppc_maybe_bswap_register(env, gdb_get_reg_ptr(buf, 8), 8); - return 8; + return gdb_get_reg64_value(ppc_gdb_memop(env, 8), + buf, + cpu_vsrl_ptr(env, n)); } return 0; } --=20 2.39.5