From nobody Wed Apr 2 13:28:54 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1742538584; cv=none; d=zohomail.com; s=zohoarc; b=DKs3JHg7fbhuQTg/0yRLcJZwyeEmBprhYFpMG1vD8FZIL8sTqisniVdBbMjkh8g3ljSM4ydWbp+f7N9T3tjKzQIN9NVxwV5R5Q2g2n9G+2ygnypuYiSGbQD0xLVDuyliUsOkrnUuYhxPmr59KCe3dzmeUV2QuuJz2JeABWtfo/s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1742538584; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=e7DqV4tV/voUsRe6QWgdTDXfFT62jTytrnlFn7HzaIs=; b=KxyPcer+GJFGbLjW/T9Z1hRJu0hOK9VdhL6dJ8xH8bFoPzUeSvJE2TX3pU/2fzS7JCXKec3z2f7xBcnntZrfc6g0Yt6sBykLHSXF1N+urCFnLpdo4QeqBtRFj/1Nnvrc50yBbK3ZGTGTOOtzUN4vf2v0Zr5TrgIU2s5+syuJMSY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1742538584113981.931134721918; Thu, 20 Mar 2025 23:29:44 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tvVrH-0003R6-Ch; Fri, 21 Mar 2025 02:27:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tvVoq-0008Us-QM; Fri, 21 Mar 2025 02:25:28 -0400 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tvVoZ-000345-38; Fri, 21 Mar 2025 02:25:11 -0400 Received: by mail-pl1-x62c.google.com with SMTP id d9443c01a7336-22580c9ee0aso32598455ad.2; Thu, 20 Mar 2025 23:25:03 -0700 (PDT) Received: from wheely.local0.net ([118.208.135.36]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-af8a2a4761fsm941381a12.65.2025.03.20.23.24.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Mar 2025 23:25:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1742538302; x=1743143102; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=e7DqV4tV/voUsRe6QWgdTDXfFT62jTytrnlFn7HzaIs=; b=C8y2CpyjqBCc1vvuKFXBsFD/PJ5ycJXIQ+Jvd2ED9VVM2h9KFphuQnplj+/ref+NyH Q2jTOc8f6PxeAswIsnhE8kFn0wUONOH+vvl23n41EZk8SCKhwMNYNRYvoxz+oWIVIdF3 qGSgHW6N4DZ3I7BZS1IQoxQqQshVfUOMZriQkSkcq7lxtX8lGLpsrqapufZuPj79w+xD vcRYozV2/fZ7vCtEi4Z4+2bY1CEk4hCTyPDk6/91CN/MdLxxZGt9xBm8Udoh7s35wonr 3wXQ1zhR0UW8rU5F8hpOvZ73C5KrDBIDjQJNs90ObBSA14juPuEgzfPYJvbUq0Cyi9je Z6yA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742538302; x=1743143102; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e7DqV4tV/voUsRe6QWgdTDXfFT62jTytrnlFn7HzaIs=; b=wVWId6bao/ESWGD7R/flz0qTOnZvi8qvfsi7r5UGWCqJQbi/g9w69wDtGSetoT70Zp zqXp+5FGDZWlSi1bN/TMHQtJ4hI1MdVIRRa/CshFp2Io9y1VbUgGWckGV09msmvtgj43 mQh+MMMxUdDn8MtFdlY9upWnz4Bd8ZjI7gLbnkwBUrQIgLg4KztSK4nfxsEe9Db+4Y4+ sHiM/3/8qCwe700dM52p9hIQXVrR3ETO3StbVRuJB0Cr/Ur/rjS+Kvtw08ycmZH5cvt6 XxKTe3ay6z1pokHZVFI+7X7yaUKXB2qlpLpbtZqXDGuFxMcTsypYnYBx3gkMgIGMcjZU /1SQ== X-Forwarded-Encrypted: i=1; AJvYcCVwHpwyclcV9Gy72PBu5ZM+51uewVFjsylY/aUISRUvuLIjkdEM+PMRk1bA4iDg6ZW8UnbyRqtiD/OB7Xg=@nongnu.org, AJvYcCWWnogKuNA3ZGmzmz+pfNbNGUIQcJ96s4H8IS6qKWFx1HcAuIh+np73/7fGdyu7wdI3i8nJY5z2YQ==@nongnu.org X-Gm-Message-State: AOJu0YxzZaU61zNFaL2rTI7dovVU+ET/HSWmCy8l8bZu+O8XmduMi3u5 /tpSioNpEBQPZgSd7nliAHEUc0asR4Fp2VMpzd2wY5n24+x3S07xJF1euQ== X-Gm-Gg: ASbGncuylApWYLE8VegbRsLy+mHUDFp2v5+KMfBiK4j26ZTu00cezIFMPfqg0jDBjqF V08bHcgBEoHjgqSb5CDJYcizCifIJ4ycNw9MjPqH6WXd4jyC+CL/NZrbdXIt07t15i7HVLK8Xiq l3FZ/Wr11SPPVBt9Mnz0xOAQ+L2LSIey4ywsUKT1lkBNUqiHISjQISpE+P8VfRwND7hdtEDPgc1 3/Y8GoAqW9btrLSFM9qLTCLi4p0njee60hE2MsEa9CRPGF7Dtq8HWuKnyDIomZEyDX6fP9U0gs3 H8682VK3c6WbWhvJpOUSsab5nQdoWNiBWzk/fcAsdC7wIlJC5g== X-Google-Smtp-Source: AGHT+IGdLwwP+v4bVMmXG7zn9pCGOTBGiaziUN/j24uCJ5F1LwW29b5eEDovMAIy5qpW/j/J4JJiWQ== X-Received: by 2002:a05:6a21:9214:b0:1f5:8e04:f186 with SMTP id adf61e73a8af0-1fe4347d987mr4155579637.35.1742538302414; Thu, 20 Mar 2025 23:25:02 -0700 (PDT) From: Nicholas Piggin To: qemu-devel@nongnu.org Cc: Nicholas Piggin , qemu-ppc@nongnu.org, Chinmay Rath , qemu-stable@nongnu.org, Richard Henderson Subject: [PULL 11/12] target/ppc: Fix facility interrupt checks for VSX Date: Fri, 21 Mar 2025 16:24:15 +1000 Message-ID: <20250321062421.116129-12-npiggin@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250321062421.116129-1-npiggin@gmail.com> References: <20250321062421.116129-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=npiggin@gmail.com; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1742538585792019000 Content-Type: text/plain; charset="utf-8" Facility interrupt checks in general should come after the ISA version check, because the facility interrupt and facility type themselves are ISA dependent and should not appear on CPUs where the instruction does not exist at all. This resolves a QEMU crash booting NetBSD/macppc due to qemu: fatal: Raised an exception without defined vector 94 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2741 Cc: Chinmay Rath Cc: qemu-stable@nongnu.org Debugged-by: Richard Henderson Reviewed-by: Richard Henderson Fixes: aa0f34ec3fc7 ("target/ppc: implement vrlq") Fixes: 7419dc5b2b5b ("target/ppc: Move VSX vector storage access insns to d= ecodetree.") Signed-off-by: Nicholas Piggin --- target/ppc/translate/vmx-impl.c.inc | 2 +- target/ppc/translate/vsx-impl.c.inc | 20 ++++++++++---------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx= -impl.c.inc index 70d0ad2e71..92d6e8c603 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -994,8 +994,8 @@ static bool do_vector_rotl_quad(DisasContext *ctx, arg_= VX *a, bool mask, { TCGv_i64 ah, al, vrb, n, t0, t1, zero =3D tcg_constant_i64(0); =20 - REQUIRE_VECTOR(ctx); REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); =20 ah =3D tcg_temp_new_i64(); al =3D tcg_temp_new_i64(); diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx= -impl.c.inc index a869f30e86..00ad57c628 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -61,8 +61,8 @@ static bool trans_LXVD2X(DisasContext *ctx, arg_LXVD2X *a) TCGv EA; TCGv_i64 t0; =20 - REQUIRE_VSX(ctx); REQUIRE_INSNS_FLAGS2(ctx, VSX); + REQUIRE_VSX(ctx); =20 t0 =3D tcg_temp_new_i64(); gen_set_access_type(ctx, ACCESS_INT); @@ -80,8 +80,8 @@ static bool trans_LXVW4X(DisasContext *ctx, arg_LXVW4X *a) TCGv EA; TCGv_i64 xth, xtl; =20 - REQUIRE_VSX(ctx); REQUIRE_INSNS_FLAGS2(ctx, VSX); + REQUIRE_VSX(ctx); =20 xth =3D tcg_temp_new_i64(); xtl =3D tcg_temp_new_i64(); @@ -113,12 +113,12 @@ static bool trans_LXVWSX(DisasContext *ctx, arg_LXVWS= X *a) TCGv EA; TCGv_i32 data; =20 + REQUIRE_INSNS_FLAGS2(ctx, ISA300); if (a->rt < 32) { REQUIRE_VSX(ctx); } else { REQUIRE_VECTOR(ctx); } - REQUIRE_INSNS_FLAGS2(ctx, ISA300); =20 gen_set_access_type(ctx, ACCESS_INT); EA =3D do_ea_calc(ctx, a->ra, cpu_gpr[a->rb]); @@ -133,8 +133,8 @@ static bool trans_LXVDSX(DisasContext *ctx, arg_LXVDSX = *a) TCGv EA; TCGv_i64 data; =20 - REQUIRE_VSX(ctx); REQUIRE_INSNS_FLAGS2(ctx, VSX); + REQUIRE_VSX(ctx); =20 gen_set_access_type(ctx, ACCESS_INT); EA =3D do_ea_calc(ctx, a->ra, cpu_gpr[a->rb]); @@ -185,8 +185,8 @@ static bool trans_LXVH8X(DisasContext *ctx, arg_LXVH8X = *a) TCGv EA; TCGv_i64 xth, xtl; =20 - REQUIRE_VSX(ctx); REQUIRE_INSNS_FLAGS2(ctx, ISA300); + REQUIRE_VSX(ctx); =20 xth =3D tcg_temp_new_i64(); xtl =3D tcg_temp_new_i64(); @@ -208,8 +208,8 @@ static bool trans_LXVB16X(DisasContext *ctx, arg_LXVB16= X *a) TCGv EA; TCGv_i128 data; =20 - REQUIRE_VSX(ctx); REQUIRE_INSNS_FLAGS2(ctx, ISA300); + REQUIRE_VSX(ctx); =20 data =3D tcg_temp_new_i128(); gen_set_access_type(ctx, ACCESS_INT); @@ -312,8 +312,8 @@ static bool trans_STXVD2X(DisasContext *ctx, arg_STXVD2= X *a) TCGv EA; TCGv_i64 t0; =20 - REQUIRE_VSX(ctx); REQUIRE_INSNS_FLAGS2(ctx, VSX); + REQUIRE_VSX(ctx); =20 t0 =3D tcg_temp_new_i64(); gen_set_access_type(ctx, ACCESS_INT); @@ -331,8 +331,8 @@ static bool trans_STXVW4X(DisasContext *ctx, arg_STXVW4= X *a) TCGv EA; TCGv_i64 xsh, xsl; =20 - REQUIRE_VSX(ctx); REQUIRE_INSNS_FLAGS2(ctx, VSX); + REQUIRE_VSX(ctx); =20 xsh =3D tcg_temp_new_i64(); xsl =3D tcg_temp_new_i64(); @@ -364,8 +364,8 @@ static bool trans_STXVH8X(DisasContext *ctx, arg_STXVH8= X *a) TCGv EA; TCGv_i64 xsh, xsl; =20 - REQUIRE_VSX(ctx); REQUIRE_INSNS_FLAGS2(ctx, ISA300); + REQUIRE_VSX(ctx); =20 xsh =3D tcg_temp_new_i64(); xsl =3D tcg_temp_new_i64(); @@ -394,8 +394,8 @@ static bool trans_STXVB16X(DisasContext *ctx, arg_STXVB= 16X *a) TCGv EA; TCGv_i128 data; =20 - REQUIRE_VSX(ctx); REQUIRE_INSNS_FLAGS2(ctx, ISA300); + REQUIRE_VSX(ctx); =20 data =3D tcg_temp_new_i128(); gen_set_access_type(ctx, ACCESS_INT); --=20 2.47.1