From nobody Thu Apr 3 10:10:54 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=sifive.com ARC-Seal: i=1; a=rsa-sha256; t=1742412227; cv=none; d=zohomail.com; s=zohoarc; b=gklgadQiJOnZqonCOEopufLBFofi2D/Ej1ummOu+XA9uXVA22xkf4ppd8ipx0ZNHYBMo+DE44Zr8EK4QmTm09rXa7GmRVr1fR91O9jbQMNFYdQWvsbX8BkGxn8E/cH6kqTeKgmkY2OHFsAuCv8LUusDzsqGYU+8QOSK2EbW/shQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1742412227; h=Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=JQssGOpztpWWFjOnWZYSMTHISmCvQCvOgUNRyvmYuFc=; b=GW1iGU/QWXlP6XWDwAr3P/n8PKJJF203ypllAki3R94eLByMKqAxgSxg3Zf+6A9ecmztnyuJfdLQVaTWqh+WSUou05AVz/PD1s9UUvEL7G9jbfeuTZC9Qvtaci2Gpxh1qpGCXez3SfgKQD6hBT1DLLzUH0WWqRPn/hTw/AxK1Jw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1742412227750751.2060373738327; Wed, 19 Mar 2025 12:23:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tuyza-0007Mm-TE; Wed, 19 Mar 2025 15:22:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tuyzY-0007LV-94 for qemu-devel@nongnu.org; Wed, 19 Mar 2025 15:22:16 -0400 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tuyzW-0002Bk-8p for qemu-devel@nongnu.org; Wed, 19 Mar 2025 15:22:15 -0400 Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-225a28a511eso130577015ad.1 for ; Wed, 19 Mar 2025 12:22:13 -0700 (PDT) Received: from hsinchu26.internal.sifive.com ([210.176.154.34]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-af56ea947a4sm11432175a12.70.2025.03.19.12.22.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Mar 2025 12:22:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1742412132; x=1743016932; darn=nongnu.org; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=JQssGOpztpWWFjOnWZYSMTHISmCvQCvOgUNRyvmYuFc=; b=ArwVeVvFQYCFlTEHdHDucckQBFFTRjDdHXpZX47f/XGhqKFKRIHZvNXAnxJd0ycdUg i9x+SdgrBc/rG5k6M5IX5/diSlN3iXh9qqfw5cxwByiZ9FCgKbdtBkLqDnt4fa5UjdQQ DqpW7Tsyxju8cda8arNTFjCy0iPMt1ckmlqLm9bwg5gWBdjvxzW9MlDQvU7ToY5wsNGn 5wAgvOKEekXe33YA8pmLXrEkL9oB4ILnj9IWwVkhiKuThxLgcs2bz2DO0rDgj6Pyr4Us 4IhqKm2RhWzPqPesjB247FAfUozs8fp5R925Qc1CwmInDHhSRhraUWHupgWC2OLvXaPm V9/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742412132; x=1743016932; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=JQssGOpztpWWFjOnWZYSMTHISmCvQCvOgUNRyvmYuFc=; b=Dy4RPsNaX7C6loIcSX3DYKaFdMsJtEduPuybuOfHTbbiNDIw7tIALLcKqI7rx8WbBd OwI6kduuAwxZjCBS6oI6i6EVvRnqfdkwVEZl3NCro+f58qXnBocZXf7bhe0eUyiPsIDN V8Xk/tNDprrcaXLxBW7/nN++90YidlsqvQRyv+a0ajRLebSUk9p+itXgY7zHSPgVHu5/ tUQLdkzlID6StT01rLQ78XpN5klvgur5VEF64cyjVIAEpZZ2mP0RjNqXJ1NzpVnoLfe0 Pq2l4N0fJpL+N9UJO3EdPw+v05KrDEr4JdyPfWIj8VhtKopoImBp1KvdAfzeb4vZE4M6 ksvw== X-Gm-Message-State: AOJu0Yywbophntq3jlN170mkfqYcR3qAbrZ1x+UTN4VtHip9J+fe0jfg I8p/DmgJHxHtyiMG9uM7PrPda1zOcz030kn3emP1FKXzo+conBwai0/HCOMd3a8/PPHC0YQNvay aARRHCPvM78EN1qIc3XjQH+GnUKaFs5/hEoVo2J4ptcqemM5s6/mzy9bmP1G9RSs0SE5x0amOMg nBxFZwGokX9JGTG135tycfpSt9dHnxLB2K3w== X-Gm-Gg: ASbGncs1h1Q/8X+FKIIxR5ABPNi9MvQeqRFU6QJhcLpdmST2QRR/srjYtBDwiGhib1k 7FE3Lp806jSZ96VcFQZuNg+CEoJlEOEYUBEfjr4aTTDmON3O3DfhEA1hM8zxar4ANMi9K/iRyHT 0lniZ3urOTVn3sGEziYkkC4ssPgzkgE9C6RKDd5CV0Dg/R/MqtdMtcyn5h7x3iRSKOa7KYTXTCb DytrHj0XLbmK4nV9jq4oihueCMh6zH81+5BSVuxViYld8UtxxMeLDr3QEJjfSKrNaEglHFsvZbf fZ7MrgxMaRTGy5nN24nnxYj8DVgxgEIx54tUbyn8o+9p5YsebjMeZBCbuxjcJLg2cxo= X-Google-Smtp-Source: AGHT+IFOBEEk6Zvcy0YZNa94DqJbNRt8nM7g2pXo7E0hp0OY+ylUnVnSde/3M7z7paZURqHpnqVpBQ== X-Received: by 2002:a05:6a21:48c:b0:1f5:7eb5:72dc with SMTP id adf61e73a8af0-1fbeb1854b1mr6743816637.3.1742412132248; Wed, 19 Mar 2025 12:22:12 -0700 (PDT) From: Jim Shu To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Jim Shu Subject: [PATCH 1/4] target/riscv: Add the checking into stimecmp write function. Date: Thu, 20 Mar 2025 03:21:50 +0800 Message-Id: <20250319192153.28549-2-jim.shu@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250319192153.28549-1-jim.shu@sifive.com> References: <20250319192153.28549-1-jim.shu@sifive.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=jim.shu@sifive.com; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @sifive.com) X-ZM-MESSAGEID: 1742412229461019100 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Preparation commit to let aclint timer to use stimecmp write function. Aclint timer doesn't call sstc() predicate so we need to check inside the stimecmp write function. Signed-off-by: Jim Shu --- target/riscv/time_helper.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/target/riscv/time_helper.c b/target/riscv/time_helper.c index bc0d9a0c4c..aebf0798d0 100644 --- a/target/riscv/time_helper.c +++ b/target/riscv/time_helper.c @@ -46,8 +46,23 @@ void riscv_timer_write_timecmp(CPURISCVState *env, QEMUT= imer *timer, { uint64_t diff, ns_diff, next; RISCVAclintMTimerState *mtimer =3D env->rdtime_fn_arg; - uint32_t timebase_freq =3D mtimer->timebase_freq; - uint64_t rtc_r =3D env->rdtime_fn(env->rdtime_fn_arg) + delta; + uint32_t timebase_freq; + uint64_t rtc_r; + + if (!riscv_cpu_cfg(env)->ext_sstc || !env->rdtime_fn || + !env->rdtime_fn_arg || !get_field(env->menvcfg, MENVCFG_STCE)) { + /* S/VS Timer IRQ depends on sstc extension, rdtime_fn(), and STCE= . */ + return; + } + + if (timer_irq =3D=3D MIP_VSTIP && + (!riscv_has_ext(env, RVH) || !get_field(env->henvcfg, HENVCFG_STCE= ))) { + /* VS Timer IRQ also depends on RVH and henvcfg.STCE. */ + return; + } + + timebase_freq =3D mtimer->timebase_freq; + rtc_r =3D env->rdtime_fn(env->rdtime_fn_arg) + delta; =20 if (timecmp <=3D rtc_r) { /* --=20 2.17.1 From nobody Thu Apr 3 10:10:54 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=sifive.com ARC-Seal: i=1; a=rsa-sha256; t=1742412245; cv=none; d=zohomail.com; s=zohoarc; b=TzgpBh7s0qHnC1FjrmrdootfNh+E8Q4A4bqLEaa6HmTUD+HN8h/fQ6iQk5LBXHbb34HSfTKANyjsIHrDbVf5nNbxKhtIp1DmGxTm3mal5z9kLu+qihi9aG3JM9IoS3QDOpyJBLmsjjJJ/8OxuxGrf0vKDmhj7cLc8zDyNgOgKB8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1742412245; h=Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=aB7jDkATDxOkVutkBfcIFSoI2+BwZTyJZbSJyUJb0gI=; b=jOiiOU9Ya4h8abNGufuiJ/3v+698Ldt60OqgfgO0i8W7O59uCo4AxiIO/QSyBLMhSSz5COPHsIrY5kU2jpvfNKQ1Ssm4grBGqvH1u2osJq0xFHOZi2jiP/dZv7yUOLDzJDW1zCz0ZHBDPGzS7xeLDw4NL+yZUSePnVL0693MH9s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1742412245573885.5486841926318; Wed, 19 Mar 2025 12:24:05 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tuyzd-0007No-RF; Wed, 19 Mar 2025 15:22:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tuyzb-0007NI-Py for qemu-devel@nongnu.org; Wed, 19 Mar 2025 15:22:19 -0400 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tuyzZ-0002CG-8X for qemu-devel@nongnu.org; Wed, 19 Mar 2025 15:22:19 -0400 Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-22401f4d35aso140357445ad.2 for ; Wed, 19 Mar 2025 12:22:16 -0700 (PDT) Received: from hsinchu26.internal.sifive.com ([210.176.154.34]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-af56ea947a4sm11432175a12.70.2025.03.19.12.22.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Mar 2025 12:22:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1742412134; x=1743016934; darn=nongnu.org; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=aB7jDkATDxOkVutkBfcIFSoI2+BwZTyJZbSJyUJb0gI=; b=fuPfaIQ3pTx1wKERcgOBSma35je5TNhRmk8RkwCM5q4RlUiks0egEajWZMfPq3KRJm W18HLz4pZmLHdJyJ6ackprOrzMRWpPf0m6KqUxthaapwuNMM54xKX5G5gvdSs/z9iXKn e1bDUt+zIWC7GT9ozpAN59EkTxXGeZXgKPefLcFfbnpvA8Gg9ysqSoCbKGl9/5bn2SF7 UbFGM5IQSym8i+MgBvBNKm4aSxpRF/Xn2sSVuQh9KAzB0Ogb0fBQCoI1vDi043nsmXI8 M9n18/WfesOo0x0RlkN7NnFyMyvitbatLazYVR1RhV7c3qU8RfitYpPZQr07mTI8efPq Zuuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742412134; x=1743016934; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=aB7jDkATDxOkVutkBfcIFSoI2+BwZTyJZbSJyUJb0gI=; b=uIrO6X1PmEYrf/2ptS0De7w0l9fQF5sCZczpeOETUd1AqYIX9zXlTdb/cJl1Jj1H5A sWNUkbVKzBF48mNhjv92R8uacm7/GHYkkRjDwJHR8K8xbk8N27wATRRxiA6P8jPMercM ZJjtli3NGSANVXnb5TgIr/FGf/F0TNAw4IzR+vHpWJr3zezZnZTFi0uSpcTpQvV7Gelk sfj+IqPy+lrNRALf6FjjqA42eSlEZyb2IQnBjq7cKXiw//9mo7uuhLT2xvE4sRzfLmL2 gnqUyQYJH4wl7/kwzzbAZrs82cvtFFKIBLAhUItY9Oku8TH6m2EkdnPB5dtyjseH7UFe B16A== X-Gm-Message-State: AOJu0YzB4CuqgQxkmK5SVWtYNy/x+M0DaFBaRymHYMOFFLmmmSCX5B/4 xQ+lLX0utRZsbC4o5RZgJtxanErgjYgVAp2rS2+qNRFaMdcyU7ESOwMKQz6eRzFGsXSRhOV3Yci w4nJzTzEGgrh0PDk9evoNsPZHUa6z6Pktx5HEXjbc91JiKJP3uwxnV6LgZtVoyDeYwTmatlaiDR es0FYRiXHoPSvZcKvgxgclnaLtlS5EV2uzIQ== X-Gm-Gg: ASbGncsCIP93sIYKe6E98VkWMV9wkLt9t4Ik6pzfpPwoqF8x3+Y9j/O64JrvCAKB5FU FjlXxD6a6p0RL4JSFyWWiiPdDUqlT5bt5AfoXQnm+NGMtUE9ZrrxjcEbIJrIDpp0IiE9lOUthHN jqc0i/mpeImRXtNR9qGX1WRxEhmdZZ5pVS2BQdI9yglsFaTWZ524RQ1dtosWzomcEpVdvLZfCDv TcFzvtlIXcZxf0K5CBrjZli5Mc/Xjf23ZLB+Pyr6vEcRTSho/qm3mJC6flYk0GYvXLEKk5sSQha 2D6YEvgmNrjyTjeQpSYULpAS3yEuG+DKdOQT+ofZ5OXDo+xO4M7fpV0mfFtZq53xWMQ= X-Google-Smtp-Source: AGHT+IHTLAvYYyrqSDbcwJ5pY7yoLP/D/Q6TaHC3f53YzVmOa3CKAp2LNp9bCZmBJ2xOyPoN3ATFLw== X-Received: by 2002:a05:6a21:1643:b0:1f5:9961:c40 with SMTP id adf61e73a8af0-1fbeae8f5f7mr6365795637.8.1742412134468; Wed, 19 Mar 2025 12:22:14 -0700 (PDT) From: Jim Shu To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Jim Shu Subject: [PATCH 2/4] hw/intc: riscv_aclint: Fix mtime write for sstc extension Date: Thu, 20 Mar 2025 03:21:51 +0800 Message-Id: <20250319192153.28549-3-jim.shu@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250319192153.28549-1-jim.shu@sifive.com> References: <20250319192153.28549-1-jim.shu@sifive.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=jim.shu@sifive.com; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @sifive.com) X-ZM-MESSAGEID: 1742412246430019000 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" When changing the mtime value, the period of [s|vs]timecmp timers should also be updated like the period of mtimecmp timer. Signed-off-by: Jim Shu --- hw/intc/riscv_aclint.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/intc/riscv_aclint.c b/hw/intc/riscv_aclint.c index db374a7c2d..5f4a17e177 100644 --- a/hw/intc/riscv_aclint.c +++ b/hw/intc/riscv_aclint.c @@ -28,6 +28,7 @@ #include "qemu/module.h" #include "hw/sysbus.h" #include "target/riscv/cpu.h" +#include "target/riscv/time_helper.h" #include "hw/qdev-properties.h" #include "hw/intc/riscv_aclint.h" #include "qemu/timer.h" @@ -240,6 +241,10 @@ static void riscv_aclint_mtimer_write(void *opaque, hw= addr addr, riscv_aclint_mtimer_write_timecmp(mtimer, RISCV_CPU(cpu), mtimer->hartid_base + i, mtimer->timecmp[i]); + riscv_timer_write_timecmp(env, env->stimer, env->stimecmp, 0, = MIP_STIP); + riscv_timer_write_timecmp(env, env->vstimer, env->vstimecmp, + env->htimedelta, MIP_VSTIP); + } return; } --=20 2.17.1 From nobody Thu Apr 3 10:10:54 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=sifive.com ARC-Seal: i=1; a=rsa-sha256; t=1742412266; cv=none; d=zohomail.com; s=zohoarc; b=DApb8mitPMHf+Xh8pcThur3abXfEWd33q3vq5XcmUwTyBkY3IpAxRCntnog1g5oHZT7rYW+2UCRwAzE2wxk0Rb2oq9WrMkeQuVMGZQVXqxmlf+NV4Fp+SQ4an824jnYT6gxryygLFauQ/jvhEn+NRKw7Qg3/UO4LUrHOXu+/IrY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1742412266; h=Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=jtptQpawWvWvvPo7p+5ePzZbn/0qrX0uFQnRGLb5OR8=; b=iQbHn+a7qASiyc/kyGJMUZAdqteyhi8fS98qXxcBDTNeu4GUvftFdYxYtmO+DEuB8VDgn41ak/9Bzlv5b1vu1vJxmM0WQecrxc9lgbV9OZ0XfQlj/UGlng+cwKFs9TjOZMqETpm6GVyIgVEfnFlHD/1fINqtJvhT700VaytSEnU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1742412266701268.8565858421325; Wed, 19 Mar 2025 12:24:26 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tuyzh-0007Oq-Nd; Wed, 19 Mar 2025 15:22:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tuyzd-0007Ni-4O for qemu-devel@nongnu.org; Wed, 19 Mar 2025 15:22:21 -0400 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tuyza-0002Cn-TM for qemu-devel@nongnu.org; Wed, 19 Mar 2025 15:22:20 -0400 Received: by mail-pl1-x631.google.com with SMTP id d9443c01a7336-2239c066347so162645915ad.2 for ; Wed, 19 Mar 2025 12:22:18 -0700 (PDT) Received: from hsinchu26.internal.sifive.com ([210.176.154.34]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-af56ea947a4sm11432175a12.70.2025.03.19.12.22.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Mar 2025 12:22:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1742412137; x=1743016937; darn=nongnu.org; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=jtptQpawWvWvvPo7p+5ePzZbn/0qrX0uFQnRGLb5OR8=; b=Zkug5YZc8bbt/ncdJ3W9/o8AB+S4cv2n1xns/oUBXE1edBRpPJ6Dklkz9uSfutk8sr 8QTAuU0kalBumShWsOgkAdohP4hN/PUER0kvkst0cSfnYWIE23gP+PdXoFmzCRw7OTnf OiV/U9yEshrdzY10UJlIUlgORKeecX6ZRL4CVFRiyxbyosZ6tT0efIeE1yA4hkI7NwHJ 96yvzDnsygQuP57ymyJF+oQNvSxlpYrgxtX+fYx6ntbU8glRFjSpAwm0h4QA+WXliQki WFY3df0spa7RDHKkltYXF2kVn0wNwxfwC06hJeL0OeuVNEcxfyF3CvEPASlXaE15VmWZ st0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742412137; x=1743016937; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=jtptQpawWvWvvPo7p+5ePzZbn/0qrX0uFQnRGLb5OR8=; b=FiVaCFGJogygfC2nNtyld/pf+dVPGMx16mI2xT6LTJrfvHuoApVpKPD+6gt3CztVx6 JguH1P5sCMMSgh8SXE/rFO4OnYfj9kGtY3XU5Oyu2QEOyJuZH5O7UlPCv7gtN/BHxxhp r+hLZQwjyRm2J3kRwcxjDWHJ3bLK47M8HyMf9ttzs/476mjuph155afs5eJtems0RArg fKZ3Lj6pJbxs9+Z2m3B6/DqlJfmxFvwLtTBUrtfdAADnq1GRvA3HP59P9NUmzlcVS31f 90p37++ddqcjZt/uDPPO+W9ulcRXlyRilmgwqMivewG0DrmlzkNjGdQ/WlJkrikDkMNk HI7g== X-Gm-Message-State: AOJu0YywCIl3hlEBJ1VajPe++8R3ZlpyIB8HXvqkZ6UH+SPOZqAVVdiI x6aCZVcBDVx/bP7GpaKzTsMUJ2oRQxhJ2nPhGaf0E6pofG63H4j3IaCbbVz7GxOw78Ctd58KK8v +5+8u0DVUSc14dZLgvKj0AJp4hG4PxMHtm9mxuph+VROkaAMoGLMWVTN2U8x/Cn7arOVG27l4zu kxmrplbU/ks9tbf1hCrLaBV/sEOxkZtDaxVg== X-Gm-Gg: ASbGncu4GllaamtmCJvwWwZ0V3CqGuX4k3rq4Nk3DvTRmWxOaekOR9xzqAE961X/Ed+ InqEDXwZmf/Ky+7aWOiuHJHnjfNsTlX0vzFPWtluo1hAQ6tfVe+6/J2unI/AaPiLMBqczhfC4wz +YUb9SAKpgC7zX1tXZS3lw33v3WVD4TQ13uo+Kg6ASz+hG+bsD67nhCjlTdDs8GgJv3c2DK9jKB r7iUT3igkqvC9ZKNGZ51Ettg9He+IurWg/c0x7399jrA55AnotUg0j3707WEoMTl+bfaMTvZlVD frgov0WzTCSKW97twbNiuhQttWBpK511gPK/7sl3h99UAg3Vm9iskegnIE3B8HF0mZ8= X-Google-Smtp-Source: AGHT+IGb80ZN540wcGAg63HcRJ/3dRkHokXskLkNnkc7mEboWtJIlDoyAxzX5p7HEECTnvoHIXOkCA== X-Received: by 2002:a05:6a21:3989:b0:1f5:619a:8f73 with SMTP id adf61e73a8af0-1fbecd41923mr6058469637.26.1742412136668; Wed, 19 Mar 2025 12:22:16 -0700 (PDT) From: Jim Shu To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Jim Shu Subject: [PATCH 3/4] target/riscv: Fix VSTIP bit in sstc extension. Date: Thu, 20 Mar 2025 03:21:52 +0800 Message-Id: <20250319192153.28549-4-jim.shu@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250319192153.28549-1-jim.shu@sifive.com> References: <20250319192153.28549-1-jim.shu@sifive.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=jim.shu@sifive.com; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @sifive.com) X-ZM-MESSAGEID: 1742412269191019100 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" VSTIP is only writable when both [mh]envcfg.STCE is enabled, or it will revert it's defined behavior as if sstc extension is not implemented. Signed-off-by: Jim Shu --- target/riscv/csr.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 49566d3c08..ba026dfc8e 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -3630,7 +3630,14 @@ static RISCVException rmw_mip64(CPURISCVState *env, = int csrno, if (riscv_cpu_cfg(env)->ext_sstc && (env->priv =3D=3D PRV_M) && get_field(env->menvcfg, MENVCFG_STCE)) { /* sstc extension forbids STIP & VSTIP to be writeable in mip */ - mask =3D mask & ~(MIP_STIP | MIP_VSTIP); + + /* STIP is not writable when menvcfg.STCE is enabled. */ + mask =3D mask & ~MIP_STIP; + + /* VSTIP is not writable when both [mh]envcfg.STCE are enabled. */ + if (get_field(env->henvcfg, HENVCFG_STCE)) { + mask =3D mask & ~MIP_VSTIP; + } } =20 if (mask) { --=20 2.17.1 From nobody Thu Apr 3 10:10:54 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=sifive.com ARC-Seal: i=1; a=rsa-sha256; t=1742412201; cv=none; d=zohomail.com; s=zohoarc; b=ibhIn3HP8wAz642E+lmAjYklVTesWF8rMqSiAOn6aMHQv4bWZN9GGnr5K9U6YHDyTfgo0vQTqH9zNAnMkhB/NExEfzVqBxcKQEtdyfm0A00MM8TdUZng6WHGI3FKvTnuVlMS1ywTZTXiRZm9cW/0JlkmuaB7TsiE9iHF/RAGuz8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1742412201; h=Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=kKVHcadJ/wQJ8iIOiIdf/pZi6zcVqYjt3QxMjbunVFA=; b=YiEorq8mc9mqzwmZ3KSPzc30Fmv0qJyOvULp4W+qjcDVr2KLtzO3SHrI676wOcluUhTv36qmcZ8X0bTpRX7oZbjzzBJ1goqPJspwblHLJI1Kc3J/HYnfaTfuRPEoaqaX17jaNuoq3oiCJdeB4VrONvzheRlR3AX+nY+UX7DG2DE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1742412201584565.795205372912; Wed, 19 Mar 2025 12:23:21 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tuyzm-0007U6-Mo; Wed, 19 Mar 2025 15:22:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tuyzk-0007P7-Cb for qemu-devel@nongnu.org; Wed, 19 Mar 2025 15:22:28 -0400 Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tuyzd-0002D8-AM for qemu-devel@nongnu.org; Wed, 19 Mar 2025 15:22:28 -0400 Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-22548a28d0cso46825095ad.3 for ; Wed, 19 Mar 2025 12:22:20 -0700 (PDT) Received: from hsinchu26.internal.sifive.com ([210.176.154.34]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-af56ea947a4sm11432175a12.70.2025.03.19.12.22.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Mar 2025 12:22:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1742412139; x=1743016939; darn=nongnu.org; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=kKVHcadJ/wQJ8iIOiIdf/pZi6zcVqYjt3QxMjbunVFA=; b=ezAgp1hCqfrYJ0wMBB/9kg4fBSToBXNaM4NSWRw4iR2J8Lx00Aqkpxr29MPuVZ+Top fELM/Ojr5euyNxmmm0shNmPBItnkpIpUSMltPTrI8kd5IhmeNprDo4mE5ozbn5qIPl6W xPQgPTtG5aKqJwCWrHknIZy0pCw74capAXcq+90arKh2BAXLek4YCQ6AYCYJGvNDqg53 P6MCVFp1sq7z+ohcbwR5HfDZSqSejbglvLApc1TEEnzFrUrv3RObrf3X+jzmry53ieoz eToWLvt3/JqcVTaBFJOvCav0eqfsbxNgsqhCbSO3siakW6dQBB/Saq/tMiZ+kKxc/PXb frAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742412139; x=1743016939; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=kKVHcadJ/wQJ8iIOiIdf/pZi6zcVqYjt3QxMjbunVFA=; b=aiAFMyeVPPM/+d0zX1BanjLJkqFOeImWOW+iIHVTreO0ng0MSQn4Y7Y1PGwALk1XVi 95Ifd0lX5OHYZ9Bs5g8oEoVPyOuo9wDRjW0JUq/0Pn7dlPj16O4X7bJoWX6fd4Hcpl6l eP2rkwZk1BTKiDBkzkRiV/tQRyGzwn45uXY2qKyDbFbDCp1opP3/USU7FDnFhJu+hbSC /PAclSryq0L5IA6mjrnGEThcIZ8AS1caiuSMpygfwhlRA1/U0evLPMJOHDYbEdhEqTYM ww5KxvmjhE0uBvCvVxrpPfeBuZPaqOAD1ey9+tRsqYnGDkvjIW6GKZs/Jwo5NDr949j+ YMeg== X-Gm-Message-State: AOJu0Ywf3lVhWQ8r4Lsl7aZXAnZDQnCdEEXme+l4JWdJ9Ejd8ERd3CtX gCbHBWIc9u1AuKvo4tEDF2OVZUrY6nn2p6WvN1FjdFPz4QRApJAV4bPF7diEUWLXCLDOvOExTPS LOb6JhR//3TJg90Zar6iYb2paljUQmRJKd56inhY8+fYojHKizlnP1A/RV7s7qzOaC9JEHvZAz+ WRq3fQwKM27qbZwxdT/qQ1EhTrxS1zM3/FlQ== X-Gm-Gg: ASbGnctTZm4GQDWcaxEXIFaSeu6BReQ2kiQShJkTxWebI4+0y9snPCVE3L5cfF3O2fr mlGNCMv3hurE4gnPOhTSj5ZTNS1Lu4NoYr69uhiBdAD/Fqczyys0iot1s6W/XxnTV07dnMUKKBj vN/ulllwUUS9iEUKG0lDBy763TZIPn5IQ5nt8l/Zz9NfgcfH1KJZD/J8ls2OpVaCwP7CbEqhfat bnQGdGjDDQmuzWabt8OACF94+wN6l0lXQC++cx6vdYwiVa71DrlKh/PfmdMxM/Lhps/vshmN5qt MXXhykGhUlCJmUG2nZpFniSkBhmlnj7oVPSv2U/dDjXIgGiq7j4hkdsnOCSK4Z80vwk= X-Google-Smtp-Source: AGHT+IE+s0ns02b5SoF9eHzgQxIiDo+b24T8XSNbzWahmXzOfeu8JrjHz1xg7U2xiPkEYxI63QKe7g== X-Received: by 2002:a05:6300:614a:b0:1f5:7d57:830f with SMTP id adf61e73a8af0-1fd133f00cemr839571637.33.1742412138660; Wed, 19 Mar 2025 12:22:18 -0700 (PDT) From: Jim Shu To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Jim Shu Subject: [PATCH 4/4] target/riscv: Enable/Disable S/VS-mode Timer when STCE bit is changed Date: Thu, 20 Mar 2025 03:21:53 +0800 Message-Id: <20250319192153.28549-5-jim.shu@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250319192153.28549-1-jim.shu@sifive.com> References: <20250319192153.28549-1-jim.shu@sifive.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=jim.shu@sifive.com; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @sifive.com) X-ZM-MESSAGEID: 1742412202023019000 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Updating STCE will enable/disable SSTC in S-mode or/and VS-mode, so we also need to update S/VS-mode Timer and S/VSTIP bits in $mip CSR. Signed-off-by: Jim Shu --- target/riscv/csr.c | 44 ++++++++++++++++++++++++++++++++ target/riscv/time_helper.c | 51 ++++++++++++++++++++++++++++++++++++++ target/riscv/time_helper.h | 1 + 3 files changed, 96 insertions(+) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index ba026dfc8e..c954e49cae 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -3156,6 +3156,7 @@ static RISCVException write_menvcfg(CPURISCVState *en= v, int csrno, const RISCVCPUConfig *cfg =3D riscv_cpu_cfg(env); uint64_t mask =3D MENVCFG_FIOM | MENVCFG_CBIE | MENVCFG_CBCFE | MENVCFG_CBZE | MENVCFG_CDE; + bool stce_changed =3D false; =20 if (riscv_cpu_mxl(env) =3D=3D MXL_RV64) { mask |=3D (cfg->ext_svpbmt ? MENVCFG_PBMTE : 0) | @@ -3181,10 +3182,19 @@ static RISCVException write_menvcfg(CPURISCVState *= env, int csrno, if ((val & MENVCFG_DTE) =3D=3D 0) { env->mstatus &=3D ~MSTATUS_SDT; } + + if (cfg->ext_sstc && + ((env->menvcfg & MENVCFG_STCE) !=3D (val & MENVCFG_STCE))) { + stce_changed =3D true; + } } env->menvcfg =3D (env->menvcfg & ~mask) | (val & mask); write_henvcfg(env, CSR_HENVCFG, env->henvcfg); =20 + if (stce_changed) { + riscv_timer_stce_changed(env, true, !!(val & MENVCFG_STCE)); + } + return RISCV_EXCP_NONE; } =20 @@ -3207,6 +3217,12 @@ static RISCVException write_menvcfgh(CPURISCVState *= env, int csrno, (cfg->ext_smcdeleg ? MENVCFG_CDE : 0) | (cfg->ext_ssdbltrp ? MENVCFG_DTE : 0); uint64_t valh =3D (uint64_t)val << 32; + bool stce_changed =3D false; + + if (cfg->ext_sstc && + ((env->menvcfg & MENVCFG_STCE) !=3D (valh & MENVCFG_STCE))) { + stce_changed =3D true; + } =20 if ((valh & MENVCFG_DTE) =3D=3D 0) { env->mstatus &=3D ~MSTATUS_SDT; @@ -3215,6 +3231,10 @@ static RISCVException write_menvcfgh(CPURISCVState *= env, int csrno, env->menvcfg =3D (env->menvcfg & ~mask) | (valh & mask); write_henvcfgh(env, CSR_HENVCFGH, env->henvcfg >> 32); =20 + if (stce_changed) { + riscv_timer_stce_changed(env, true, !!(valh & MENVCFG_STCE)); + } + return RISCV_EXCP_NONE; } =20 @@ -3292,8 +3312,10 @@ static RISCVException read_henvcfg(CPURISCVState *en= v, int csrno, static RISCVException write_henvcfg(CPURISCVState *env, int csrno, target_ulong val) { + const RISCVCPUConfig *cfg =3D riscv_cpu_cfg(env); uint64_t mask =3D HENVCFG_FIOM | HENVCFG_CBIE | HENVCFG_CBCFE | HENVCF= G_CBZE; RISCVException ret; + bool stce_changed =3D false; =20 ret =3D smstateen_acc_ok(env, 0, SMSTATEEN0_HSENVCFG); if (ret !=3D RISCV_EXCP_NONE) { @@ -3319,6 +3341,11 @@ static RISCVException write_henvcfg(CPURISCVState *e= nv, int csrno, get_field(val, HENVCFG_PMM) !=3D PMM_FIELD_RESERVED) { mask |=3D HENVCFG_PMM; } + + if (cfg->ext_sstc && + ((env->henvcfg & HENVCFG_STCE) !=3D (val & HENVCFG_STCE))) { + stce_changed =3D true; + } } =20 env->henvcfg =3D val & mask; @@ -3326,6 +3353,10 @@ static RISCVException write_henvcfg(CPURISCVState *e= nv, int csrno, env->vsstatus &=3D ~MSTATUS_SDT; } =20 + if (stce_changed) { + riscv_timer_stce_changed(env, false, !!(val & HENVCFG_STCE)); + } + return RISCV_EXCP_NONE; } =20 @@ -3347,19 +3378,32 @@ static RISCVException read_henvcfgh(CPURISCVState *= env, int csrno, static RISCVException write_henvcfgh(CPURISCVState *env, int csrno, target_ulong val) { + const RISCVCPUConfig *cfg =3D riscv_cpu_cfg(env); uint64_t mask =3D env->menvcfg & (HENVCFG_PBMTE | HENVCFG_STCE | HENVCFG_ADUE | HENVCFG_DTE); uint64_t valh =3D (uint64_t)val << 32; RISCVException ret; + bool stce_changed =3D false; =20 ret =3D smstateen_acc_ok(env, 0, SMSTATEEN0_HSENVCFG); if (ret !=3D RISCV_EXCP_NONE) { return ret; } + + if (cfg->ext_sstc && + ((env->henvcfg & HENVCFG_STCE) !=3D (valh & HENVCFG_STCE))) { + stce_changed =3D true; + } + env->henvcfg =3D (env->henvcfg & 0xFFFFFFFF) | (valh & mask); if ((env->henvcfg & HENVCFG_DTE) =3D=3D 0) { env->vsstatus &=3D ~MSTATUS_SDT; } + + if (stce_changed) { + riscv_timer_stce_changed(env, false, !!(val & HENVCFG_STCE)); + } + return RISCV_EXCP_NONE; } =20 diff --git a/target/riscv/time_helper.c b/target/riscv/time_helper.c index aebf0798d0..c648c9fac7 100644 --- a/target/riscv/time_helper.c +++ b/target/riscv/time_helper.c @@ -140,6 +140,57 @@ void riscv_timer_write_timecmp(CPURISCVState *env, QEM= UTimer *timer, timer_mod(timer, next); } =20 +/* + * When disabling xenvcfg.STCE, the S/VS Timer may be disabled at the same= time. + * It is safe to call this function regardless of whether the timer has be= en + * deleted or not. timer_del() will do nothing if the timer has already + * been deleted. + */ +static void riscv_timer_disable_timecmp(CPURISCVState *env, QEMUTimer *tim= er, + uint32_t timer_irq) +{ + /* Disable S-mode Timer IRQ and HW-based STIP */ + if ((timer_irq =3D=3D MIP_STIP) && !get_field(env->menvcfg, MENVCFG_ST= CE)) { + riscv_cpu_update_mip(env, timer_irq, BOOL_TO_MASK(0)); + timer_del(timer); + return; + } + + /* Disable VS-mode Timer IRQ and HW-based VSTIP */ + if ((timer_irq =3D=3D MIP_VSTIP) && + (!get_field(env->menvcfg, MENVCFG_STCE) || + !get_field(env->henvcfg, HENVCFG_STCE))) { + env->vstime_irq =3D 0; + riscv_cpu_update_mip(env, 0, BOOL_TO_MASK(0)); + timer_del(timer); + return; + } +} + +/* Enable or disable S/VS-mode Timer when xenvcfg.STCE is changed */ +void riscv_timer_stce_changed(CPURISCVState *env, bool is_m_mode, bool ena= ble) +{ + if (is_m_mode) { + /* menvcfg.STCE changes */ + if (enable) { + riscv_timer_write_timecmp(env, env->stimer, env->stimecmp, 0, = MIP_STIP); + riscv_timer_write_timecmp(env, env->vstimer, env->vstimecmp, + env->htimedelta, MIP_VSTIP); + } else { + riscv_timer_disable_timecmp(env, env->stimer, MIP_STIP); + riscv_timer_disable_timecmp(env, env->vstimer, MIP_VSTIP); + } + } else { + /* henvcfg.STCE changes */ + if (enable) { + riscv_timer_write_timecmp(env, env->vstimer, env->vstimecmp, + env->htimedelta, MIP_VSTIP); + } else { + riscv_timer_disable_timecmp(env, env->vstimer, MIP_VSTIP); + } + } +} + void riscv_timer_init(RISCVCPU *cpu) { CPURISCVState *env; diff --git a/target/riscv/time_helper.h b/target/riscv/time_helper.h index cacd79b80c..af1f634f89 100644 --- a/target/riscv/time_helper.h +++ b/target/riscv/time_helper.h @@ -25,6 +25,7 @@ void riscv_timer_write_timecmp(CPURISCVState *env, QEMUTimer *timer, uint64_t timecmp, uint64_t delta, uint32_t timer_irq); +void riscv_timer_stce_changed(CPURISCVState *env, bool is_m_mode, bool ena= ble); void riscv_timer_init(RISCVCPU *cpu); =20 #endif --=20 2.17.1