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[2403:580b:97e8:0:321:6fb2:58f1:a1b1]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-225c6ba6c8dsm107725255ad.156.2025.03.19.01.03.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Mar 2025 01:03:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1742371414; x=1742976214; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bT/bW29GwGcJx+ezk5/UB0aQ+0X7tJA6z6SWSn/AAEY=; b=nhJssNZigDXZUrZXjc2h2MmKIkwrBiuQa1OWRjBvemFlM+r9kM8duwp4unywe7zctU kMsGOk9D7ao62xp88WDvE8glWy16U9bBjB2ZHWgeyPwNFn6UcLExi9D97B7GkbpPhy9T J1FV+6ntgrux5YOkZANLlniNMBE+EceOulgZkYLTyzvGEDmmXJJ9LLOZucmOjZcGqmhh 9IiOtACADDiycLdSVl92P4GoKhVEhW5KtCbmaXc3HKI4CcPybXAOqgfplsYsawAq7o9x JTCNmdjV4jN84yZqzGPwSifdlQxQVk19FJlRiIF5gBtjYlzjqgDM7q47BET6EX0h8wEz a8OQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742371414; x=1742976214; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bT/bW29GwGcJx+ezk5/UB0aQ+0X7tJA6z6SWSn/AAEY=; b=SXDP0i83NEsxK9NxgdS1lUQxeKE0srsDdeZU3ICkDTVoFhV0gex+9byFtyrrUTHT/u 5eboNwxyJpHz2Y8aSzLZp95JVpRdCbwckXMk91LjlGcYNhIz81ianT82TyQYd4zrsYyx f+idPsrD57+bzrOaIzAcj6PGyd4bt++gyBbpz5bArq0qxQspU2hf7rVXcJDq6YSxwVRS SEAQKe0rKEALTOwEQkl6u4kO3XAfiW364ZVHWu01zJg5XeC3efAU1g7vkGoE7CpcQEm8 k9+c914Sbax1e7B0iZ5lg02eRtqvCa3ctWXjSrrssx/TdiOjHwvN4EM4VqpiBcr7NbAI zTuQ== X-Gm-Message-State: AOJu0YxF+Af8rDRalMfzFL6FWyDNf5D/kgERHH365OwFnbu/iDjaMGui DDOdrYlNEaCWV4VggGlzW0/+MxVRy+9wIp9BD85h2TRApX9hLg7TB3okdQ== X-Gm-Gg: ASbGnctymmY8WXr5q85sCIiQFhBc2imtp5BFnjdKIomkIMRMnzoe2feF2D8irJw3qgq MCWuCiFtJ4pmujDHLjPqo53FZkMSUguXhuKXUYAqRIiU8+VnNXE0tan4USJeL+7LhVQ6QhKmok5 9dsaps0jt5+AzVs+7ro+sMdZqH1Q+uxXv/gmsAKevE9R1OKyw4wJkLtoaX5n7CCjftg41aIXb0f nMrFNYY6H8hCveZS8tnDtfpSsoizQju6vObmC4KtZ+NlAyN44vpvkMcrN0nYXargpp4APl8OgJd Fck50DhZx5vqFIuEOTkwnaN7ay4rzL5Is06u9ikU1Sb9fWZinhmKE4VVLgkeO0evDMEu/5AlCnr dl9RSTKgmMM/nQ0ukvlsIk6KrsvHPMHid02O4S86tAOJJuRmUINWn3KJG7ao= X-Google-Smtp-Source: AGHT+IGOqGFNprgMH8JVaqm0cdADuORQVG5lz32bfcK0QZrctu2ve9laI0H9evIOfcJ+IdGaxNnRbg== X-Received: by 2002:a17:903:19d0:b0:224:93e:b5d7 with SMTP id d9443c01a7336-22649c8f95amr34446055ad.34.1742371413809; Wed, 19 Mar 2025 01:03:33 -0700 (PDT) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Jason Chien , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 05/10] hw/riscv/riscv-iommu: Fix process directory table walk Date: Wed, 19 Mar 2025 18:03:03 +1000 Message-ID: <20250319080308.609520-6-alistair.francis@wdc.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250319080308.609520-1-alistair.francis@wdc.com> References: <20250319080308.609520-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=alistair23@gmail.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1742371475949019100 Content-Type: text/plain; charset="utf-8" From: Jason Chien The PPN field in a non-leaf PDT entry is positioned differently from that in a leaf PDT entry. The original implementation incorrectly used the leaf entry's PPN mask to extract the PPN from a non-leaf entry, leading to an erroneous page table walk. This commit introduces new macros to properly define the fields for non-leaf PDT entries and corrects the page table walk. Signed-off-by: Jason Chien Reviewed-by: Daniel Henrique Barboza Message-ID: <20250301173751.9446-1-jason.chien@sifive.com> Signed-off-by: Alistair Francis --- hw/riscv/riscv-iommu-bits.h | 6 +++++- hw/riscv/riscv-iommu.c | 4 ++-- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/hw/riscv/riscv-iommu-bits.h b/hw/riscv/riscv-iommu-bits.h index b7cb1bc736..1017d73fc6 100644 --- a/hw/riscv/riscv-iommu-bits.h +++ b/hw/riscv/riscv-iommu-bits.h @@ -415,12 +415,16 @@ enum riscv_iommu_fq_causes { #define RISCV_IOMMU_DC_MSIPTP_MODE_OFF 0 #define RISCV_IOMMU_DC_MSIPTP_MODE_FLAT 1 =20 +/* 2.2 Process Directory Table */ +#define RISCV_IOMMU_PDTE_VALID BIT_ULL(0) +#define RISCV_IOMMU_PDTE_PPN RISCV_IOMMU_PPN_FIELD + /* Translation attributes fields */ #define RISCV_IOMMU_PC_TA_V BIT_ULL(0) #define RISCV_IOMMU_PC_TA_RESERVED GENMASK_ULL(63, 32) =20 /* First stage context fields */ -#define RISCV_IOMMU_PC_FSC_PPN GENMASK_ULL(43, 0) +#define RISCV_IOMMU_PC_FSC_PPN RISCV_IOMMU_ATP_PPN_FIELD #define RISCV_IOMMU_PC_FSC_RESERVED GENMASK_ULL(59, 44) =20 enum riscv_iommu_fq_ttypes { diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index d46beb2d64..76e0fcd873 100644 --- a/hw/riscv/riscv-iommu.c +++ b/hw/riscv/riscv-iommu.c @@ -1042,10 +1042,10 @@ static int riscv_iommu_ctx_fetch(RISCVIOMMUState *s= , RISCVIOMMUContext *ctx) return RISCV_IOMMU_FQ_CAUSE_PDT_LOAD_FAULT; } le64_to_cpus(&de); - if (!(de & RISCV_IOMMU_PC_TA_V)) { + if (!(de & RISCV_IOMMU_PDTE_VALID)) { return RISCV_IOMMU_FQ_CAUSE_PDT_INVALID; } - addr =3D PPN_PHYS(get_field(de, RISCV_IOMMU_PC_FSC_PPN)); + addr =3D PPN_PHYS(get_field(de, RISCV_IOMMU_PDTE_PPN)); } =20 riscv_iommu_hpm_incr_ctr(s, ctx, RISCV_IOMMU_HPMEVENT_PD_WALK); --=20 2.48.1