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[86.229.28.94]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-395c888152dsm3016421f8f.48.2025.03.13.12.30.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Mar 2025 12:30:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1741894214; x=1742499014; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pJ2zQvGxiUYLcbhnAMz/lOTZv04zTOkZOKcwj4LSpp8=; b=SyNvEofDK4KfJCLeGTO7URRqFbBSE6RN/zAML7wDWm2vBkq1UkvMwDTGCMGSuEHK3l 27IGjJ3MsGbahaCjAs4Y0hd39z/LMNJPw8u670Z2UX56aYg+bn+XZY/5D04cMG8INI8Y hv7WYu6a1Ts5VwyYgIdV9iiybQMKLoynTbO98y0Wu6gh5bY5eAUMMJSAO0MNRnu38z2g iq2KHCY6gc9bVK7fWLTLyEPE/zzYksguwmmdij3thwOvJlBE9rR9p26aIAQLoOwEaoGp JVdFucr8Y3VBfj1JYIQ5vRDjU39BZzG1o32I3iC9jYzUljggPK7QXB4uWIoD9SKF9cr0 mlKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741894214; x=1742499014; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pJ2zQvGxiUYLcbhnAMz/lOTZv04zTOkZOKcwj4LSpp8=; b=fGxkkju8XXmdEi0HrZQcAWbU65NSjdDriTQ6aHPfH1gt3GEi2Yna68dYl31qxz9HHP ps5iUbWvOhNVngJLsyuKi6kaK0PKQLHLerw9Ys1lJIP/TqjbAsCmGyAnWWG0jscAMS4w kgUY1RRiNfWaC5dUD6v0WoQ1y0HNOST2rklNSsmBh/1eeq+Q/5ypK/UQHgNNeBk5X2gm o4fMefY11TV7/W8D0HMaUtmDXjY3rQz0XegokbfAN0bFPH5sBrf0sesIHU6/Tkash+2W TjOtBb8nDbau+u3Cc2py+rLt2Dju/GtfhDneTBC5D9V9sT9CXMQlqNqqUTkGBzkp5VKF 7R7Q== X-Gm-Message-State: AOJu0Yy1CKjkIFPSEwR7jurLILEPeOoVkPnophGOHDuazxTQpUymiDhK RD/zyvWb7MhXCx6HDDh4/x1R1huDYCCZz2QDjWLGUeqFGsPnmzH1sXKBqxVOlTSV4Q3FLEZXd+r EWpq9gmaY X-Gm-Gg: ASbGnctjvIWPxNIzD13sUPI80Ec8AzgroKpQ74k60aOOP97Jo+GlxIEf+h1mWGSG3iV 6SQJYmYqqJFJ+SbDWOBMKKFVqrliSC51lA84SmdEsETwSwfZjtzXry98LngStX/33J/2TI/88Yn ml/LSttDNPiQbwVYaggejW0tA0ztWNyhYwXRE4P5vhJJr4xXWKObsCMsRRXtEix9Em0Trx7c/VC wZxkBA0QmyZMDv5QPwY8MnGMG2Tz57CqixOwyBrUDN2wVfENHsqGP1SBMoFHhWQf7Mg7riDhdDf C/8HK9B9m2YaDRe9qr4S450J8/RLghNXlR7I4t78BnCso+KJlrRH3b3R1LD0C12W8zJIQneLb5L /FsObwWJRPXCsexcYKdC/vGOd5mWRzw== X-Google-Smtp-Source: AGHT+IEZFrxt4Idjbjow2fyvnjTXhxcf+2Ikvrzaj2PCqhYzjIfUcaexPnBNftzUv63Zhtucr1hRSQ== X-Received: by 2002:a05:6000:1f88:b0:390:dfa1:3448 with SMTP id ffacd0b85a97d-396c3838e83mr1008128f8f.43.1741894213834; Thu, 13 Mar 2025 12:30:13 -0700 (PDT) From: =?UTF-8?q?Lo=C3=AFc=20Lefort?= To: qemu-devel@nongnu.org Cc: Liu Zhiwei , Weiwei Li , qemu-riscv@nongnu.org, Palmer Dabbelt , Alistair Francis , Daniel Henrique Barboza , =?UTF-8?q?Lo=C3=AFc=20Lefort?= Subject: [PATCH v2 1/5] target/riscv: pmp: don't allow RLB to bypass rule privileges Date: Thu, 13 Mar 2025 20:30:07 +0100 Message-ID: <20250313193011.720075-2-loic@rivosinc.com> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250313193011.720075-1-loic@rivosinc.com> References: <20250313193011.720075-1-loic@rivosinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=loic@rivosinc.com; helo=mail-wr1-x435.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @rivosinc-com.20230601.gappssmtp.com) X-ZM-MESSAGEID: 1741894357307019100 When Smepmp is supported, mseccfg.RLB allows bypassing locks when writing C= SRs but should not affect interpretation of actual PMP rules. This is not the case with the current implementation where pmp_hart_has_pri= vs calls pmp_is_locked which implements mseccfg.RLB bypass. This commit implements the correct behavior by removing mseccfg.RLB bypass = from pmp_is_locked. RLB bypass when writing CSRs is implemented by adding a new pmp_is_readonly function that calls pmp_is_locked and check mseccfg.RLB. pmp_write_cfg and pmpaddr_csr_write are changed to use this new function. Signed-off-by: Lo=C3=AFc Lefort Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Reviewed-by: LIU Zhiwei=C2=A0 --- target/riscv/pmp.c | 43 +++++++++++++++++++++++-------------------- 1 file changed, 23 insertions(+), 20 deletions(-) diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c index b0841d44f4..e1e5ca589e 100644 --- a/target/riscv/pmp.c +++ b/target/riscv/pmp.c @@ -45,11 +45,6 @@ static inline uint8_t pmp_get_a_field(uint8_t cfg) */ static inline int pmp_is_locked(CPURISCVState *env, uint32_t pmp_index) { - /* mseccfg.RLB is set */ - if (MSECCFG_RLB_ISSET(env)) { - return 0; - } - if (env->pmp_state.pmp[pmp_index].cfg_reg & PMP_LOCK) { return 1; } @@ -62,6 +57,15 @@ static inline int pmp_is_locked(CPURISCVState *env, uint= 32_t pmp_index) return 0; } =20 +/* + * Check whether a PMP is locked for writing or not. + * (i.e. has LOCK flag and mseccfg.RLB is unset) + */ +static int pmp_is_readonly(CPURISCVState *env, uint32_t pmp_index) +{ + return pmp_is_locked(env, pmp_index) && !MSECCFG_RLB_ISSET(env); +} + /* * Count the number of active rules. */ @@ -90,39 +94,38 @@ static inline uint8_t pmp_read_cfg(CPURISCVState *env, = uint32_t pmp_index) static bool pmp_write_cfg(CPURISCVState *env, uint32_t pmp_index, uint8_t = val) { if (pmp_index < MAX_RISCV_PMPS) { - bool locked =3D true; + bool readonly =3D true; =20 if (riscv_cpu_cfg(env)->ext_smepmp) { /* mseccfg.RLB is set */ if (MSECCFG_RLB_ISSET(env)) { - locked =3D false; + readonly =3D false; } =20 /* mseccfg.MML is not set */ - if (!MSECCFG_MML_ISSET(env) && !pmp_is_locked(env, pmp_index))= { - locked =3D false; + if (!MSECCFG_MML_ISSET(env) && !pmp_is_readonly(env, pmp_index= )) { + readonly =3D false; } =20 /* mseccfg.MML is set */ if (MSECCFG_MML_ISSET(env)) { /* not adding execute bit */ if ((val & PMP_LOCK) !=3D 0 && (val & PMP_EXEC) !=3D PMP_E= XEC) { - locked =3D false; + readonly =3D false; } /* shared region and not adding X bit */ if ((val & PMP_LOCK) !=3D PMP_LOCK && (val & 0x7) !=3D (PMP_WRITE | PMP_EXEC)) { - locked =3D false; + readonly =3D false; } } } else { - if (!pmp_is_locked(env, pmp_index)) { - locked =3D false; - } + readonly =3D pmp_is_readonly(env, pmp_index); } =20 - if (locked) { - qemu_log_mask(LOG_GUEST_ERROR, "ignoring pmpcfg write - locked= \n"); + if (readonly) { + qemu_log_mask(LOG_GUEST_ERROR, + "ignoring pmpcfg write - read only\n"); } else if (env->pmp_state.pmp[pmp_index].cfg_reg !=3D val) { /* If !mseccfg.MML then ignore writes with encoding RW=3D01 */ if ((val & PMP_WRITE) && !(val & PMP_READ) && @@ -524,14 +527,14 @@ void pmpaddr_csr_write(CPURISCVState *env, uint32_t a= ddr_index, uint8_t pmp_cfg =3D env->pmp_state.pmp[addr_index + 1].cfg_reg; is_next_cfg_tor =3D PMP_AMATCH_TOR =3D=3D pmp_get_a_field(pmp_= cfg); =20 - if (pmp_is_locked(env, addr_index + 1) && is_next_cfg_tor) { + if (pmp_is_readonly(env, addr_index + 1) && is_next_cfg_tor) { qemu_log_mask(LOG_GUEST_ERROR, - "ignoring pmpaddr write - pmpcfg + 1 locked\= n"); + "ignoring pmpaddr write - pmpcfg+1 read only= \n"); return; } } =20 - if (!pmp_is_locked(env, addr_index)) { + if (!pmp_is_readonly(env, addr_index)) { if (env->pmp_state.pmp[addr_index].addr_reg !=3D val) { env->pmp_state.pmp[addr_index].addr_reg =3D val; pmp_update_rule_addr(env, addr_index); @@ -542,7 +545,7 @@ void pmpaddr_csr_write(CPURISCVState *env, uint32_t add= r_index, } } else { qemu_log_mask(LOG_GUEST_ERROR, - "ignoring pmpaddr write - locked\n"); + "ignoring pmpaddr write - read only\n"); } } else { qemu_log_mask(LOG_GUEST_ERROR, --=20 2.47.2