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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837527; x=1742442327; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rBQxmR44l3wcTYT3oEMIjdMUBd+/xO2J5+TsC/x2ZxA=; b=Oj39lZI/0YncivTOeT+HmoOUMeBA0QPOrRyXo+F5AZIUfHak+fS5cjzniRp36JX6RG MegWgb9td/+nqs8Q5cmzvdU2toHe49yW8gTudST98VWKCLpI4C09FRT5P2/K4ftqPb9n Ysbj4EFI8sYPbpxuRho/XJ8PjrEWXDiOhRblCmXiwJtBkXCpgnQfN+7ZuZC/n/cMpap/ LAMqP69cFdJXx9bpuYvIjql2X86uA6rne5TKFMJ8UUegjXZTspu+X62g2D6XWlirH0qV QYZNDRtIS7bPuq+xHXrEQufD1EfS5icZdw3df2p6bJuTgCYzMZoPhboXYLYq1xF1l3Vz oXFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837527; x=1742442327; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rBQxmR44l3wcTYT3oEMIjdMUBd+/xO2J5+TsC/x2ZxA=; b=Tp9senwdXjPyu+XVfPuxMT/D/Y1ALaXbNSVhzphpwOAk1e4ecZNg32Ude47uA9G/6L MQzxQ0zkahf63VMGJYM0RHxSXgM0LUr6xcHap2ST+Frr78cG9hazy4XB444zDP/jfI2X /66JhPFjblCMliag9oUJhZS+D4iR5t7AIA1OkHo3J8X4dtJ19eaLtoIkaIxwIf/Wob3m TiHlyoakSFxHML5/C5thdA7vSfIMt2R3yPMZNuWU83IXB38GS9JpHj/jNK5iNi7E+vS8 6z3AqCNuerqZQAsFDoRBcklK5WIUktl7eKejCMbCmeNioSrtlhbgGbK0yXo37oxkrXmr gD5g== X-Gm-Message-State: AOJu0YyZ1DX2e3mveRD0T+Iez6pCUpdfKHSAojsxSjJgXHTr/yQhZm8o Q2tiFx1SHrppOT3auXg867gLgtpO4lNsHMxs1NU22wBg/Wu2EFu2MCoal9YWMRaiI6ZT7TkOqEp 5 X-Gm-Gg: ASbGncvtLnASEKIJAGQh4PcJQpKpEibAv9AfVrlVYY3sM4yUHc0jB7OgG9f/CvSTjnF 0Q8C6MZ4Suem1iOVH4W6fcfqiv39AbzU/JOLK7W2fgRuaeiK2pscf6jHOBabZ6vNqdFqOYcb1xT VS/VXxHG2tfsLPn2GohuB+SeSqqKK9DHP8ojaNE1fDzrgvJZdz3T3+cf8dtdqctC6p9026Ly/x0 ACoE/za834ul7sq8rY+8wJMEEim7/EbJIorjBvTnCF6YdrbaYu+iD41ryCzSJhtOGD6r8x++vdG LgAz4XrTXTmW9YXCuKIgMemW8lzyS/Ybs9trnvDOyXGkGR7j0gzpTS0AhGHMFPw3A1Qlv3BI8CR D X-Google-Smtp-Source: AGHT+IEaAZy0IYkXI33o+3dAp/nX35VY7pdPU8aKnqA54qi3Yp/slABPqqGttmcZKZNHXO5lvCORQw== X-Received: by 2002:a05:6a00:843:b0:736:a973:748 with SMTP id d2e1a72fcca58-736aaad3d00mr35952286b3a.22.1741837526882; Wed, 12 Mar 2025 20:45:26 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 01/37] accel/tcg: Build user-exec-stub.c once Date: Wed, 12 Mar 2025 20:44:41 -0700 Message-ID: <20250313034524.3069690-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741838228077019000 Content-Type: text/plain; charset="utf-8" CONFIG_USER_ONLY =3D=3D !CONFIG_SYSTEM_ONLY. Therefore it's cleaner to just add to user_ss. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier --- accel/tcg/meson.build | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build index 38ff227eb0..14bf797fda 100644 --- a/accel/tcg/meson.build +++ b/accel/tcg/meson.build @@ -12,7 +12,6 @@ tcg_specific_ss.add(files( 'translator.c', )) tcg_specific_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'= )) -tcg_specific_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_false: files('user-exec= -stub.c')) if get_option('plugins') tcg_specific_ss.add(files('plugin-gen.c')) endif @@ -22,6 +21,10 @@ specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG= '], if_true: files( 'cputlb.c', )) =20 +user_ss.add(when: ['CONFIG_TCG'], if_true: files( + 'user-exec-stub.c', +)) + system_ss.add(when: ['CONFIG_TCG'], if_true: files( 'icount-common.c', 'monitor.c', --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837979; cv=none; d=zohomail.com; s=zohoarc; b=UII+rhYaEnKVBPeEcE/EO1U2xm9ZmEbMb2zWVurjVcjku7a2RCfPtV0U2unr0RjXBvYmD9YM7Oi7V4U+WjhBJMp+M/mFM4Qm8+eMXVFDQ5RWaxOa8w0XzJMhGs1Xr2rrdwzPP++F20yvWQIRJGlpOzKXLu4EpOvJqlU7NN38WLI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837979; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=KHsIgh54rCX5/hydGwZuN61eydlk+oWTosomBsdyD50=; b=Am1SlE4wJUy5BxdQ86Oos2eE1l/zCmswHIBtRxvbPfJU1dNwEI82VZHhFN8le/gY9vhsQuOpRLKz2hPIJUOkEuHo8Aqtkxi8oQJ5lJIYXHnu+R9yF4EeWY4TLxTEaYyVqXjoAvPzVfky1VWNSFU3cv8zyVmTslf7qf0e5WV0A2w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741837979709694.4114086616639; Wed, 12 Mar 2025 20:52:59 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZVu-0004Z1-Gz; Wed, 12 Mar 2025 23:45:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZVp-0004Y8-2z for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:45:37 -0400 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZVh-0007a5-97 for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:45:34 -0400 Received: by mail-pj1-x102e.google.com with SMTP id 98e67ed59e1d1-2feb91a2492so967871a91.2 for ; Wed, 12 Mar 2025 20:45:28 -0700 (PDT) Received: from stoup.. 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837528; x=1742442328; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KHsIgh54rCX5/hydGwZuN61eydlk+oWTosomBsdyD50=; b=qHXtAHrv/1o9DXbJx3G6CqXyhidymj20nh7B1eu5oxbGO0n6+LUpBhHu6biaPjKy// SOs/tumImdeHrr+wPpMK6SDZyYE0Xxf/NuESCNkeed1Ohakcex1zZHqRzjj7+Y1C35hL 3FRpOEOOaxIFaX7gNJYPOidgT8Jy/hmQ1Jols0Tor/gPg2O2IndOTzTiBb2i9ZUO3Ybv iB00p4fAcd2onz4i5SZZWVKbvKxehz3yDCbbw3OEcf8P258VuTw+X5ky/LpF4kQweEc2 1CWhahHukjL4HmB94DeJ+NmDlKsNvmeXAKkhTSopXFUAa9jhPjGSHdiDsJBlmMEVl8Bu Co9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837528; x=1742442328; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KHsIgh54rCX5/hydGwZuN61eydlk+oWTosomBsdyD50=; b=Pv+8gV1jC94NExl9VqXx7G4FugKkiIU2o/oAwQCYaIPREHbGCe0EfEtLDNkMJmt3GR p0B47le56Axf0TGaMq6eie9pYM8UbjB4WIOl3BSENdHWWcG5v13hKtJiys1GznrSJTpE OAAol+3G9PevRuvRe1oXXBl7wcnJk1NqrTZpAwWx6F5PuoO7nqn1+qPWxfb4qRF+GBoy xL30+LZP2eEFh2L9VZnC1VZcdb7QBx28sfHwVVwG7qwbimtHccXVSsUXjHVF0ZBL4t4A 7xumo3o61MXhL5+MQmIlgldf4Hmg+thQFDIAkrKVohOXZ6DEwQVWVFykMyidDcNUnwwW 7+4Q== X-Gm-Message-State: AOJu0YwZY+tCWozMdvtBcNB1Os73gfcnXgLSyMWbaod3EARIXVBcwWmY XkdbbgAMp7tPNetZuOh99NGlPh2rzQ0KVciObepZirVRIqqYPjSjBVC6viPuFKoyYla2mhmZcFC n X-Gm-Gg: ASbGncsTiJZQO30LLjXMYYJdfFkuCFfj7HRaAXSocwWcYs9QzsTUlRESh8WqxnZ9FAY tBtkquWw8KMrTYT62Pc7V5tiM5WJLMrbv32Mh2S82Rk1KMtFn5fKBU1Vy32Cuk5FkQTzSeFOiov 7DsI3DNNTAws1iSv2XBBE4EdcGepb5FLaAhsjMgJ+j9DYArMnvWn+LVx+Qn/ak9Ss3wTbF9oIzO gJYtw2pV0zi5w8wxVB+rTOcd9ajYFymZWhxND7k5lccxrNJDzsFUaCiW0VFg5dlL/SQhJROwvU+ Q1F09T5+RcCAPX5KY9C/XXsgKOKGrmJYWAV4wYoKHYSEYgr1QtaNs3PyqnxL2hCIINM9SNOZF3r a X-Google-Smtp-Source: AGHT+IH7E8axiazUVf+6HTre592lFDR8WCTOzfAYscQzlK40/ChajYaxsoYLuD+inFQ0C4tkYPJbvQ== X-Received: by 2002:a05:6a20:6f90:b0:1f1:432:f4a3 with SMTP id adf61e73a8af0-1f544b19bd8mr38915686637.23.1741837527740; Wed, 12 Mar 2025 20:45:27 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 02/37] accel/tcg: Build plugin-gen.c once Date: Wed, 12 Mar 2025 20:44:42 -0700 Message-ID: <20250313034524.3069690-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837980570019100 Content-Type: text/plain; charset="utf-8" We assert that env immediately follows CPUState in cpu-all.h. Change the offsetof expressions to be based on CPUState instead of ArchCPU. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Pierrick Bouvier --- accel/tcg/plugin-gen.c | 13 +++++-------- accel/tcg/meson.build | 7 ++++--- 2 files changed, 9 insertions(+), 11 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 7e5f040bf7..c1da753894 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -22,13 +22,12 @@ #include "qemu/osdep.h" #include "qemu/plugin.h" #include "qemu/log.h" -#include "cpu.h" #include "tcg/tcg.h" #include "tcg/tcg-temp-internal.h" -#include "tcg/tcg-op.h" -#include "exec/exec-all.h" +#include "tcg/tcg-op-common.h" #include "exec/plugin-gen.h" #include "exec/translator.h" +#include "exec/translation-block.h" =20 enum plugin_gen_from { PLUGIN_GEN_FROM_TB, @@ -89,15 +88,13 @@ static void gen_enable_mem_helper(struct qemu_plugin_tb= *ptb, qemu_plugin_add_dyn_cb_arr(arr); =20 tcg_gen_st_ptr(tcg_constant_ptr((intptr_t)arr), tcg_env, - offsetof(CPUState, neg.plugin_mem_cbs) - - offsetof(ArchCPU, env)); + offsetof(CPUState, neg.plugin_mem_cbs) - sizeof(CPUStat= e)); } =20 static void gen_disable_mem_helper(void) { tcg_gen_st_ptr(tcg_constant_ptr(0), tcg_env, - offsetof(CPUState, neg.plugin_mem_cbs) - - offsetof(ArchCPU, env)); + offsetof(CPUState, neg.plugin_mem_cbs) - sizeof(CPUStat= e)); } =20 static TCGv_i32 gen_cpu_index(void) @@ -113,7 +110,7 @@ static TCGv_i32 gen_cpu_index(void) } TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); tcg_gen_ld_i32(cpu_index, tcg_env, - -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); + offsetof(CPUState, cpu_index) - sizeof(CPUState)); return cpu_index; } =20 diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build index 14bf797fda..185830d0f5 100644 --- a/accel/tcg/meson.build +++ b/accel/tcg/meson.build @@ -3,6 +3,10 @@ common_ss.add(when: 'CONFIG_TCG', if_true: files( 'tcg-runtime.c', 'tcg-runtime-gvec.c', )) +if get_option('plugins') + common_ss.add(when: 'CONFIG_TCG', if_true: files('plugin-gen.c')) +endif + tcg_specific_ss =3D ss.source_set() tcg_specific_ss.add(files( 'tcg-all.c', @@ -12,9 +16,6 @@ tcg_specific_ss.add(files( 'translator.c', )) tcg_specific_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'= )) -if get_option('plugins') - tcg_specific_ss.add(files('plugin-gen.c')) -endif specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_specific_ss) =20 specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files( --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837590; cv=none; d=zohomail.com; s=zohoarc; b=XGCt7bBg7ya+Afkibo2Aqn2uY7rN01reVio6ghNRouapbgEZh0Ol60S089V/ozvrcvUiEPMp57ExBYWh6N56UBJAOqI3GpOX3TENbRDNKJCjCALi68L91NpkEHOk/2DeoHawyq1mO7kOn7p9eVnzo/ERSVQ5J5jzhZ/9Z3s7kXg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837590; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ibiGjuidp9yYfKMevOqZB9YtgzFUqWPxg+fdMQ9xtnU=; b=kS+OxTlhJLKcHXmuBJUFVfe7J+TqgaYX11sHTAL/CvwYZL03hlI0fLfBBW4ZeolJzPBvBdVjNkyaArWVLl0WLQI7UUNKSYBut7+6ChB6LsHTWoCxHv9AzmMO52Z8QneqcCEFzupQj+kowNSFuFGaCG2DLgLdzTjMFE2ItlibS5I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741837590847931.1804542068949; Wed, 12 Mar 2025 20:46:30 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZVy-0004bH-Fk; Wed, 12 Mar 2025 23:45:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZVv-0004ZF-BI for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:45:43 -0400 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZVj-0007aA-Dd for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:45:43 -0400 Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-2255003f4c6so9400345ad.0 for ; Wed, 12 Mar 2025 20:45:29 -0700 (PDT) Received: from stoup.. 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837528; x=1742442328; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ibiGjuidp9yYfKMevOqZB9YtgzFUqWPxg+fdMQ9xtnU=; b=Os4j1uE3/Z8JgEP9XYhyragazxILRZcneUCW38K0HYgDhC5zZX7dCLjVrR6YBTGn/O fZT+ZMUUHQ9YzA4vdW3D2wyot8mPJft/+mwuMg5AI7M7X0cdtXyzqdxrifUp5WAys2X5 HSKEsNe7KB7hD6hlrfgcDpJ6cuqDAhuLA3AYkZAjuE5BUVALonr68fNYJtBLDeTvk81r AsnbW5xf8GpNhN7r2cePt2ClZaAnwzeF0oXV3kSqijUVMOF2OpJwKtGrvYc86JFDk4aX yJvlq8XnlPLBwBLvh4ovuIomoTduV2+2FU2TltNxit3E/RhOwrbEOySuyPiqXQaAI4Cn lNCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837528; x=1742442328; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ibiGjuidp9yYfKMevOqZB9YtgzFUqWPxg+fdMQ9xtnU=; b=OjfWwToCjJN5Gk9Gb0NumPwCN4k5q0VVBLRxo6anrDd63SjjhwH0JaRIYKwYrYQa7J mczrAA6+ALwqAhWHAi+QoAVBy4pTQ7WVSXmnC6He6XCMHtH3ajzcc3eCkrOXTkFAi/C1 +DD2F4q2RugLlQ1wUFJo2bHC7/GU5vPZb3shKDG/UIuypIxntsLtVH3Oc2Gm2adOFpOQ YPHwoeFysFJG5N+zmolQJMb61D/bt8oa1xj+w3tbrqANMxrVh7jt4C4w1yjmqlrlXWoj U2YKWatNEHXYC4K0zbQ2kSiFrEj4sVZYtq6pqVXSOUuAXKFe478OX1NS7fJS605LkRmi q0KA== X-Gm-Message-State: AOJu0Yzbk5/hG/o3Phg0dxclZYf8ZMyAoMqF2gfcQfAK+0OGc/EVEmVB KMV9GPTFdr5IYbecPK85Zeabd4I+OxnR0CrYb3XXk1GGF1Rr/4eSS2vVLyFpI9MJEhHNJEk4Rf7 F X-Gm-Gg: ASbGncuGTyE9X1MezitC3srZin6cZITS0vYXPZtqCjB8tMIhc5UFGDiz6ObGhJJXUkb P/wMIzawOwuIKb4jcT4/OXXzxnNbuUEmIEFqObxiFKGvRNz6vxPN9jH8JkNPDpBg8LJfT1OkRVh wC6xB0A3RIn4Dhazpez659xk7qRwX+QZavVSnMt/MZy2aEgtHEUa1Pwzpm67xIjZ6I7aH+EQZ6M Hg0uFlfSwVb7b2p8F+gj0NQD3CvEQo+NjhHY9e2NilJ+xG/XSfR2nPY8viJIf94p0DZ4rpkHIku 63zWRcd8ZemnYQuLjbk29/KhU1Mh5PhObdKusv0JUWt2UgphBtyxJGT+0IKeodt0q8yOZW/52pa s X-Google-Smtp-Source: AGHT+IFe0W/sEz4LO4GMz+/isLbvGVchpdpB5Elc7b13WPElyWkx30KfIeOsbPpADR8Hf2vI8v8nUQ== X-Received: by 2002:a05:6a00:2d91:b0:736:a540:c9b5 with SMTP id d2e1a72fcca58-736eb87772fmr13324256b3a.22.1741837528550; Wed, 12 Mar 2025 20:45:28 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 03/37] include/exec: Use vaddr for *_mmu guest memory access routines Date: Wed, 12 Mar 2025 20:44:43 -0700 Message-ID: <20250313034524.3069690-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837593875019100 Content-Type: text/plain; charset="utf-8" Use vaddr only for the newest api, because it has the least number of uses and therefore is the easiest to audit. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- accel/tcg/atomic_template.h | 16 ++++++------- include/exec/cpu_ldst.h | 48 ++++++++++++++++++------------------- accel/tcg/cputlb.c | 8 +++---- accel/tcg/user-exec.c | 8 +++---- accel/tcg/ldst_common.c.inc | 20 ++++++++-------- 5 files changed, 50 insertions(+), 50 deletions(-) diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h index 89593b2502..08a475c10c 100644 --- a/accel/tcg/atomic_template.h +++ b/accel/tcg/atomic_template.h @@ -77,7 +77,7 @@ # define END _le #endif =20 -ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr addr, +ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, vaddr addr, ABI_TYPE cmpv, ABI_TYPE newv, MemOpIdx oi, uintptr_t retaddr) { @@ -101,7 +101,7 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_pt= r addr, } =20 #if DATA_SIZE < 16 -ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr addr, ABI_TYPE val, +ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, vaddr addr, ABI_TYPE val, MemOpIdx oi, uintptr_t retaddr) { DATA_TYPE *haddr =3D atomic_mmu_lookup(env_cpu(env), addr, oi, @@ -120,7 +120,7 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr a= ddr, ABI_TYPE val, } =20 #define GEN_ATOMIC_HELPER(X) \ -ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \ +ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \ ABI_TYPE val, MemOpIdx oi, uintptr_t retaddr) \ { \ DATA_TYPE *haddr, ret; \ @@ -156,7 +156,7 @@ GEN_ATOMIC_HELPER(xor_fetch) * of CF_PARALLEL's value, we'll trace just a read and a write. */ #define GEN_ATOMIC_HELPER_FN(X, FN, XDATA_TYPE, RET) \ -ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \ +ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \ ABI_TYPE xval, MemOpIdx oi, uintptr_t retaddr) \ { \ XDATA_TYPE *haddr, cmp, old, new, val =3D xval; \ @@ -202,7 +202,7 @@ GEN_ATOMIC_HELPER_FN(umax_fetch, MAX, DATA_TYPE, new) # define END _be #endif =20 -ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr addr, +ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, vaddr addr, ABI_TYPE cmpv, ABI_TYPE newv, MemOpIdx oi, uintptr_t retaddr) { @@ -226,7 +226,7 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_pt= r addr, } =20 #if DATA_SIZE < 16 -ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr addr, ABI_TYPE val, +ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, vaddr addr, ABI_TYPE val, MemOpIdx oi, uintptr_t retaddr) { DATA_TYPE *haddr =3D atomic_mmu_lookup(env_cpu(env), addr, oi, @@ -245,7 +245,7 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr a= ddr, ABI_TYPE val, } =20 #define GEN_ATOMIC_HELPER(X) \ -ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \ +ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \ ABI_TYPE val, MemOpIdx oi, uintptr_t retaddr) \ { \ DATA_TYPE *haddr, ret; \ @@ -278,7 +278,7 @@ GEN_ATOMIC_HELPER(xor_fetch) * of CF_PARALLEL's value, we'll trace just a read and a write. */ #define GEN_ATOMIC_HELPER_FN(X, FN, XDATA_TYPE, RET) \ -ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \ +ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \ ABI_TYPE xval, MemOpIdx oi, uintptr_t retaddr) \ { \ XDATA_TYPE *haddr, ldo, ldn, old, new, val =3D xval; \ diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 769e9fc440..ddd8e0cf48 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -157,48 +157,48 @@ void cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr = ptr, uint32_t val, void cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint64_t val, int mmu_idx, uintptr_t ra); =20 -uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t= ra); -uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_= t ra); -uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_= t ra); -uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_= t ra); -Int128 cpu_ld16_mmu(CPUArchState *env, abi_ptr addr, MemOpIdx oi, uintptr_= t ra); +uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t r= a); +uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t = ra); +uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t = ra); +uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t = ra); +Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t = ra); =20 -void cpu_stb_mmu(CPUArchState *env, abi_ptr ptr, uint8_t val, +void cpu_stb_mmu(CPUArchState *env, vaddr ptr, uint8_t val, MemOpIdx oi, uintptr_t ra); -void cpu_stw_mmu(CPUArchState *env, abi_ptr ptr, uint16_t val, +void cpu_stw_mmu(CPUArchState *env, vaddr ptr, uint16_t val, MemOpIdx oi, uintptr_t ra); -void cpu_stl_mmu(CPUArchState *env, abi_ptr ptr, uint32_t val, +void cpu_stl_mmu(CPUArchState *env, vaddr ptr, uint32_t val, MemOpIdx oi, uintptr_t ra); -void cpu_stq_mmu(CPUArchState *env, abi_ptr ptr, uint64_t val, +void cpu_stq_mmu(CPUArchState *env, vaddr ptr, uint64_t val, MemOpIdx oi, uintptr_t ra); -void cpu_st16_mmu(CPUArchState *env, abi_ptr addr, Int128 val, +void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val, MemOpIdx oi, uintptr_t ra); =20 -uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, vaddr addr, uint32_t cmpv, uint32_t newv, MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, vaddr addr, uint32_t cmpv, uint32_t newv, MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, vaddr addr, uint32_t cmpv, uint32_t newv, MemOpIdx oi, uintptr_t retaddr); -uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, abi_ptr addr, +uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, vaddr addr, uint64_t cmpv, uint64_t newv, MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, vaddr addr, uint32_t cmpv, uint32_t newv, MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, vaddr addr, uint32_t cmpv, uint32_t newv, MemOpIdx oi, uintptr_t retaddr); -uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, abi_ptr addr, +uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, vaddr addr, uint64_t cmpv, uint64_t newv, MemOpIdx oi, uintptr_t retaddr); =20 #define GEN_ATOMIC_HELPER(NAME, TYPE, SUFFIX) \ TYPE cpu_atomic_ ## NAME ## SUFFIX ## _mmu \ - (CPUArchState *env, abi_ptr addr, TYPE val, \ + (CPUArchState *env, vaddr addr, TYPE val, \ MemOpIdx oi, uintptr_t retaddr); =20 #ifdef CONFIG_ATOMIC64 @@ -244,10 +244,10 @@ GEN_ATOMIC_HELPER_ALL(xchg) #undef GEN_ATOMIC_HELPER_ALL #undef GEN_ATOMIC_HELPER =20 -Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, abi_ptr addr, +Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, vaddr addr, Int128 cmpv, Int128 newv, MemOpIdx oi, uintptr_t retaddr); -Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr, +Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, vaddr addr, Int128 cmpv, Int128 newv, MemOpIdx oi, uintptr_t retaddr); =20 @@ -297,13 +297,13 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, = abi_ptr addr, # define cpu_stq_mmuidx_ra cpu_stq_le_mmuidx_ra #endif =20 -uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, +uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra); -uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, +uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra); -uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra); -uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr, +uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra); =20 uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr); diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index fb22048876..b03998f926 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -2925,25 +2925,25 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr ad= dr) return do_ld8_mmu(cs, addr, oi, 0, MMU_INST_FETCH); } =20 -uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, +uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t retaddr) { return do_ld1_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH); } =20 -uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, +uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t retaddr) { return do_ld2_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH); } =20 -uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t retaddr) { return do_ld4_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH); } =20 -uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr, +uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t retaddr) { return do_ld8_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH); diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 2322181b15..3f63b194bb 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -1254,7 +1254,7 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr ptr) return ret; } =20 -uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, +uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { void *haddr; @@ -1266,7 +1266,7 @@ uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr a= ddr, return ret; } =20 -uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, +uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { void *haddr; @@ -1281,7 +1281,7 @@ uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr = addr, return ret; } =20 -uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { void *haddr; @@ -1296,7 +1296,7 @@ uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr = addr, return ret; } =20 -uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr, +uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { void *haddr; diff --git a/accel/tcg/ldst_common.c.inc b/accel/tcg/ldst_common.c.inc index ebbf380d76..0447c0bb92 100644 --- a/accel/tcg/ldst_common.c.inc +++ b/accel/tcg/ldst_common.c.inc @@ -135,7 +135,7 @@ static void plugin_load_cb(CPUArchState *env, abi_ptr a= ddr, } } =20 -uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr addr, MemOpIdx oi, uintptr_= t ra) +uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t = ra) { uint8_t ret; =20 @@ -145,7 +145,7 @@ uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr addr, Me= mOpIdx oi, uintptr_t ra) return ret; } =20 -uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr addr, +uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { uint16_t ret; @@ -156,7 +156,7 @@ uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr addr, return ret; } =20 -uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { uint32_t ret; @@ -167,7 +167,7 @@ uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr addr, return ret; } =20 -uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr addr, +uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { uint64_t ret; @@ -178,7 +178,7 @@ uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr addr, return ret; } =20 -Int128 cpu_ld16_mmu(CPUArchState *env, abi_ptr addr, +Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { Int128 ret; @@ -205,14 +205,14 @@ static void plugin_store_cb(CPUArchState *env, abi_pt= r addr, } } =20 -void cpu_stb_mmu(CPUArchState *env, abi_ptr addr, uint8_t val, +void cpu_stb_mmu(CPUArchState *env, vaddr addr, uint8_t val, MemOpIdx oi, uintptr_t retaddr) { helper_stb_mmu(env, addr, val, oi, retaddr); plugin_store_cb(env, addr, val, 0, oi); } =20 -void cpu_stw_mmu(CPUArchState *env, abi_ptr addr, uint16_t val, +void cpu_stw_mmu(CPUArchState *env, vaddr addr, uint16_t val, MemOpIdx oi, uintptr_t retaddr) { tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_16); @@ -220,7 +220,7 @@ void cpu_stw_mmu(CPUArchState *env, abi_ptr addr, uint1= 6_t val, plugin_store_cb(env, addr, val, 0, oi); } =20 -void cpu_stl_mmu(CPUArchState *env, abi_ptr addr, uint32_t val, +void cpu_stl_mmu(CPUArchState *env, vaddr addr, uint32_t val, MemOpIdx oi, uintptr_t retaddr) { tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_32); @@ -228,7 +228,7 @@ void cpu_stl_mmu(CPUArchState *env, abi_ptr addr, uint3= 2_t val, plugin_store_cb(env, addr, val, 0, oi); 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Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/exec/cpu-ldst-common.h | 122 +++++++++++++++++++++++++++++++++ include/exec/cpu_ldst.h | 108 +---------------------------- 2 files changed, 123 insertions(+), 107 deletions(-) create mode 100644 include/exec/cpu-ldst-common.h diff --git a/include/exec/cpu-ldst-common.h b/include/exec/cpu-ldst-common.h new file mode 100644 index 0000000000..c46a6ade5d --- /dev/null +++ b/include/exec/cpu-ldst-common.h @@ -0,0 +1,122 @@ +/* + * Software MMU support + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#ifndef CPU_LDST_COMMON_H +#define CPU_LDST_COMMON_H + +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + +#include "exec/memopidx.h" +#include "exec/vaddr.h" +#include "exec/mmu-access-type.h" +#include "qemu/int128.h" + +uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t r= a); +uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t = ra); +uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t = ra); +uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t = ra); +Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t = ra); + +void cpu_stb_mmu(CPUArchState *env, vaddr ptr, uint8_t val, + MemOpIdx oi, uintptr_t ra); +void cpu_stw_mmu(CPUArchState *env, vaddr ptr, uint16_t val, + MemOpIdx oi, uintptr_t ra); +void cpu_stl_mmu(CPUArchState *env, vaddr ptr, uint32_t val, + MemOpIdx oi, uintptr_t ra); +void cpu_stq_mmu(CPUArchState *env, vaddr ptr, uint64_t val, + MemOpIdx oi, uintptr_t ra); +void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val, + MemOpIdx oi, uintptr_t ra); + +uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, vaddr addr, + uint32_t cmpv, uint32_t newv, + MemOpIdx oi, uintptr_t retaddr); +uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, vaddr addr, + uint32_t cmpv, uint32_t newv, + MemOpIdx oi, uintptr_t retaddr); +uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, vaddr addr, + uint32_t cmpv, uint32_t newv, + MemOpIdx oi, uintptr_t retaddr); +uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, vaddr addr, + uint64_t cmpv, uint64_t newv, + MemOpIdx oi, uintptr_t retaddr); +uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, vaddr addr, + uint32_t cmpv, uint32_t newv, + MemOpIdx oi, uintptr_t retaddr); +uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, vaddr addr, + uint32_t cmpv, uint32_t newv, + MemOpIdx oi, uintptr_t retaddr); +uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, vaddr addr, + uint64_t cmpv, uint64_t newv, + MemOpIdx oi, uintptr_t retaddr); + +#define GEN_ATOMIC_HELPER(NAME, TYPE, SUFFIX) \ +TYPE cpu_atomic_ ## NAME ## SUFFIX ## _mmu \ + (CPUArchState *env, vaddr addr, TYPE val, \ + MemOpIdx oi, uintptr_t retaddr); + +#ifdef CONFIG_ATOMIC64 +#define GEN_ATOMIC_HELPER_ALL(NAME) \ + GEN_ATOMIC_HELPER(NAME, uint32_t, b) \ + GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \ + GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \ + GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \ + GEN_ATOMIC_HELPER(NAME, uint32_t, l_be) \ + GEN_ATOMIC_HELPER(NAME, uint64_t, q_le) \ + GEN_ATOMIC_HELPER(NAME, uint64_t, q_be) +#else +#define GEN_ATOMIC_HELPER_ALL(NAME) \ + GEN_ATOMIC_HELPER(NAME, uint32_t, b) \ + GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \ + GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \ + GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \ + GEN_ATOMIC_HELPER(NAME, uint32_t, l_be) +#endif + +GEN_ATOMIC_HELPER_ALL(fetch_add) +GEN_ATOMIC_HELPER_ALL(fetch_sub) +GEN_ATOMIC_HELPER_ALL(fetch_and) +GEN_ATOMIC_HELPER_ALL(fetch_or) +GEN_ATOMIC_HELPER_ALL(fetch_xor) +GEN_ATOMIC_HELPER_ALL(fetch_smin) +GEN_ATOMIC_HELPER_ALL(fetch_umin) +GEN_ATOMIC_HELPER_ALL(fetch_smax) +GEN_ATOMIC_HELPER_ALL(fetch_umax) + +GEN_ATOMIC_HELPER_ALL(add_fetch) +GEN_ATOMIC_HELPER_ALL(sub_fetch) +GEN_ATOMIC_HELPER_ALL(and_fetch) +GEN_ATOMIC_HELPER_ALL(or_fetch) +GEN_ATOMIC_HELPER_ALL(xor_fetch) +GEN_ATOMIC_HELPER_ALL(smin_fetch) +GEN_ATOMIC_HELPER_ALL(umin_fetch) +GEN_ATOMIC_HELPER_ALL(smax_fetch) +GEN_ATOMIC_HELPER_ALL(umax_fetch) + +GEN_ATOMIC_HELPER_ALL(xchg) + +#undef GEN_ATOMIC_HELPER_ALL +#undef GEN_ATOMIC_HELPER + +Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, vaddr addr, + Int128 cmpv, Int128 newv, + MemOpIdx oi, uintptr_t retaddr); +Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, vaddr addr, + Int128 cmpv, Int128 newv, + MemOpIdx oi, uintptr_t retaddr); + +uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, + MemOpIdx oi, uintptr_t ra); +uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr, + MemOpIdx oi, uintptr_t ra); +uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr, + MemOpIdx oi, uintptr_t ra); +uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr, + MemOpIdx oi, uintptr_t ra); + +#endif /* CPU_LDST_COMMON_H */ diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index ddd8e0cf48..1fbdbe59ae 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -66,11 +66,8 @@ #error Can only include this header with TCG #endif =20 -#include "exec/memopidx.h" -#include "exec/vaddr.h" +#include "exec/cpu-ldst-common.h" #include "exec/abi_ptr.h" -#include "exec/mmu-access-type.h" -#include "qemu/int128.h" =20 #if defined(CONFIG_USER_ONLY) #include "user/guest-host.h" @@ -157,100 +154,6 @@ void cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr = ptr, uint32_t val, void cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint64_t val, int mmu_idx, uintptr_t ra); =20 -uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t r= a); -uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t = ra); -uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t = ra); -uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t = ra); -Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t = ra); - -void cpu_stb_mmu(CPUArchState *env, vaddr ptr, uint8_t val, - MemOpIdx oi, uintptr_t ra); -void cpu_stw_mmu(CPUArchState *env, vaddr ptr, uint16_t val, - MemOpIdx oi, uintptr_t ra); -void cpu_stl_mmu(CPUArchState *env, vaddr ptr, uint32_t val, - MemOpIdx oi, uintptr_t ra); -void cpu_stq_mmu(CPUArchState *env, vaddr ptr, uint64_t val, - MemOpIdx oi, uintptr_t ra); -void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val, - MemOpIdx oi, uintptr_t ra); - -uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, vaddr addr, - uint32_t cmpv, uint32_t newv, - MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, vaddr addr, - uint32_t cmpv, uint32_t newv, - MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, vaddr addr, - uint32_t cmpv, uint32_t newv, - MemOpIdx oi, uintptr_t retaddr); -uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, vaddr addr, - uint64_t cmpv, uint64_t newv, - MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, vaddr addr, - uint32_t cmpv, uint32_t newv, - MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, vaddr addr, - uint32_t cmpv, uint32_t newv, - MemOpIdx oi, uintptr_t retaddr); -uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, vaddr addr, - uint64_t cmpv, uint64_t newv, - MemOpIdx oi, uintptr_t retaddr); - -#define GEN_ATOMIC_HELPER(NAME, TYPE, SUFFIX) \ -TYPE cpu_atomic_ ## NAME ## SUFFIX ## _mmu \ - (CPUArchState *env, vaddr addr, TYPE val, \ - MemOpIdx oi, uintptr_t retaddr); - -#ifdef CONFIG_ATOMIC64 -#define GEN_ATOMIC_HELPER_ALL(NAME) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, b) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, l_be) \ - GEN_ATOMIC_HELPER(NAME, uint64_t, q_le) \ - GEN_ATOMIC_HELPER(NAME, uint64_t, q_be) -#else -#define GEN_ATOMIC_HELPER_ALL(NAME) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, b) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, l_be) -#endif - -GEN_ATOMIC_HELPER_ALL(fetch_add) -GEN_ATOMIC_HELPER_ALL(fetch_sub) -GEN_ATOMIC_HELPER_ALL(fetch_and) -GEN_ATOMIC_HELPER_ALL(fetch_or) -GEN_ATOMIC_HELPER_ALL(fetch_xor) -GEN_ATOMIC_HELPER_ALL(fetch_smin) -GEN_ATOMIC_HELPER_ALL(fetch_umin) -GEN_ATOMIC_HELPER_ALL(fetch_smax) -GEN_ATOMIC_HELPER_ALL(fetch_umax) - -GEN_ATOMIC_HELPER_ALL(add_fetch) -GEN_ATOMIC_HELPER_ALL(sub_fetch) -GEN_ATOMIC_HELPER_ALL(and_fetch) -GEN_ATOMIC_HELPER_ALL(or_fetch) -GEN_ATOMIC_HELPER_ALL(xor_fetch) -GEN_ATOMIC_HELPER_ALL(smin_fetch) -GEN_ATOMIC_HELPER_ALL(umin_fetch) -GEN_ATOMIC_HELPER_ALL(smax_fetch) -GEN_ATOMIC_HELPER_ALL(umax_fetch) - -GEN_ATOMIC_HELPER_ALL(xchg) - -#undef GEN_ATOMIC_HELPER_ALL -#undef GEN_ATOMIC_HELPER - -Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, vaddr addr, - Int128 cmpv, Int128 newv, - MemOpIdx oi, uintptr_t retaddr); -Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, vaddr addr, - Int128 cmpv, Int128 newv, - MemOpIdx oi, uintptr_t retaddr); - #if TARGET_BIG_ENDIAN # define cpu_lduw_data cpu_lduw_be_data # define cpu_ldsw_data cpu_ldsw_be_data @@ -297,15 +200,6 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, v= addr addr, # define cpu_stq_mmuidx_ra cpu_stq_le_mmuidx_ra #endif =20 -uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, - MemOpIdx oi, uintptr_t ra); -uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr, - MemOpIdx oi, uintptr_t ra); -uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr, - MemOpIdx oi, uintptr_t ra); -uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr, - MemOpIdx oi, uintptr_t ra); - uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr); uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr); uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr); --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/exec/cpu_ldst.h | 163 ++++++++++++++++++++++++++++-------- accel/tcg/ldst_common.c.inc | 118 -------------------------- 2 files changed, 129 insertions(+), 152 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 1fbdbe59ae..b33755169e 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -118,41 +118,136 @@ void cpu_stl_le_data_ra(CPUArchState *env, abi_ptr p= tr, void cpu_stq_le_data_ra(CPUArchState *env, abi_ptr ptr, uint64_t val, uintptr_t ra); =20 -uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -uint32_t cpu_lduw_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -int cpu_ldsw_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -uint32_t cpu_ldl_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -uint64_t cpu_ldq_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -uint32_t cpu_lduw_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -int cpu_ldsw_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -uint32_t cpu_ldl_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -uint64_t cpu_ldq_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); +static inline uint32_t +cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, int mmu_idx, uintptr_t= ra) +{ + MemOpIdx oi =3D make_memop_idx(MO_UB, mmu_idx); + return cpu_ldb_mmu(env, addr, oi, ra); +} =20 -void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val, - int mmu_idx, uintptr_t ra); -void cpu_stw_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val, - int mmu_idx, uintptr_t ra); -void cpu_stl_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val, - int mmu_idx, uintptr_t ra); -void cpu_stq_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint64_t val, - int mmu_idx, uintptr_t ra); -void cpu_stw_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val, - int mmu_idx, uintptr_t ra); -void cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val, - int mmu_idx, uintptr_t ra); -void cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint64_t val, - int mmu_idx, uintptr_t ra); +static inline int +cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr, int mmu_idx, uintptr_t= ra) +{ + return (int8_t)cpu_ldub_mmuidx_ra(env, addr, mmu_idx, ra); +} + +static inline uint32_t +cpu_lduw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + MemOpIdx oi =3D make_memop_idx(MO_BEUW | MO_UNALN, mmu_idx); + return cpu_ldw_mmu(env, addr, oi, ra); +} + +static inline int +cpu_ldsw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return (int16_t)cpu_lduw_be_mmuidx_ra(env, addr, mmu_idx, ra); +} + +static inline uint32_t +cpu_ldl_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + MemOpIdx oi =3D make_memop_idx(MO_BEUL | MO_UNALN, mmu_idx); + return cpu_ldl_mmu(env, addr, oi, ra); +} + +static inline uint64_t +cpu_ldq_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + MemOpIdx oi =3D make_memop_idx(MO_BEUQ | MO_UNALN, mmu_idx); + return cpu_ldq_mmu(env, addr, oi, ra); +} + +static inline uint32_t +cpu_lduw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + MemOpIdx oi =3D make_memop_idx(MO_LEUW | MO_UNALN, mmu_idx); + return cpu_ldw_mmu(env, addr, oi, ra); +} + +static inline int +cpu_ldsw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return (int16_t)cpu_lduw_le_mmuidx_ra(env, addr, mmu_idx, ra); +} + +static inline uint32_t +cpu_ldl_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + MemOpIdx oi =3D make_memop_idx(MO_LEUL | MO_UNALN, mmu_idx); + return cpu_ldl_mmu(env, addr, oi, ra); +} + +static inline uint64_t +cpu_ldq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + MemOpIdx oi =3D make_memop_idx(MO_LEUQ | MO_UNALN, mmu_idx); + return cpu_ldq_mmu(env, addr, oi, ra); +} + +static inline void +cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, + int mmu_idx, uintptr_t ra) +{ + MemOpIdx oi =3D make_memop_idx(MO_UB, mmu_idx); + cpu_stb_mmu(env, addr, val, oi, ra); +} + +static inline void +cpu_stw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, + int mmu_idx, uintptr_t ra) +{ + MemOpIdx oi =3D make_memop_idx(MO_BEUW | MO_UNALN, mmu_idx); + cpu_stw_mmu(env, addr, val, oi, ra); +} + +static inline void +cpu_stl_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, + int mmu_idx, uintptr_t ra) +{ + MemOpIdx oi =3D make_memop_idx(MO_BEUL | MO_UNALN, mmu_idx); + cpu_stl_mmu(env, addr, val, oi, ra); +} + +static inline void +cpu_stq_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, + int mmu_idx, uintptr_t ra) +{ + MemOpIdx oi =3D make_memop_idx(MO_BEUQ | MO_UNALN, mmu_idx); + cpu_stq_mmu(env, addr, val, oi, ra); +} + +static inline void +cpu_stw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, + int mmu_idx, uintptr_t ra) +{ + MemOpIdx oi =3D make_memop_idx(MO_LEUW | MO_UNALN, mmu_idx); + cpu_stw_mmu(env, addr, val, oi, ra); +} + +static inline void +cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, + int mmu_idx, uintptr_t ra) +{ + MemOpIdx oi =3D make_memop_idx(MO_LEUL | MO_UNALN, mmu_idx); + cpu_stl_mmu(env, addr, val, oi, ra); +} + +static inline void +cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, + int mmu_idx, uintptr_t ra) +{ + MemOpIdx oi =3D make_memop_idx(MO_LEUQ | MO_UNALN, mmu_idx); + cpu_stq_mmu(env, addr, val, oi, ra); +} =20 #if TARGET_BIG_ENDIAN # define cpu_lduw_data cpu_lduw_be_data diff --git a/accel/tcg/ldst_common.c.inc b/accel/tcg/ldst_common.c.inc index 0447c0bb92..99a56df3fb 100644 --- a/accel/tcg/ldst_common.c.inc +++ b/accel/tcg/ldst_common.c.inc @@ -248,124 +248,6 @@ void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int1= 28 val, * Wrappers of the above */ =20 -uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, - int mmu_idx, uintptr_t ra) -{ - MemOpIdx oi =3D make_memop_idx(MO_UB, mmu_idx); - return cpu_ldb_mmu(env, addr, oi, ra); -} - -int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr, - int mmu_idx, uintptr_t ra) -{ - return (int8_t)cpu_ldub_mmuidx_ra(env, addr, mmu_idx, ra); -} - -uint32_t cpu_lduw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, - int mmu_idx, uintptr_t ra) -{ - MemOpIdx oi =3D make_memop_idx(MO_BEUW | MO_UNALN, mmu_idx); - return cpu_ldw_mmu(env, addr, oi, ra); -} - -int cpu_ldsw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, - int mmu_idx, uintptr_t ra) -{ - return (int16_t)cpu_lduw_be_mmuidx_ra(env, addr, mmu_idx, ra); -} - -uint32_t cpu_ldl_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, - int mmu_idx, uintptr_t ra) -{ - MemOpIdx oi =3D make_memop_idx(MO_BEUL | MO_UNALN, mmu_idx); - return cpu_ldl_mmu(env, addr, oi, ra); -} - -uint64_t cpu_ldq_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, - int mmu_idx, uintptr_t ra) -{ - MemOpIdx oi =3D make_memop_idx(MO_BEUQ | MO_UNALN, mmu_idx); - return cpu_ldq_mmu(env, addr, oi, ra); -} - -uint32_t cpu_lduw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, - int mmu_idx, uintptr_t ra) -{ - MemOpIdx oi =3D make_memop_idx(MO_LEUW | MO_UNALN, mmu_idx); - return cpu_ldw_mmu(env, addr, oi, ra); -} - -int cpu_ldsw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, - int mmu_idx, uintptr_t ra) -{ - return (int16_t)cpu_lduw_le_mmuidx_ra(env, addr, mmu_idx, ra); -} - -uint32_t cpu_ldl_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, - int mmu_idx, uintptr_t ra) -{ - MemOpIdx oi =3D make_memop_idx(MO_LEUL | MO_UNALN, mmu_idx); - return cpu_ldl_mmu(env, addr, oi, ra); -} - -uint64_t cpu_ldq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, - int mmu_idx, uintptr_t ra) -{ - MemOpIdx oi =3D make_memop_idx(MO_LEUQ | MO_UNALN, mmu_idx); - return cpu_ldq_mmu(env, addr, oi, ra); -} - -void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, - int mmu_idx, uintptr_t ra) -{ - MemOpIdx oi =3D make_memop_idx(MO_UB, mmu_idx); - cpu_stb_mmu(env, addr, val, oi, ra); -} - -void cpu_stw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, - int mmu_idx, uintptr_t ra) -{ - MemOpIdx oi =3D make_memop_idx(MO_BEUW | MO_UNALN, mmu_idx); - cpu_stw_mmu(env, addr, val, oi, ra); -} - -void cpu_stl_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, - int mmu_idx, uintptr_t ra) -{ - MemOpIdx oi =3D make_memop_idx(MO_BEUL | MO_UNALN, mmu_idx); - cpu_stl_mmu(env, addr, val, oi, ra); -} - -void cpu_stq_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, - int mmu_idx, uintptr_t ra) -{ - MemOpIdx oi =3D make_memop_idx(MO_BEUQ | MO_UNALN, mmu_idx); - cpu_stq_mmu(env, addr, val, oi, ra); -} - -void cpu_stw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, - int mmu_idx, uintptr_t ra) -{ - MemOpIdx oi =3D make_memop_idx(MO_LEUW | MO_UNALN, mmu_idx); - cpu_stw_mmu(env, addr, val, oi, ra); -} - -void cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, - int mmu_idx, uintptr_t ra) -{ - MemOpIdx oi =3D make_memop_idx(MO_LEUL | MO_UNALN, mmu_idx); - cpu_stl_mmu(env, addr, val, oi, ra); -} - -void cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, - int mmu_idx, uintptr_t ra) -{ - MemOpIdx oi =3D make_memop_idx(MO_LEUQ | MO_UNALN, mmu_idx); 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Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/exec/cpu_ldst.h | 144 +++++++++++++++++++++++++++++------- accel/tcg/ldst_common.c.inc | 108 --------------------------- 2 files changed, 118 insertions(+), 134 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index b33755169e..963c538176 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -84,17 +84,6 @@ int cpu_ldsw_le_data(CPUArchState *env, abi_ptr ptr); uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr ptr); uint64_t cpu_ldq_le_data(CPUArchState *env, abi_ptr ptr); =20 -uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -int cpu_ldsb_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -uint32_t cpu_lduw_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -int cpu_ldsw_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -uint32_t cpu_ldl_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -uint64_t cpu_ldq_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -uint32_t cpu_lduw_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -int cpu_ldsw_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -uint32_t cpu_ldl_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -uint64_t cpu_ldq_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); - void cpu_stb_data(CPUArchState *env, abi_ptr ptr, uint32_t val); void cpu_stw_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val); void cpu_stl_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val); @@ -103,21 +92,6 @@ void cpu_stw_le_data(CPUArchState *env, abi_ptr ptr, ui= nt32_t val); void cpu_stl_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val); void cpu_stq_le_data(CPUArchState *env, abi_ptr ptr, uint64_t val); =20 -void cpu_stb_data_ra(CPUArchState *env, abi_ptr ptr, - uint32_t val, uintptr_t ra); -void cpu_stw_be_data_ra(CPUArchState *env, abi_ptr ptr, - uint32_t val, uintptr_t ra); -void cpu_stl_be_data_ra(CPUArchState *env, abi_ptr ptr, - uint32_t val, uintptr_t ra); -void cpu_stq_be_data_ra(CPUArchState *env, abi_ptr ptr, - uint64_t val, uintptr_t ra); -void cpu_stw_le_data_ra(CPUArchState *env, abi_ptr ptr, - uint32_t val, uintptr_t ra); -void cpu_stl_le_data_ra(CPUArchState *env, abi_ptr ptr, - uint32_t val, uintptr_t ra); -void cpu_stq_le_data_ra(CPUArchState *env, abi_ptr ptr, - uint64_t val, uintptr_t ra); - static inline uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, int mmu_idx, uintptr_t= ra) { @@ -249,6 +223,124 @@ cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,= uint64_t val, cpu_stq_mmu(env, addr, val, oi, ra); } =20 +/*--------------------------*/ + +static inline uint32_t +cpu_ldub_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) +{ + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); + return cpu_ldub_mmuidx_ra(env, addr, mmu_index, ra); +} + +static inline int +cpu_ldsb_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) +{ + return (int8_t)cpu_ldub_data_ra(env, addr, ra); +} + +static inline uint32_t +cpu_lduw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) +{ + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); + return cpu_lduw_be_mmuidx_ra(env, addr, mmu_index, ra); +} + +static inline int +cpu_ldsw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) +{ + return (int16_t)cpu_lduw_be_data_ra(env, addr, ra); +} + +static inline uint32_t +cpu_ldl_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) +{ + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); + return cpu_ldl_be_mmuidx_ra(env, addr, mmu_index, ra); +} + +static inline uint64_t +cpu_ldq_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) +{ + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); + return cpu_ldq_be_mmuidx_ra(env, addr, mmu_index, ra); +} + +static inline uint32_t +cpu_lduw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) +{ + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); + return cpu_lduw_le_mmuidx_ra(env, addr, mmu_index, ra); +} + +static inline int +cpu_ldsw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) +{ + return (int16_t)cpu_lduw_le_data_ra(env, addr, ra); +} + +static inline uint32_t +cpu_ldl_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) +{ + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); + return cpu_ldl_le_mmuidx_ra(env, addr, mmu_index, ra); +} + +static inline uint64_t +cpu_ldq_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) +{ + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); + return cpu_ldq_le_mmuidx_ra(env, addr, mmu_index, ra); +} + +static inline void +cpu_stb_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintptr_t r= a) +{ + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); + cpu_stb_mmuidx_ra(env, addr, val, mmu_index, ra); +} + +static inline void +cpu_stw_be_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintptr_= t ra) +{ + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); + cpu_stw_be_mmuidx_ra(env, addr, val, mmu_index, ra); +} + +static inline void +cpu_stl_be_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintptr_= t ra) +{ + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); + cpu_stl_be_mmuidx_ra(env, addr, val, mmu_index, ra); +} + +static inline void +cpu_stq_be_data_ra(CPUArchState *env, abi_ptr addr, uint64_t val, uintptr_= t ra) +{ + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); + cpu_stq_be_mmuidx_ra(env, addr, val, mmu_index, ra); +} + +static inline void +cpu_stw_le_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintptr_= t ra) +{ + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); + cpu_stw_le_mmuidx_ra(env, addr, val, mmu_index, ra); +} + +static inline void +cpu_stl_le_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintptr_= t ra) +{ + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); + cpu_stl_le_mmuidx_ra(env, addr, val, mmu_index, ra); +} + +static inline void +cpu_stq_le_data_ra(CPUArchState *env, abi_ptr addr, uint64_t val, uintptr_= t ra) +{ + int mmu_index =3D cpu_mmu_index(env_cpu(env), false); + cpu_stq_le_mmuidx_ra(env, addr, val, mmu_index, ra); +} + #if TARGET_BIG_ENDIAN # define cpu_lduw_data cpu_lduw_be_data # define cpu_ldsw_data cpu_ldsw_be_data diff --git a/accel/tcg/ldst_common.c.inc b/accel/tcg/ldst_common.c.inc index 99a56df3fb..2f203290db 100644 --- a/accel/tcg/ldst_common.c.inc +++ b/accel/tcg/ldst_common.c.inc @@ -248,114 +248,6 @@ void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int1= 28 val, * Wrappers of the above */ =20 -uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) -{ - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); - return cpu_ldub_mmuidx_ra(env, addr, mmu_index, ra); -} - -int cpu_ldsb_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) -{ - return (int8_t)cpu_ldub_data_ra(env, addr, ra); -} - -uint32_t cpu_lduw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) -{ - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); - return cpu_lduw_be_mmuidx_ra(env, addr, mmu_index, ra); -} - -int cpu_ldsw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) -{ - return (int16_t)cpu_lduw_be_data_ra(env, addr, ra); -} - -uint32_t cpu_ldl_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) -{ - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); - return cpu_ldl_be_mmuidx_ra(env, addr, mmu_index, ra); -} - -uint64_t cpu_ldq_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) -{ - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); - return cpu_ldq_be_mmuidx_ra(env, addr, mmu_index, ra); -} - -uint32_t cpu_lduw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) -{ - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); - return cpu_lduw_le_mmuidx_ra(env, addr, mmu_index, ra); -} - -int cpu_ldsw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) -{ - return (int16_t)cpu_lduw_le_data_ra(env, addr, ra); -} - -uint32_t cpu_ldl_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) -{ - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); - return cpu_ldl_le_mmuidx_ra(env, addr, mmu_index, ra); -} - -uint64_t cpu_ldq_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra) -{ - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); - return cpu_ldq_le_mmuidx_ra(env, addr, mmu_index, ra); -} - -void cpu_stb_data_ra(CPUArchState *env, abi_ptr addr, - uint32_t val, uintptr_t ra) -{ - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); - cpu_stb_mmuidx_ra(env, addr, val, mmu_index, ra); -} - -void cpu_stw_be_data_ra(CPUArchState *env, abi_ptr addr, - uint32_t val, uintptr_t ra) -{ - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); - cpu_stw_be_mmuidx_ra(env, addr, val, mmu_index, ra); -} - -void cpu_stl_be_data_ra(CPUArchState *env, abi_ptr addr, - uint32_t val, uintptr_t ra) -{ - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); - cpu_stl_be_mmuidx_ra(env, addr, val, mmu_index, ra); -} - -void cpu_stq_be_data_ra(CPUArchState *env, abi_ptr addr, - uint64_t val, uintptr_t ra) -{ - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); - cpu_stq_be_mmuidx_ra(env, addr, val, mmu_index, ra); -} - -void cpu_stw_le_data_ra(CPUArchState *env, abi_ptr addr, - uint32_t val, uintptr_t ra) -{ - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); - cpu_stw_le_mmuidx_ra(env, addr, val, mmu_index, ra); -} - -void cpu_stl_le_data_ra(CPUArchState *env, abi_ptr addr, - uint32_t val, uintptr_t ra) -{ - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); - cpu_stl_le_mmuidx_ra(env, addr, val, mmu_index, ra); -} - -void cpu_stq_le_data_ra(CPUArchState *env, abi_ptr addr, - uint64_t val, uintptr_t ra) -{ - int mmu_index =3D cpu_mmu_index(env_cpu(env), false); - cpu_stq_le_mmuidx_ra(env, addr, val, mmu_index, ra); -} - -/*--------------------------*/ - uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr addr) { return cpu_ldub_data_ra(env, addr, 0); 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837532; x=1742442332; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=p041g2UoyKwgtmRz0D8khAwbcLhJOr7T2aKI8/Q8EC0=; b=gGnKWAs7QxCiiiuRBL+nAsnKAQ8cp3m6Wp5dXhO9aUkZTbePNCtJZpYJov3uHXpZ/t RQqI4JNpO4vAHr32Vdupx+vx2p6qI/8EAtFWyGq583FZznuv/4T6D+BG6n/w6//d9bvd ln41qSKZauOgR8Lceo0PSmJkJ5QOVnennHQyxrf1oEAe/wW3/oZ01E1IlSC7uzJzP+hs BKt2Ybt5x6R3MYmBFcu8w7bYk6uWVis9RIYagMTC+v/K8rZIGFNyxGxByyLu4A2NS3I9 MAtPapUzT7fnuKmThfAbgh9ptkW86cZNXywvvLdJD7dIXkkYH2P+Og8et9eoCyu3L5X/ 6+PQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837532; x=1742442332; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=p041g2UoyKwgtmRz0D8khAwbcLhJOr7T2aKI8/Q8EC0=; b=LeDAoqPE2ctLeFsenUQT9PPjl8X9M1yjFdwRd3mKkTCgHzcP5iiXtA4huvgNJk7qMo ZAdmbuK01rAuEgi5ZbTfiunX2rtGPMYLT7Bdvlw6m0SNkYHfCLkKxOx6klTwDm+w5hY8 HDFjkbhGt6IQb7IHUNMM2wmAdqlYKz0na7jgMseUpsvcNefgM9DoJkPfB5+5T1ORux28 Ho2b7XrtEUz0wZa5zWP8mxxVaYMKMW9LZX2FeojHaT6S+5OZppoRdZx2XrL52L7Sh4BX S93Drc7qGRY5mlrnF9cE4HZMMY6V9YABeq0OHgccuNS0aqMie4xPdBCCtM6vAu0a3Ffq 7W+Q== X-Gm-Message-State: AOJu0YyOENpGKHzZbaFJXLat17Wz3NuTMtOI5eUztaONEheNNVG7yxIT SpoDVnDuSZgC/mtkFPqfYQC364NWaMAT721klpTYBGu5HfLmmqQMswrnW3KBSifgVJPMaiv3u1C S X-Gm-Gg: ASbGnctMkW39g3ncNKiOnW6zjRDKQtoacj2ydnEtPbvPNfL2EDGtLVvwOo750iOVSTk IdT6UOyK1HMYxcunMhRUawFtTqngtWXp2BAZtEHcY3Q2eBfR4IcZ60aXL4LC2LNZQLK91LAKDhb CrEeaboomb4CK5WAkbqmvcovp+4I3xYrGouo3wSh5JUVlE7NERS0ZykJuHyDIUC/Ov9y7pOIoUW XI6t1X7rA4+D1KlxgRzGpidC3Br0y9mFx+BzABexWzCxyMzv/VDd1prGyiZrzgDPyUv/1i0tQRo a7/HhY+x6RuZFyrnI4KvCX+Op7XVRFbm++7UnA0PErPBgdYwt5h1w8FuNsHAt6WE82F/4pTTqUi d X-Google-Smtp-Source: AGHT+IHvoAbpGY/BHE4VxM0JWlsXqQl2WlFSQ8oaUTdk9Xpgh39Gcm9fhjr/gAIB6w5QpDcTAeTSUw== X-Received: by 2002:a05:6a00:c95:b0:725:96f2:9e63 with SMTP id d2e1a72fcca58-736aab16545mr42138306b3a.24.1741837531818; Wed, 12 Mar 2025 20:45:31 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 07/37] include/exec: Inline *_data memory operations Date: Wed, 12 Mar 2025 20:44:47 -0700 Message-ID: <20250313034524.3069690-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837593870019100 Content-Type: text/plain; charset="utf-8" These expand inline to the *_data_ra api with ra =3D=3D 0. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/exec/cpu_ldst.h | 123 ++++++++++++++++++++++++++++++------ accel/tcg/ldst_common.c.inc | 89 -------------------------- 2 files changed, 104 insertions(+), 108 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 963c538176..70e98ebc52 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -73,25 +73,6 @@ #include "user/guest-host.h" #endif /* CONFIG_USER_ONLY */ =20 -uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr); -int cpu_ldsb_data(CPUArchState *env, abi_ptr ptr); -uint32_t cpu_lduw_be_data(CPUArchState *env, abi_ptr ptr); -int cpu_ldsw_be_data(CPUArchState *env, abi_ptr ptr); -uint32_t cpu_ldl_be_data(CPUArchState *env, abi_ptr ptr); -uint64_t cpu_ldq_be_data(CPUArchState *env, abi_ptr ptr); -uint32_t cpu_lduw_le_data(CPUArchState *env, abi_ptr ptr); -int cpu_ldsw_le_data(CPUArchState *env, abi_ptr ptr); -uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr ptr); -uint64_t cpu_ldq_le_data(CPUArchState *env, abi_ptr ptr); - -void cpu_stb_data(CPUArchState *env, abi_ptr ptr, uint32_t val); -void cpu_stw_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val); -void cpu_stl_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val); -void cpu_stq_be_data(CPUArchState *env, abi_ptr ptr, uint64_t val); -void cpu_stw_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val); -void cpu_stl_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val); -void cpu_stq_le_data(CPUArchState *env, abi_ptr ptr, uint64_t val); - static inline uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, int mmu_idx, uintptr_t= ra) { @@ -341,6 +322,110 @@ cpu_stq_le_data_ra(CPUArchState *env, abi_ptr addr, u= int64_t val, uintptr_t ra) cpu_stq_le_mmuidx_ra(env, addr, val, mmu_index, ra); } =20 +/*--------------------------*/ + +static inline uint32_t +cpu_ldub_data(CPUArchState *env, abi_ptr addr) +{ + return cpu_ldub_data_ra(env, addr, 0); +} + +static inline int +cpu_ldsb_data(CPUArchState *env, abi_ptr addr) +{ + return (int8_t)cpu_ldub_data(env, addr); +} + +static inline uint32_t +cpu_lduw_be_data(CPUArchState *env, abi_ptr addr) +{ + return cpu_lduw_be_data_ra(env, addr, 0); +} + +static inline int +cpu_ldsw_be_data(CPUArchState *env, abi_ptr addr) +{ + return (int16_t)cpu_lduw_be_data(env, addr); +} + +static inline uint32_t +cpu_ldl_be_data(CPUArchState *env, abi_ptr addr) +{ + return cpu_ldl_be_data_ra(env, addr, 0); +} + +static inline uint64_t +cpu_ldq_be_data(CPUArchState *env, abi_ptr addr) +{ + return cpu_ldq_be_data_ra(env, addr, 0); +} + +static inline uint32_t +cpu_lduw_le_data(CPUArchState *env, abi_ptr addr) +{ + return cpu_lduw_le_data_ra(env, addr, 0); +} + +static inline int +cpu_ldsw_le_data(CPUArchState *env, abi_ptr addr) +{ + return (int16_t)cpu_lduw_le_data(env, addr); +} + +static inline uint32_t +cpu_ldl_le_data(CPUArchState *env, abi_ptr addr) +{ + return cpu_ldl_le_data_ra(env, addr, 0); +} + +static inline uint64_t +cpu_ldq_le_data(CPUArchState *env, abi_ptr addr) +{ + return cpu_ldq_le_data_ra(env, addr, 0); +} + +static inline void +cpu_stb_data(CPUArchState *env, abi_ptr addr, uint32_t val) +{ + cpu_stb_data_ra(env, addr, val, 0); +} + +static inline void +cpu_stw_be_data(CPUArchState *env, abi_ptr addr, uint32_t val) +{ + cpu_stw_be_data_ra(env, addr, val, 0); +} + +static inline void +cpu_stl_be_data(CPUArchState *env, abi_ptr addr, uint32_t val) +{ + cpu_stl_be_data_ra(env, addr, val, 0); +} + +static inline void +cpu_stq_be_data(CPUArchState *env, abi_ptr addr, uint64_t val) +{ + cpu_stq_be_data_ra(env, addr, val, 0); +} + +static inline void +cpu_stw_le_data(CPUArchState *env, abi_ptr addr, uint32_t val) +{ + cpu_stw_le_data_ra(env, addr, val, 0); +} + +static inline void +cpu_stl_le_data(CPUArchState *env, abi_ptr addr, uint32_t val) +{ + cpu_stl_le_data_ra(env, addr, val, 0); +} + +static inline void +cpu_stq_le_data(CPUArchState *env, abi_ptr addr, uint64_t val) +{ + cpu_stq_le_data_ra(env, addr, val, 0); +} + #if TARGET_BIG_ENDIAN # define cpu_lduw_data cpu_lduw_be_data # define cpu_ldsw_data cpu_ldsw_be_data diff --git a/accel/tcg/ldst_common.c.inc b/accel/tcg/ldst_common.c.inc index 2f203290db..9791a4e9ef 100644 --- a/accel/tcg/ldst_common.c.inc +++ b/accel/tcg/ldst_common.c.inc @@ -243,92 +243,3 @@ void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int12= 8 val, do_st16_mmu(env_cpu(env), addr, val, oi, retaddr); plugin_store_cb(env, addr, int128_getlo(val), int128_gethi(val), oi); } - -/* - * Wrappers of the above - */ - -uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr addr) -{ - return cpu_ldub_data_ra(env, addr, 0); -} - -int cpu_ldsb_data(CPUArchState *env, abi_ptr addr) -{ - return (int8_t)cpu_ldub_data(env, addr); -} - -uint32_t cpu_lduw_be_data(CPUArchState *env, abi_ptr addr) -{ - return cpu_lduw_be_data_ra(env, addr, 0); -} - -int cpu_ldsw_be_data(CPUArchState *env, abi_ptr addr) -{ - return (int16_t)cpu_lduw_be_data(env, addr); -} - -uint32_t cpu_ldl_be_data(CPUArchState *env, abi_ptr addr) -{ - return cpu_ldl_be_data_ra(env, addr, 0); -} - -uint64_t cpu_ldq_be_data(CPUArchState *env, abi_ptr addr) -{ - return cpu_ldq_be_data_ra(env, addr, 0); -} - -uint32_t cpu_lduw_le_data(CPUArchState *env, abi_ptr addr) -{ - return cpu_lduw_le_data_ra(env, addr, 0); -} - -int cpu_ldsw_le_data(CPUArchState *env, abi_ptr addr) -{ - return (int16_t)cpu_lduw_le_data(env, addr); -} - -uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr addr) -{ - return cpu_ldl_le_data_ra(env, addr, 0); -} - -uint64_t cpu_ldq_le_data(CPUArchState *env, abi_ptr addr) -{ - return cpu_ldq_le_data_ra(env, addr, 0); -} - -void cpu_stb_data(CPUArchState *env, abi_ptr addr, uint32_t val) -{ - cpu_stb_data_ra(env, addr, val, 0); -} - -void cpu_stw_be_data(CPUArchState *env, abi_ptr addr, uint32_t val) -{ - cpu_stw_be_data_ra(env, addr, val, 0); -} - -void cpu_stl_be_data(CPUArchState *env, abi_ptr addr, uint32_t val) -{ - cpu_stl_be_data_ra(env, addr, val, 0); -} - -void cpu_stq_be_data(CPUArchState *env, abi_ptr addr, uint64_t val) -{ - cpu_stq_be_data_ra(env, addr, val, 0); -} - -void cpu_stw_le_data(CPUArchState *env, abi_ptr addr, uint32_t val) -{ - cpu_stw_le_data_ra(env, addr, val, 0); -} - -void cpu_stl_le_data(CPUArchState *env, abi_ptr addr, uint32_t val) -{ - cpu_stl_le_data_ra(env, addr, val, 0); -} - -void cpu_stq_le_data(CPUArchState *env, abi_ptr addr, uint64_t val) -{ - cpu_stq_le_data_ra(env, addr, val, 0); -} --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837532; x=1742442332; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nHXu13DFdrh271auqhCP0lApklGf8VDvaV4uG/D/Dqg=; b=VTokaCVAIFFL35OXkr/TufbJQ7W5L35y8wKPaNBdD7VAkcOZ8Z8qSacuuZDA5xCCvC EYEF+Zsx+3LUUm/vc+lTkqV19QVRgsV+o0QdVbyvUQ+q9Sj0i5SQdbXpaOT03rJfO/ST vDJ/oPSNbYOXNXVlynqNI3OZ7bFNwzrGHrF/hxOuxBSyi6jQUeal+0lWtr9pKy7BfDCf NHVeXi1LK1MEcqm8TU/adiyFPfT4XN/0woQ2czHEtywiicWOPLju3N/A0fyZqfD2XxKQ 0l9sYZlAQBLPFRmziMAiXerwE7LcFsVp12NcriwY3b8CTJwi3uPT384aLEmX/sek9ca2 /mUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837532; x=1742442332; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nHXu13DFdrh271auqhCP0lApklGf8VDvaV4uG/D/Dqg=; b=bhTVZ1DonTMHD0pKETPJoAxkWkGeY2lj0WKXeoGutoILgNwvlts5VNXc98f2UlKMKV SRvrrrwoG4H8/tUj1OUv+f27v/V6nBKCz/bUMZxcA6oYVZuF6SiHTE8WSGwGvApc1Cef /q1HF51/FzJaIiSI1VgfKXFys3go5JYZPbml2K6IIqCTjZEKl/OIBdM2vrcPS4Ze/CK0 b/E3x29nBUsc7WklsX4nleEcw1BP0xNaW4DN13b2A+12gHvI0GDJSgMKbkQlVmv4bJO0 MsCL0J8/ldptMQBk/qi13uVBv0ksEt9MgKeRl24XwcmyIi5VWlF1fojEl2NG6QbNsPvb HOfw== X-Gm-Message-State: AOJu0YzauWShLCb3Dt5nsiawxfzF87O6yv8bSVqOpe+fyeKOupr4cibw KfEAjI3CBQuFLJhYqW16LRTkkECJxtpupvgUV4owlfw4rLV8iTLXd43xs9RO9BSe2LKj26T9NPw O X-Gm-Gg: ASbGncuLPVSmOcc8qJ9nkggwMnHUWOPtdnwIzRI33j77njnM5HlXp5AXq78b2hfkTqG 3E4jLj18TOKzvvRn0eKEyym74eniCZwjSL2tgESWrakHOIXLNVEHNDph5MfJ7ssezRkkcUnc6p/ HudgjfxtdjZIAsBJirkziEUX1rZErtFL4CXmHa6Qt+pxoO3ko5YuUN+b4ECc67699LjD1Gy1W4b kzgueyaQQ6AaTSreBwTUNrqf+PSReO1837OBZEQP0AuaEI2akBJeZrlmPeaaKwr6uYA0WVlPl7W fLHj/pmIwzKCFdkOBKo6uoX6CLvh51qRbOoSKlA7t0U/5+ATgrOEl4Y9LZA/TjNcQyjH+1Lmvcv s X-Google-Smtp-Source: AGHT+IGEioouCc81/LA0yZXuzlWvAgDQ8iibvhZb59pWBFnDBhAmwa+kPd5qnvENOJ6I56HDwaf0fw== X-Received: by 2002:a05:6a00:3d55:b0:736:5753:12fd with SMTP id d2e1a72fcca58-736aa9c1de8mr33694809b3a.4.1741837532630; Wed, 12 Mar 2025 20:45:32 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 08/37] include/exec: Inline *_code memory operations Date: Wed, 12 Mar 2025 20:44:48 -0700 Message-ID: <20250313034524.3069690-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837599634019100 Content-Type: text/plain; charset="utf-8" These expand inline to the *_mmu api with a lookup of the target's cpu_mmu_index() and ra =3D=3D 0. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/exec/cpu_ldst.h | 31 +++++++++++++++++++++++++++---- accel/tcg/cputlb.c | 28 ---------------------------- accel/tcg/user-exec.c | 40 ---------------------------------------- 3 files changed, 27 insertions(+), 72 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 70e98ebc52..92b4cf20fd 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -472,10 +472,33 @@ cpu_stq_le_data(CPUArchState *env, abi_ptr addr, uint= 64_t val) # define cpu_stq_mmuidx_ra cpu_stq_le_mmuidx_ra #endif =20 -uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr); -uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr); -uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr); -uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr); +static inline uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr) +{ + CPUState *cs =3D env_cpu(env); + MemOpIdx oi =3D make_memop_idx(MO_UB, cpu_mmu_index(cs, true)); + return cpu_ldb_code_mmu(env, addr, oi, 0); +} + +static inline uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr) +{ + CPUState *cs =3D env_cpu(env); + MemOpIdx oi =3D make_memop_idx(MO_TEUW, cpu_mmu_index(cs, true)); + return cpu_ldw_code_mmu(env, addr, oi, 0); +} + +static inline uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr) +{ + CPUState *cs =3D env_cpu(env); + MemOpIdx oi =3D make_memop_idx(MO_TEUL, cpu_mmu_index(cs, true)); + return cpu_ldl_code_mmu(env, addr, oi, 0); +} + +static inline uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr) +{ + CPUState *cs =3D env_cpu(env); + MemOpIdx oi =3D make_memop_idx(MO_TEUQ, cpu_mmu_index(cs, true)); + return cpu_ldq_code_mmu(env, addr, oi, 0); +} =20 /** * tlb_vaddr_to_host: diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index b03998f926..2817c9dbdd 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -2897,34 +2897,6 @@ static void do_st16_mmu(CPUState *cpu, vaddr addr, I= nt128 val, =20 /* Code access functions. */ =20 -uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr) -{ - CPUState *cs =3D env_cpu(env); - MemOpIdx oi =3D make_memop_idx(MO_UB, cpu_mmu_index(cs, true)); - return do_ld1_mmu(cs, addr, oi, 0, MMU_INST_FETCH); -} - -uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr) -{ - CPUState *cs =3D env_cpu(env); - MemOpIdx oi =3D make_memop_idx(MO_TEUW, cpu_mmu_index(cs, true)); - return do_ld2_mmu(cs, addr, oi, 0, MMU_INST_FETCH); -} - -uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr) -{ - CPUState *cs =3D env_cpu(env); - MemOpIdx oi =3D make_memop_idx(MO_TEUL, cpu_mmu_index(cs, true)); - return do_ld4_mmu(cs, addr, oi, 0, MMU_INST_FETCH); -} - -uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr) -{ - CPUState *cs =3D env_cpu(env); - MemOpIdx oi =3D make_memop_idx(MO_TEUQ, cpu_mmu_index(cs, true)); - return do_ld8_mmu(cs, addr, oi, 0, MMU_INST_FETCH); -} - uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t retaddr) { diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 3f63b194bb..5bdbb6f968 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -1214,46 +1214,6 @@ static void do_st16_mmu(CPUState *cpu, vaddr addr, I= nt128 val, clear_helper_retaddr(); } =20 -uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr ptr) -{ - uint32_t ret; - - set_helper_retaddr(1); - ret =3D ldub_p(g2h_untagged(ptr)); - clear_helper_retaddr(); - return ret; -} - -uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr ptr) -{ - uint32_t ret; - - set_helper_retaddr(1); - ret =3D lduw_p(g2h_untagged(ptr)); - clear_helper_retaddr(); - return ret; -} - -uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr ptr) -{ - uint32_t ret; - - set_helper_retaddr(1); - ret =3D ldl_p(g2h_untagged(ptr)); - clear_helper_retaddr(); - return ret; -} - -uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr ptr) -{ - uint64_t ret; - - set_helper_retaddr(1); - ret =3D ldq_p(g2h_untagged(ptr)); - clear_helper_retaddr(); - return ret; -} - uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837533; x=1742442333; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KTz0opqvxfbqwvltJvZBi8g6Tk2gJy+3YsapeLlujac=; b=j2zfo2qQCArmW5qUnQSmYKqoN+A0HDguUp5A4xcXSWi64Z3uXOrCpacGhBYzc+YXa6 Tic1/UGnqYAIwAvAwdwYUvmmDJ7Hp+rP7TU1G8IpGhVWgDtqdE0hS5RiMEKYjM8JrLBm f5urjq5OOi9wEhASlpnU27T53VNFwCXgMyPdBlpiQg3gQgaF2f6EjE0t/nz4zFHNVLVN 0E2pu7sQZ/pNoWfJUE6pm+EXADAhsSFbilgW0qM2v6TPZrPBX1kRopYb8U75h+ULvyiw HE7ILPXebVAvVpV15BKf9r0R708YdUQzc2R3vX8bG7WWKQtrj4moxcgeKczfLvs7bMru 9fTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837533; x=1742442333; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KTz0opqvxfbqwvltJvZBi8g6Tk2gJy+3YsapeLlujac=; b=Fl4OS4P9lPy2Aw08FEH7QjTJQjwCjYCI9RoifteCoyjsr81OZVymoKyQwrmZyVW2sv DEXcM1yLYa8eXNvzQwyVvpwb0PeWnHhAT2m+y6IOuzyYxbOF6tq0EahrNhvnwh/XhDtQ izsEkMbgHv+9XHBzk5tBXPX1z2VuLF69kyKtiSLB9V3RuEXH/+Jr5S/c5BoZdN2vi2EW LPAVIfjdQ6iHVXawuWvxizYmvuIqql/F8aSxuCgw89qhWV064HKgiDiF7slcjJI4rTwq 8ZRJuwW2Xg3heYLSRPsMvlwnMGQZ5aZVsgu4W/t5fDqHkWpIGnXF8e1SY9SKr2nlRZuX 0+IA== X-Gm-Message-State: AOJu0Yz7yWRAQ9AHBYV9cD50r/8r0x0xTxGZTs80utWaw/Ns0TDnxcNi 3z/ElELzBtSFM+NKX6e/45uHryddsLdioJ5M27hUkZFVM2pSRN28agjn2K/Me5bpIHZ7pO1N0DF S X-Gm-Gg: ASbGncszkGHmvSk3UQ0oOKQRt5zeSAvdrjqom4pyXJCdT2osV5BxmYNYHwtypk/zkYZ t1HkW0Y3BYd84o9UN+C0vHZ328ZIk6m2Y8u7ADfrFEmr9pSXuuxFNxk/Gk3G9gUJ9yZpD2sbPQR YGitgNPEYAqlI1lqrPXH8uLp/r9fYSYXe60Dc6xIk2Y8rLN1gtSZ4JAlT2ix6tnBxiF71oqEiJG BcKVk4ZRFF133i46tZTCJcCs4JakKm/5goeuW1dsdtJlHmsAYZq5/FNk/eHYXz4WKPZHWOzWRaq Wev275V4kKBF1cLX4Zrq3fiXJht7B9HBZmpZddhhoSEfhCmx5HwLUxsy9hzOUYZ/AANFIWoW4tO X X-Google-Smtp-Source: AGHT+IG/2nHTL2ulvhNi6w6c2ylL2+m4IfJPtPwj/c3lDR+LGYUFuJVtrPdbt/37xjfKWzbymtcEkA== X-Received: by 2002:a05:6a21:158c:b0:1f5:837b:1868 with SMTP id adf61e73a8af0-1f5837b1902mr21097964637.29.1741837533461; Wed, 12 Mar 2025 20:45:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 09/37] accel/tcg: Perform aligned atomic reads in translator_ld Date: Wed, 12 Mar 2025 20:44:49 -0700 Message-ID: <20250313034524.3069690-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837687803019100 Content-Type: text/plain; charset="utf-8" Perform aligned atomic reads in translator_ld, if possible. According to https://lore.kernel.org/qemu-devel/20240607101403.1109-1-jim.shu@sifive.com/ this is required for RISC-V Ziccif. Signed-off-by: Richard Henderson --- accel/tcg/translator.c | 42 ++++++++++++++++++++++++++++++++++++++---- 1 file changed, 38 insertions(+), 4 deletions(-) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index ef1538b4fc..0260fb1915 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -265,12 +265,14 @@ static bool translator_ld(CPUArchState *env, DisasCon= textBase *db, =20 if (likely(((base ^ last) & TARGET_PAGE_MASK) =3D=3D 0)) { /* Entire read is from the first page. */ - memcpy(dest, host + (pc - base), len); - return true; + goto do_read; } =20 if (unlikely(((base ^ pc) & TARGET_PAGE_MASK) =3D=3D 0)) { - /* Read begins on the first page and extends to the second. */ + /* + * Read begins on the first page and extends to the second. + * The unaligned read is never atomic. + */ size_t len0 =3D -(pc | TARGET_PAGE_MASK); memcpy(dest, host + (pc - base), len0); pc +=3D len0; @@ -329,7 +331,39 @@ static bool translator_ld(CPUArchState *env, DisasCont= extBase *db, host =3D db->host_addr[1]; } =20 - memcpy(dest, host + (pc - base), len); + do_read: + /* + * Assume aligned reads should be atomic, if possible. + * We're not in a position to jump out with EXCP_ATOMIC. + */ + host +=3D pc - base; + switch (len) { + case 2: + if (QEMU_IS_ALIGNED(pc, 2)) { + uint16_t t =3D qatomic_read((uint16_t *)host); + stw_he_p(dest, t); + return true; + } + break; + case 4: + if (QEMU_IS_ALIGNED(pc, 4)) { + uint32_t t =3D qatomic_read((uint32_t *)host); + stl_he_p(dest, t); + return true; + } + break; +#ifdef CONFIG_ATOMIC64 + case 8: + if (QEMU_IS_ALIGNED(pc, 8)) { + uint64_t t =3D qatomic_read__nocheck((uint64_t *)host); + stl_he_p(dest, t); + return true; + } + break; +#endif + } + /* Unaligned or partial read from the second page is not atomic. */ + memcpy(dest, host, len); return true; } =20 --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741838012; cv=none; d=zohomail.com; s=zohoarc; b=hS6s5wKHoljPwXsBfCmRffM1KeYzruLDVgf87o9XeTjo1SQuGaXHmPxhyAZWt39PlF9N7g2iW/eYLbOjvIlemgzDXHX9Cef5sFNvlLc+SD2FNdRSOe0OJVxDOlfCtVo0hfqoyEQMrDkYXPRCSv/gQFcTKwN5uRqeVfkkFOJHPvE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741838012; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=a2yvAttg4yOZzhAQUiX0ynuUEgMnPWdV1Ar+AqZm3qI=; b=A3idjKm2l7HKnEOf+KboHacByDKhHSwhqnFguNLisqtnaytrO+mhsS8jPbQyClnmtUU7+1NcMSdDTw9DhY3N1phSOl8lD/nInc47EhoUREHlgKrEO49NxVmzqbQTS78Z5T8CfU6PxTKAgvu2oiwdMZYuX5LlOJhcWyKJMcMK4Ds= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741838012509588.1935724068173; Wed, 12 Mar 2025 20:53:32 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZW1-0004dS-Vi; Wed, 12 Mar 2025 23:45:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZW0-0004cd-2W for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:45:48 -0400 Received: from mail-pl1-x636.google.com ([2607:f8b0:4864:20::636]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZVt-0007ll-A6 for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:45:47 -0400 Received: by mail-pl1-x636.google.com with SMTP id d9443c01a7336-2232aead377so10696455ad.0 for ; Wed, 12 Mar 2025 20:45:35 -0700 (PDT) Received: from stoup.. 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837534; x=1742442334; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=a2yvAttg4yOZzhAQUiX0ynuUEgMnPWdV1Ar+AqZm3qI=; b=zjXQy8/RLUzlKFtpIBCNRYzbngrxlUraOA6Hwn25x58mXQJ0vV96h9gNFJwB0hAwu1 Z08AuLFSoWZgFJUu3yWdvBJ2RT7JZ1wgDhd1hlngF1LyLWRiMrkSpCa/WUC3pOPEdjQo g23/Fx9SzKqidTouuzngAxhYfWU7CgcemeiyB/HYBBiMrZrPcjxIkyv751O2Hv3qf1CU 3b98cn9UWlA3lPtZ7w6KFALf3LejvrlS3TKOPGHdQ/2u/aI1XYeJy0qhbYm8Cxlyw459 t9l15QuQZyEhIZ46Hl/i7CO/Cak+r0jzYxxoexRXRN8JTWEiGJYycq+425EccW5JmEHl E/gA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837534; x=1742442334; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=a2yvAttg4yOZzhAQUiX0ynuUEgMnPWdV1Ar+AqZm3qI=; b=rvTTVR6Zl57mFoPwjk9ZqXn1GTW06L38+pfJ7GVm1cLg7olAsalHtP+VqyoBXAE5Iv u6FIk6NWhaniiHTvyIEt4gs9lrFISSXWhcFqFw3v+6sRJ3H3C/+dy4QIBLg6KohzT0lT IyyZAsCqo77fjzQruDOB7/vHclsVJQtupQE103R2EJXR5nK9UIV1mTIQDoUvUKEMXByw 5yl945C+WPJ3FZ7QTBTr3Ua2H74lxOD01Rp70lYkpxaBrtxCGRSaj6QAsy1choOnajwq DViIBiTZ3YtXOlQ5AEvX055WDrX23VZLIptwtOO8brRBiD1JPVokM6DahVSJ74cmEb5k oQpw== X-Gm-Message-State: AOJu0YzNN3LxOZRwEDh64OAUDMJ6Erg/w/+HvPeuZey1B/hyBdNa47TE 3oTTpqLyMMlh5+zhL30yQo0LjgrxqUHY++6lloYDWXGHPnr5YRddAV9mEmf/OfDX0NrTY3pzJQS O X-Gm-Gg: ASbGncvM2U1QgoP8zqBmGW6+BJo2SF7zpN0bp7uWSxlxMN3MfoCvFruFD+JlyAb7u4F FxNz2MMqPBegp4+J6ZOXuVvQB6OIaH87eACDAihkokCOysthrGvrDFAHN10JzBnjOSLcj+iBAt1 OOSvfYanyt7STjcOkT/gRjDPB+w0IcjQVtN7pSVT1W0vTg5XaSaxwstyvliHtnhOTkZqudbMpfh sJnN52WEEWDcF1mlMTwcpM5jpKKzyuv9lbdwzE0wt7SgVDRem6ZMsl6xmkb5kjUXijoT2zE/2pT jBR9CpnXA8MgcRunmcb8R5+CVKQbEHRDiKsE5zn3nrBYXYjic6D9rNDStJA4tll55VRagoiuPGw rGisyteLxfgA= X-Google-Smtp-Source: AGHT+IHvTqPujbhCGAu/VgB7GxMLMwSGsPuzcamkXyjPCXgRkEJlJdCouF2tH8B/knpDOESs7/EruA== X-Received: by 2002:a05:6a20:93a1:b0:1f5:6c94:2cc9 with SMTP id adf61e73a8af0-1f56c9432d3mr27222804637.22.1741837534246; Wed, 12 Mar 2025 20:45:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 10/37] accel/tcg: Use cpu_ld*_code_mmu in translator.c Date: Wed, 12 Mar 2025 20:44:50 -0700 Message-ID: <20250313034524.3069690-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741838013521019000 Content-Type: text/plain; charset="utf-8" Cache the mmu index in DisasContextBase. Perform the read on host endianness, which lets us share code with the translator_ld fast path. Signed-off-by: Richard Henderson --- include/exec/translator.h | 1 + accel/tcg/translator.c | 57 ++++++++++++++++++--------------------- 2 files changed, 27 insertions(+), 31 deletions(-) diff --git a/include/exec/translator.h b/include/exec/translator.h index d70942a10f..205dd85bba 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -73,6 +73,7 @@ struct DisasContextBase { int max_insns; bool plugin_enabled; bool fake_insn; + uint8_t code_mmuidx; struct TCGOp *insn_start; void *host_addr[2]; =20 diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 0260fb1915..64fa069b51 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -11,10 +11,9 @@ #include "qemu/log.h" #include "qemu/error-report.h" #include "exec/exec-all.h" +#include "exec/cpu-ldst-common.h" #include "exec/translator.h" -#include "exec/cpu_ldst.h" #include "exec/plugin-gen.h" -#include "exec/cpu_ldst.h" #include "exec/tswap.h" #include "tcg/tcg-op-common.h" #include "internal-target.h" @@ -142,6 +141,7 @@ void translator_loop(CPUState *cpu, TranslationBlock *t= b, int *max_insns, db->host_addr[1] =3D NULL; db->record_start =3D 0; db->record_len =3D 0; + db->code_mmuidx =3D cpu_mmu_index(cpu, true); =20 ops->init_disas_context(db, cpu); tcg_debug_assert(db->is_jmp =3D=3D DISAS_NEXT); /* no early exit */ @@ -457,55 +457,50 @@ bool translator_st(const DisasContextBase *db, void *= dest, =20 uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc) { - uint8_t raw; + uint8_t val; =20 - if (!translator_ld(env, db, &raw, pc, sizeof(raw))) { - raw =3D cpu_ldub_code(env, pc); - record_save(db, pc, &raw, sizeof(raw)); + if (!translator_ld(env, db, &val, pc, sizeof(val))) { + MemOpIdx oi =3D make_memop_idx(MO_UB, db->code_mmuidx); + val =3D cpu_ldb_code_mmu(env, pc, oi, 0); + record_save(db, pc, &val, sizeof(val)); } - return raw; + return val; } =20 uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc) { - uint16_t raw, tgt; + uint16_t val; =20 - if (translator_ld(env, db, &raw, pc, sizeof(raw))) { - tgt =3D tswap16(raw); - } else { - tgt =3D cpu_lduw_code(env, pc); - raw =3D tswap16(tgt); - record_save(db, pc, &raw, sizeof(raw)); + if (!translator_ld(env, db, &val, pc, sizeof(val))) { + MemOpIdx oi =3D make_memop_idx(MO_UW, db->code_mmuidx); + val =3D cpu_ldw_code_mmu(env, pc, oi, 0); + record_save(db, pc, &val, sizeof(val)); } - return tgt; + return tswap16(val); } =20 uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc) { - uint32_t raw, tgt; + uint32_t val; =20 - if (translator_ld(env, db, &raw, pc, sizeof(raw))) { - tgt =3D tswap32(raw); - } else { - tgt =3D cpu_ldl_code(env, pc); - raw =3D tswap32(tgt); - record_save(db, pc, &raw, sizeof(raw)); + if (!translator_ld(env, db, &val, pc, sizeof(val))) { + MemOpIdx oi =3D make_memop_idx(MO_UL, db->code_mmuidx); + val =3D cpu_ldl_code_mmu(env, pc, oi, 0); + record_save(db, pc, &val, sizeof(val)); } - return tgt; + return tswap32(val); } =20 uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc) { - uint64_t raw, tgt; + uint64_t val; =20 - if (translator_ld(env, db, &raw, pc, sizeof(raw))) { - tgt =3D tswap64(raw); - } else { - tgt =3D cpu_ldq_code(env, pc); - raw =3D tswap64(tgt); - record_save(db, pc, &raw, sizeof(raw)); + if (!translator_ld(env, db, &val, pc, sizeof(val))) { + MemOpIdx oi =3D make_memop_idx(MO_UL, db->code_mmuidx); + val =3D cpu_ldq_code_mmu(env, pc, oi, 0); + record_save(db, pc, &val, sizeof(val)); } - return tgt; + return tswap64(val); } =20 void translator_fake_ld(DisasContextBase *db, const void *data, size_t len) --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837979; cv=none; d=zohomail.com; s=zohoarc; b=H6+8omK+nsyPeal9mzjsiNnWORXpXje8jAEQP1/9jlJoqJziX1OdKNI827J9D5y5F94UOD5zyYFLwwYuw8k7P0s5t03qTa3kcD0Bl/lhfEDDjU1RkvLUZPR202Occpsw/gNAqcochFsGvwPns7ZuBOXY9k83Kc/FDMzPawI2/bA= ARC-Message-Signature: i=1; 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837535; x=1742442335; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rHOuaDzblm6IWMn28KfbT02hmJPGWcvE7rOoUCYqoEA=; b=E1vEPyQd0aXmrsnp3W/KZPWWiU9acz8dVSmDw1VbpU/deQnx671GN+X3u3107zzJre 5M66RDRUh0XSnX5s65SFqVdYvVIFZn93Ch8AaEzRpp5Rz/oRw3V0kWD7aTFm0QQpt7YP osl0b/LAUhUJeUOkiH0fXaqKdRNKEyzbxIvdTQ+qqrMUi7ILxPlW4fKkjGeJR5jkr5PW F5q1TvE/3/hkFK2Vo4FnU98InPl+8c0nSPRVPakZNiNZnm3ceJ5AMaZ0dT7V3GxKc2W8 bZhto3OGFPNkjwYoVWrBte0FUKy421eEcxtqIqJ1KH5DwS6oIt4xKPOpzTEKjpoz/phm 2wIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837535; x=1742442335; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rHOuaDzblm6IWMn28KfbT02hmJPGWcvE7rOoUCYqoEA=; b=dRydTKyklrbRuHYA6Tlt4v9TRAjfoKJ89MHvmmuaHhegiXGiOEnxNvU/HJWJTWMQrt Be+BU3YfvMtf7DBVyMgSzk5mRMk/UkBU+ohbi8Eeleh8tg0mcbYPkznpz2Zga+5zfwYk phxvRIt2UpVqA923MP8z2JC/Z3pvVqtVFdE6rWSWgG8bylJEbcXkqSwsXRX/LL0657M4 iDSsBNBDrHjem46M9BZtk0bXXU1G2+cT+igOQkQcaj6Vrfhjbgn625eNagzBkvH1vRA1 5NR/ln11pj6/9C+LE1CuH/79jGguaCCcJpflLGHdp3/yG9LFZ6BUaqLeiwMrmYYtTu3O LnMA== X-Gm-Message-State: AOJu0YyNZ6wXypAxK9+CekMcHYmWYUK0XQOX2WZcojevgddKJcsxHUF9 98uUxPmwJ45yAOCU/Fhf0TEmsewysK5MQm7xWhD1ra5o4EiMUy2NIMpOr5fto7fJ2G6uUOK564J n X-Gm-Gg: ASbGnctj8glBNwA7mPFW6j1mfwHOYAP4ZLrOr2Xixn5DOVdKDLuPOeHsGXdZ3AxnmqX uHABST7zMPp6aqXj3S4b0VeJXG2y9rHiNR4/wootfJPBVSRTSpfHNzBzM3H1Rr44xMDES/pdc3f 3kBLmMaWubGCAgqZllQFyAklbJOB27Jrqoeya1GVouXcxFk+YPkSTSwVstJz6nwZV4ZcPwGa7YU 10CbbKMttdGPTL0bCrYJuCrf1r5rntEXtDc7pulliB+91gOXMS/LgSrfjTfwsH7pm5TG3BxkW+F vYzmhwBGVz2rf7I8U+rOlwbV3IRGat8JvndftP/13y4yuAUn1vcJqmVHuvj2xzhj0ZlWgmoOZ8j v X-Google-Smtp-Source: AGHT+IERKW2jpsurh4jAdKMRxzpi3gWgKKRfrw3DBjWUi4jgDm+zSBzaoNVWur9GZ6YzK9u9rM/+QA== X-Received: by 2002:a17:903:19cf:b0:215:94eb:adb6 with SMTP id d9443c01a7336-22428ab75cdmr430133215ad.40.1741837534940; Wed, 12 Mar 2025 20:45:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 11/37] accel/tcg: Implement translator_ld*_end Date: Wed, 12 Mar 2025 20:44:51 -0700 Message-ID: <20250313034524.3069690-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837983671019100 Content-Type: text/plain; charset="utf-8" Add a new family of translator load functions which take an absolute endianness value in the form of MO_BE/MO_LE. Expand the other translator_ld* functions on top of this. Remove exec/tswap.h from translator.c. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/exec/translator.h | 49 ++++++++++++++++++++++++--------------- accel/tcg/translator.c | 26 +++++++++++++++------ 2 files changed, 49 insertions(+), 26 deletions(-) diff --git a/include/exec/translator.h b/include/exec/translator.h index 205dd85bba..3c32655569 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -18,7 +18,7 @@ * member in your target-specific DisasContext. */ =20 -#include "qemu/bswap.h" +#include "exec/memop.h" #include "exec/vaddr.h" =20 /** @@ -181,42 +181,53 @@ bool translator_io_start(DisasContextBase *db); */ =20 uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc); -uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc= ); -uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc); -uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc); +uint16_t translator_lduw_end(CPUArchState *env, DisasContextBase *db, + vaddr pc, MemOp endian); +uint32_t translator_ldl_end(CPUArchState *env, DisasContextBase *db, + vaddr pc, MemOp endian); +uint64_t translator_ldq_end(CPUArchState *env, DisasContextBase *db, + vaddr pc, MemOp endian); + +#ifdef COMPILING_PER_TARGET +static inline uint16_t +translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc) +{ + return translator_lduw_end(env, db, pc, MO_TE); +} + +static inline uint32_t +translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc) +{ + return translator_ldl_end(env, db, pc, MO_TE); +} + +static inline uint64_t +translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc) +{ + return translator_ldq_end(env, db, pc, MO_TE); +} =20 static inline uint16_t translator_lduw_swap(CPUArchState *env, DisasContextBase *db, vaddr pc, bool do_swap) { - uint16_t ret =3D translator_lduw(env, db, pc); - if (do_swap) { - ret =3D bswap16(ret); - } - return ret; + return translator_lduw_end(env, db, pc, MO_TE ^ (do_swap * MO_BSWAP)); } =20 static inline uint32_t translator_ldl_swap(CPUArchState *env, DisasContextBase *db, vaddr pc, bool do_swap) { - uint32_t ret =3D translator_ldl(env, db, pc); - if (do_swap) { - ret =3D bswap32(ret); - } - return ret; + return translator_ldl_end(env, db, pc, MO_TE ^ (do_swap * MO_BSWAP)); } =20 static inline uint64_t translator_ldq_swap(CPUArchState *env, DisasContextBase *db, vaddr pc, bool do_swap) { - uint64_t ret =3D translator_ldq(env, db, pc); - if (do_swap) { - ret =3D bswap64(ret); - } - return ret; + return translator_ldq_end(env, db, pc, MO_TE ^ (do_swap * MO_BSWAP)); } +#endif /* COMPILING_PER_TARGET */ =20 /** * translator_fake_ld - fake instruction load diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 64fa069b51..405e0b44c4 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -8,13 +8,13 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/bswap.h" #include "qemu/log.h" #include "qemu/error-report.h" #include "exec/exec-all.h" #include "exec/cpu-ldst-common.h" #include "exec/translator.h" #include "exec/plugin-gen.h" -#include "exec/tswap.h" #include "tcg/tcg-op-common.h" #include "internal-target.h" #include "disas/disas.h" @@ -467,7 +467,8 @@ uint8_t translator_ldub(CPUArchState *env, DisasContext= Base *db, vaddr pc) return val; } =20 -uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc) +uint16_t translator_lduw_end(CPUArchState *env, DisasContextBase *db, + vaddr pc, MemOp endian) { uint16_t val; =20 @@ -476,10 +477,14 @@ uint16_t translator_lduw(CPUArchState *env, DisasCont= extBase *db, vaddr pc) val =3D cpu_ldw_code_mmu(env, pc, oi, 0); record_save(db, pc, &val, sizeof(val)); } - return tswap16(val); + if (endian & MO_BSWAP) { + val =3D bswap16(val); + } + return val; } =20 -uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc) +uint32_t translator_ldl_end(CPUArchState *env, DisasContextBase *db, + vaddr pc, MemOp endian) { uint32_t val; =20 @@ -488,10 +493,14 @@ uint32_t translator_ldl(CPUArchState *env, DisasConte= xtBase *db, vaddr pc) val =3D cpu_ldl_code_mmu(env, pc, oi, 0); record_save(db, pc, &val, sizeof(val)); } - return tswap32(val); + if (endian & MO_BSWAP) { + val =3D bswap32(val); + } + return val; } =20 -uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc) +uint64_t translator_ldq_end(CPUArchState *env, DisasContextBase *db, + vaddr pc, MemOp endian) { uint64_t val; =20 @@ -500,7 +509,10 @@ uint64_t translator_ldq(CPUArchState *env, DisasContex= tBase *db, vaddr pc) val =3D cpu_ldq_code_mmu(env, pc, oi, 0); record_save(db, pc, &val, sizeof(val)); } - return tswap64(val); + if (endian & MO_BSWAP) { + val =3D bswap64(val); + } + return val; } =20 void translator_fake_ld(DisasContextBase *db, const void *data, size_t len) --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837684; cv=none; d=zohomail.com; s=zohoarc; b=FUULBch4blT2Kd68aqnPPWkSu62L3GBpoELnFf/GG7f9zdr5HFCptCyZkN/XUF8LUnptR1yOeokq8t/OVfDpD8O7cn162efHm0bm1KkUmduPPAOiceBm+XWdY1APivuvx4MtiMTYozHXWMwn/v4TbyBTyoivzT+Q2N0NY2WEJU4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837536; x=1742442336; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Nxieto2+9TW/aE0FZvdhZYD7j3/lIlQUa7JFk2JIa6U=; b=ECQoBqdCdYwJUoiDZbVf97XDRNxxB+4I++QMjWWpMuh8Bh1Ldxo/zlQuqEH97Qa4YM 8CMaXnlvcrAwMf3LfzFAvXwtEBdkhag3r8VFuC1rlQBuu3dmJPV1D5KVZ7AGOODnKboC Xp2K+w2Xnr6MS1kypU0Te8bjvXMhnvHpkaIyA43SHoYdG2bmmWpVoa5gbST/kRuVlgUJ kfWCJTDxg3vtHdCgDjYIXboRtVBkrjyOdHBEBQd5VQbw8xwLLv/+pvmKxbwA+uxQFxBW iQxrqsKAapQzyMAL1yxZnMQnbAx3pBavLUWQ4DkfefaRWeyyOUqWacBuTD+me4KETmuQ 94Uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837536; x=1742442336; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Nxieto2+9TW/aE0FZvdhZYD7j3/lIlQUa7JFk2JIa6U=; b=xSzXYRjHzId0xeFX0piRmoKElisI9Kcs/w9ziQUd9mialGb5cqQF1ybdSJap6vuVUk UIwXn3tn0pnQC53/VlRtfvj42r3CBS6vCZWtHr+sIDu2b4eRByTW37i1ecofu0en86AF coZw0scQfy1j3RjKxaILPO2r2tKqkULwv4HWH8Me8eNxlOsH5bU+ZCUWmsli3I7YmgFn ixY0wBeP8d99vQxJ4CYVg9FlFEIBCCYVkuIx3pBk9bU6PnZjlUl1+ad4MFCF47XpMiqa JuCV781fAcRU9R6MFGtktbNi/gCvBxAPnhOp5Olw3VEIzRZ4Nf+ZHJRDJuL4PkEgWj4s FSjw== X-Gm-Message-State: AOJu0Yw3TBu3WYtA72ESXFC9YEMlA1eKzqrFMgB1Gh4ERoCGuJ7Vn/rI HYwMvZlJlLNYX9S7TmhuuYuYM7knwjqRGHTAHPpRWagsJ+H3qN5gXJufKBdLSGVG62Vzk1HJfOu 7 X-Gm-Gg: ASbGncv4ImcOZIiMPul5b3FH5bBTQ+cPf1Tq2HyjB0NVkq4yGp1+B7YAwxzoch9QlEh eO6Zv51t5ucWekfvB2r/m+KDjmAlDwGGNt6bitcbCFEBSpNtNmUEAg11fjNDcnvU+maLSoW6SxM gmopp2934TlhVLtMoRtBqYpCpHycWQ71JqAf+0XzaayWGvr2w7X80EoDqKGfbK8zvQN1v074Mew 4MvJMTFfE+q0Kflms9wo2HPIXzfekVGLL3d4nojCFrMMUTIMTgh8deg0sv3Af+MEIGNe94kbnBq 57UWOCviPxWkYVYZd1SMiRb10aZEeMu0t/uoA6yprxIMM2zdfs9F+9VQjc9QcUdLb7kKblN1FcL 3 X-Google-Smtp-Source: AGHT+IHeT+r5WfgUZYg963gqzrI/Qn7lMIuS044dSSzdyitgqs65vl4+Yr/Tk7R24H5fNIZKeymBWw== X-Received: by 2002:a05:6a00:893:b0:725:4a1b:38ec with SMTP id d2e1a72fcca58-737106d1c9dmr1767299b3a.3.1741837535631; Wed, 12 Mar 2025 20:45:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 12/37] accel/tcg: Remove mmap_lock/unlock from watchpoint.c Date: Wed, 12 Mar 2025 20:44:52 -0700 Message-ID: <20250313034524.3069690-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837687780019100 Content-Type: text/plain; charset="utf-8" The mmap_lock is user-only, whereas watchpoint.c is only compiled for system mode. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier --- accel/tcg/watchpoint.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/accel/tcg/watchpoint.c b/accel/tcg/watchpoint.c index 65b21884ce..cfb37a49e7 100644 --- a/accel/tcg/watchpoint.c +++ b/accel/tcg/watchpoint.c @@ -124,17 +124,14 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, = vaddr len, } cpu->watchpoint_hit =3D wp; =20 - mmap_lock(); /* This call also restores vCPU state */ tb_check_watchpoint(cpu, ra); if (wp->flags & BP_STOP_BEFORE_ACCESS) { cpu->exception_index =3D EXCP_DEBUG; - mmap_unlock(); cpu_loop_exit(cpu); } else { /* Force execution of one insn next time. */ cpu->cflags_next_tb =3D 1 | CF_NOIRQ | curr_cflags(cpu); - mmap_unlock(); cpu_loop_exit_noexc(cpu); } } else { --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837681; cv=none; d=zohomail.com; s=zohoarc; b=nYkzQ7Br1LNzmP2o8Xvlh9mLml+mZjGazT1YZwGvqp2erEA6kisxOg78IP6o09mEK+AnS09BL+DQmXRQhSdNtWNlAc3oKR8kSkgxxOsDFeVTC7ISYFgB1H7cfENEeMSo8S596Abfpaf1mZO4EOipb70M3p2m426n63z/LZi3Wmw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837681; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=MaCm8HGnBw9Ar6x9XjuT/bwVlFd4+el4jyUvbo0vDuc=; b=fqls+//aTK1E8UEuGKAbFPm0N4dwFNBYHkgQoM+clYbDthStcZhD1Z8wNqTGRB0QF+q5CwGVe2LE3yOZo8rgelEeaDnT7svaD3yfR2ksreNuIf1oxlP0Oa2lgHnBxTBDq1FOaRAxLYdEmhSjb9Nwhtt73U7LTx+8Q76GdNMav5Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741837681486742.0452274684443; Wed, 12 Mar 2025 20:48:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZW9-0004gT-R6; Wed, 12 Mar 2025 23:45:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZW7-0004fH-Gu for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:45:55 -0400 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZVu-0007mG-6N for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:45:54 -0400 Received: by mail-pl1-x631.google.com with SMTP id d9443c01a7336-223959039f4so9366575ad.3 for ; Wed, 12 Mar 2025 20:45:38 -0700 (PDT) Received: from stoup.. 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837536; x=1742442336; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MaCm8HGnBw9Ar6x9XjuT/bwVlFd4+el4jyUvbo0vDuc=; b=JVvX6D1XfyLK0wXjdmpmBz4H6ZZtHJGxkx0rgo0OTeOARpMWZai8UCLW4JL8VHNNTT Eq46McCcgWiX2ek4eF6/o+urtgUshMO2cgIH1kj8/qoHKMrA+1l30m+v+vzrDSWz1qTB f4JvwTr1mUBFy0OQ59YLXgIqNegQxjcfXJd3oIbrjYkzJp9As8HbEOIgbBElSPScTaZ4 NcJUedw53SOl8uAbGVCF6nSX/ZXpGQ7WYKbAgN594QDsLqcZC3EjnjgawY1D/VN6S1Ng QPPHKKX2/YGUvHQq87Dw8Uteg7NJj3Jc268J74WfXzItkufrQMpVIrF72FW8ZjHQ9tix dQhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837536; x=1742442336; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MaCm8HGnBw9Ar6x9XjuT/bwVlFd4+el4jyUvbo0vDuc=; b=XBJ8i3K3lpSJeFRo9bHtnQ3ed4JdV9Sz9KUMZl/NQ3hWRulACByTghK4drqJXNZcgY 5xNoYxc5rKZTmX9KwByOeOJMxk458OmpjVKLHxRZb8evkDDE5z4lgcJHhi2ZIYsTO8cH s5zhqG0ztXRnkoDoR0zTlFn7F2JOqZG6XiPhOiI/EpvE8k1/bZjcnQUmIbvnnam0O/Ub oxteTJEN6lHN9itTt9wGCTOlP/7QO/UM3HaLrJ0km2rA8q57L2rK3BVFmBQcTKnFB8z3 TDDx+f42WZqIM2pbxs19qH0X1hGpVtl2lw/5DC1yF1VnQm0SLtt5ACpBNN0BoI1suk7N WQ2A== X-Gm-Message-State: AOJu0YwaCHGsm79kTP/PxkQaJRTUyfdtpLgbmAMZ804IRQj3RhNIdGma xz2Qze/mQvAxQaFOpE0etp4UfYXtkW6BTaTMoLIETPvy9Flwezk+bV4vbUwFzapTcKzL9Vto9MQ Z X-Gm-Gg: ASbGnctzr82/kv9GwGpWYvx9gb4W7nGB1ohgTmGuzn1J1GlhfXZBQXnmcKwLeTEeyIa lkABZof18qebq4SSrxlYc6uZv1hC3GCBebGOf2fWFN0Oj8Eqj8oZx5vlrdU+PzEoPRm6M0BUZkS gklZ12cA/EoOhN1mZ8dKPxydoEVsrr4CSBy9kmsyywoVE4A6KJi1V7xFDm/BNUtkEY+m2XL9f1m p91Zu2VKBzOADX5CVexqObDN2ke3iwMljI55j2IcMkCQePcpdOhZ2eLssvIbHAOKvjZJh11alBB gguZYX28P5XD8uvNhWjbzWa7WhuXQAT1XJX+zyRuodlsYg0maMY+TEASaUme/jcMl2MDlr9B4ZI A X-Google-Smtp-Source: AGHT+IGUF9mPUTYfSw6JDARP0MnUc+3AnFu7rQPlxO4Tm9hdRhCzlXAzjb3AbZ1Tbuwi2YDJ9BBarA== X-Received: by 2002:a05:6a00:17a7:b0:736:9f20:a176 with SMTP id d2e1a72fcca58-736aa9f1135mr40093158b3a.8.1741837536428; Wed, 12 Mar 2025 20:45:36 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 13/37] include/exec: Split out mmap-lock.h Date: Wed, 12 Mar 2025 20:44:53 -0700 Message-ID: <20250313034524.3069690-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837682577019000 Content-Type: text/plain; charset="utf-8" Split out mmap_lock, et al from page-protection.h to a new header. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- accel/tcg/internal-target.h | 1 + include/exec/mmap-lock.h | 33 +++++++++++++++++++++++++++++++++ include/exec/page-protection.h | 22 ---------------------- accel/tcg/cpu-exec.c | 1 + accel/tcg/tb-maint.c | 1 + accel/tcg/translate-all.c | 1 + linux-user/arm/cpu_loop.c | 1 + linux-user/elfload.c | 1 + linux-user/flatload.c | 1 + linux-user/mmap.c | 1 + linux-user/syscall.c | 1 + target/arm/helper.c | 1 + 12 files changed, 43 insertions(+), 22 deletions(-) create mode 100644 include/exec/mmap-lock.h diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h index 2cdf11c905..c88f007ffb 100644 --- a/accel/tcg/internal-target.h +++ b/accel/tcg/internal-target.h @@ -13,6 +13,7 @@ #include "exec/translation-block.h" #include "tb-internal.h" #include "tcg-target-mo.h" +#include "exec/mmap-lock.h" =20 /* * Access to the various translations structures need to be serialised diff --git a/include/exec/mmap-lock.h b/include/exec/mmap-lock.h new file mode 100644 index 0000000000..eb02dd409c --- /dev/null +++ b/include/exec/mmap-lock.h @@ -0,0 +1,33 @@ +/* + * QEMU user-only mmap lock, with stubs for system mode + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1+ + */ +#ifndef EXEC_MMAP_LOCK_H +#define EXEC_MMAP_LOCK_H + +#ifdef CONFIG_USER_ONLY + +void TSA_NO_TSA mmap_lock(void); +void TSA_NO_TSA mmap_unlock(void); +bool have_mmap_lock(void); + +static inline void mmap_unlock_guard(void *unused) +{ + mmap_unlock(); +} + +#define WITH_MMAP_LOCK_GUARD() \ + for (int _mmap_lock_iter __attribute__((cleanup(mmap_unlock_guard))) \ + =3D (mmap_lock(), 0); _mmap_lock_iter =3D=3D 0; _mmap_lock_iter = =3D 1) + +#else + +static inline void mmap_lock(void) {} +static inline void mmap_unlock(void) {} +#define WITH_MMAP_LOCK_GUARD() + +#endif /* CONFIG_USER_ONLY */ +#endif /* EXEC_MMAP_LOCK_H */ diff --git a/include/exec/page-protection.h b/include/exec/page-protection.h index 3e0a8a0333..c43231af8b 100644 --- a/include/exec/page-protection.h +++ b/include/exec/page-protection.h @@ -38,26 +38,4 @@ */ #define PAGE_PASSTHROUGH 0x0800 =20 -#ifdef CONFIG_USER_ONLY - -void TSA_NO_TSA mmap_lock(void); -void TSA_NO_TSA mmap_unlock(void); -bool have_mmap_lock(void); - -static inline void mmap_unlock_guard(void *unused) -{ - mmap_unlock(); -} - -#define WITH_MMAP_LOCK_GUARD() \ - for (int _mmap_lock_iter __attribute__((cleanup(mmap_unlock_guard))) \ - =3D (mmap_lock(), 0); _mmap_lock_iter =3D=3D 0; _mmap_lock_iter = =3D 1) -#else - -static inline void mmap_lock(void) {} -static inline void mmap_unlock(void) {} -#define WITH_MMAP_LOCK_GUARD() - -#endif /* !CONFIG_USER_ONLY */ - #endif diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index ef3d967e3a..372b876604 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -27,6 +27,7 @@ #include "disas/disas.h" #include "exec/cpu-common.h" #include "exec/page-protection.h" +#include "exec/mmap-lock.h" #include "exec/translation-block.h" #include "tcg/tcg.h" #include "qemu/atomic.h" diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 3f1bebf6ab..d5899ad047 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -24,6 +24,7 @@ #include "exec/log.h" #include "exec/exec-all.h" #include "exec/page-protection.h" +#include "exec/mmap-lock.h" #include "exec/tb-flush.h" #include "tb-internal.h" #include "system/tcg.h" diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 82bc16bd53..16e5043597 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -45,6 +45,7 @@ =20 #include "exec/cputlb.h" #include "exec/page-protection.h" +#include "exec/mmap-lock.h" #include "tb-internal.h" #include "exec/translator.h" #include "exec/tb-flush.h" diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index 10d8561f9b..cb6e17e50c 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -25,6 +25,7 @@ #include "signal-common.h" #include "semihosting/common-semi.h" #include "exec/page-protection.h" +#include "exec/mmap-lock.h" #include "user/page-protection.h" #include "target/arm/syndrome.h" =20 diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 8799e4ea27..f54054dce3 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -10,6 +10,7 @@ #include "user/tswap-target.h" #include "user/page-protection.h" #include "exec/page-protection.h" +#include "exec/mmap-lock.h" #include "exec/translation-block.h" #include "user/guest-base.h" #include "user-internals.h" diff --git a/linux-user/flatload.c b/linux-user/flatload.c index d5cb1830dd..4beb3ed1b9 100644 --- a/linux-user/flatload.c +++ b/linux-user/flatload.c @@ -35,6 +35,7 @@ =20 #include "qemu.h" #include "exec/page-protection.h" +#include "exec/mmap-lock.h" #include "user-internals.h" #include "loader.h" #include "user-mmap.h" diff --git a/linux-user/mmap.c b/linux-user/mmap.c index d1f36e6f16..f88a80c31e 100644 --- a/linux-user/mmap.c +++ b/linux-user/mmap.c @@ -21,6 +21,7 @@ #include "trace.h" #include "exec/log.h" #include "exec/page-protection.h" +#include "exec/mmap-lock.h" #include "exec/tb-flush.h" #include "exec/translation-block.h" #include "qemu.h" diff --git a/linux-user/syscall.c b/linux-user/syscall.c index b32de763f7..4928f0b080 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -26,6 +26,7 @@ #include "tcg/startup.h" #include "target_mman.h" #include "exec/page-protection.h" +#include "exec/mmap-lock.h" #include "exec/tb-flush.h" #include "exec/translation-block.h" #include diff --git a/target/arm/helper.c b/target/arm/helper.c index f0ead22937..8316beead3 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -14,6 +14,7 @@ #include "cpu-features.h" #include "exec/helper-proto.h" #include "exec/page-protection.h" +#include "exec/mmap-lock.h" #include "qemu/main-loop.h" #include "qemu/timer.h" #include "qemu/bitops.h" --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier --- hw/arm/strongarm.h | 2 +- hw/display/apple-gfx.h | 2 +- hw/display/framebuffer.h | 2 +- hw/display/vga_int.h | 2 +- hw/hyperv/hv-balloon-our_range_memslots.h | 2 +- hw/intc/ioapic_internal.h | 2 +- hw/net/i82596.h | 2 +- hw/net/pcnet.h | 2 +- hw/tpm/tpm_ppi.h | 2 +- hw/usb/hcd-uhci.h | 2 +- hw/vfio/pci.h | 2 +- hw/virtio/vhost-iova-tree.h | 2 +- include/exec/cpu-all.h | 3 +-- include/exec/ioport.h | 2 +- include/hw/acpi/acpi.h | 2 +- include/hw/acpi/ich9_tco.h | 2 +- include/hw/arm/fsl-imx25.h | 2 +- include/hw/arm/fsl-imx31.h | 2 +- include/hw/arm/fsl-imx6.h | 2 +- include/hw/arm/fsl-imx6ul.h | 2 +- include/hw/arm/omap.h | 2 +- include/hw/arm/stm32l4x5_soc.h | 2 +- include/hw/boards.h | 2 +- include/hw/char/parallel.h | 2 +- include/hw/char/riscv_htif.h | 2 +- include/hw/char/serial-mm.h | 2 +- include/hw/char/serial.h | 2 +- include/hw/display/macfb.h | 2 +- include/hw/fsi/aspeed_apb2opb.h | 2 +- include/hw/fsi/cfam.h | 2 +- include/hw/fsi/fsi-master.h | 2 +- include/hw/fsi/fsi.h | 2 +- include/hw/fsi/lbus.h | 2 +- include/hw/gpio/npcm7xx_gpio.h | 2 +- include/hw/i2c/npcm7xx_smbus.h | 2 +- include/hw/i2c/pm_smbus.h | 2 +- include/hw/i386/apic_internal.h | 2 +- include/hw/i386/x86.h | 2 +- include/hw/ide/ahci.h | 2 +- include/hw/ipmi/ipmi.h | 2 +- include/hw/isa/apm.h | 2 +- include/hw/isa/isa.h | 2 +- include/hw/m68k/q800.h | 2 +- include/hw/mem/npcm7xx_mc.h | 2 +- include/hw/mem/pc-dimm.h | 2 +- include/hw/mips/mips.h | 2 +- include/hw/misc/auxbus.h | 2 +- include/hw/misc/ivshmem-flat.h | 2 +- include/hw/misc/mac_via.h | 2 +- include/hw/misc/npcm7xx_mft.h | 2 +- include/hw/misc/npcm_clk.h | 2 +- include/hw/misc/npcm_gcr.h | 2 +- include/hw/misc/pvpanic.h | 2 +- include/hw/net/dp8393x.h | 2 +- include/hw/net/msf2-emac.h | 2 +- include/hw/nvram/mac_nvram.h | 2 +- include/hw/nvram/npcm7xx_otp.h | 2 +- include/hw/pci-host/fsl_imx8m_phy.h | 2 +- include/hw/pci-host/pam.h | 2 +- include/hw/pci-host/remote.h | 2 +- include/hw/pci/pci.h | 2 +- include/hw/pci/pcie_host.h | 2 +- include/hw/pci/shpc.h | 2 +- include/hw/ppc/mac_dbdma.h | 2 +- include/hw/ppc/pnv_lpc.h | 2 +- include/hw/ppc/pnv_occ.h | 2 +- include/hw/ppc/pnv_sbe.h | 2 +- include/hw/ppc/pnv_xscom.h | 2 +- include/hw/ppc/ppc4xx.h | 2 +- include/hw/ppc/vof.h | 2 +- include/hw/ppc/xics.h | 2 +- include/hw/register.h | 2 +- include/hw/remote/proxy-memory-listener.h | 2 +- include/hw/sh4/sh_intc.h | 2 +- include/hw/southbridge/ich9.h | 2 +- include/hw/sysbus.h | 2 +- include/hw/timer/npcm7xx_timer.h | 2 +- include/hw/tricore/tricore.h | 2 +- include/hw/usb.h | 2 +- include/hw/vfio/vfio-common.h | 2 +- include/hw/vfio/vfio-container-base.h | 2 +- include/hw/virtio/vhost-backend.h | 2 +- include/hw/virtio/vhost.h | 2 +- include/hw/virtio/virtio.h | 2 +- include/hw/xen/xen-pvh-common.h | 2 +- include/hw/xtensa/mx_pic.h | 2 +- include/qemu/iova-tree.h | 2 +- include/qemu/reserved-region.h | 2 +- include/system/dma.h | 2 +- include/system/hostmem.h | 2 +- include/system/kvm_int.h | 2 +- include/{exec =3D> system}/memory.h | 8 ++------ include/system/vhost-user-backend.h | 2 +- migration/rdma.h | 2 +- rust/wrapper.h | 2 +- target/loongarch/cpu.h | 2 +- target/mips/cpu.h | 2 +- accel/kvm/kvm-all.c | 2 +- accel/tcg/cputlb.c | 2 +- backends/tpm/tpm_util.c | 2 +- block/blkio.c | 4 ++-- disas/disas-mon.c | 2 +- hw/acpi/erst.c | 2 +- hw/avr/atmega.c | 2 +- hw/block/fdc-sysbus.c | 2 +- hw/core/cpu-system.c | 2 +- hw/core/loader-fit.c | 2 +- hw/core/loader.c | 2 +- hw/display/edid-region.c | 2 +- hw/hyperv/hyperv.c | 2 +- hw/i386/acpi-common.c | 2 +- hw/i386/acpi-microvm.c | 2 +- hw/i386/pc_piix.c | 2 +- hw/intc/mips_gic.c | 2 +- hw/intc/ompic.c | 2 +- hw/net/ne2000.c | 2 +- hw/pci-bridge/pci_bridge_dev.c | 2 +- hw/pci-host/remote.c | 2 +- hw/ppc/pnv_homer.c | 2 +- hw/ppc/sam460ex.c | 2 +- hw/remote/iommu.c | 2 +- hw/remote/machine.c | 2 +- hw/remote/proxy-memory-listener.c | 2 +- hw/remote/vfio-user-obj.c | 2 +- hw/s390x/s390-pci-inst.c | 2 +- hw/timer/sh_timer.c | 2 +- hw/vfio/common.c | 2 +- hw/vfio/container.c | 2 +- hw/vfio/platform.c | 2 +- hw/xtensa/sim.c | 2 +- hw/xtensa/virt.c | 2 +- hw/xtensa/xtensa_memory.c | 2 +- hw/xtensa/xtfpga.c | 2 +- migration/dirtyrate.c | 2 +- migration/rdma.c | 2 +- migration/savevm.c | 2 +- monitor/hmp-cmds-target.c | 2 +- stubs/ram-block.c | 2 +- system/dirtylimit.c | 2 +- system/ioport.c | 2 +- system/memory.c | 2 +- system/memory_mapping.c | 2 +- system/physmem.c | 2 +- system/qtest.c | 2 +- target/xtensa/cpu.c | 2 +- tests/qtest/fuzz/generic_fuzz.c | 2 +- tests/qtest/fuzz/qos_fuzz.c | 2 +- tests/unit/test-resv-mem.c | 2 +- ui/console.c | 2 +- util/vfio-helpers.c | 2 +- MAINTAINERS | 2 +- docs/devel/memory.rst | 2 +- scripts/analyze-inclusions | 2 +- 153 files changed, 155 insertions(+), 160 deletions(-) rename include/{exec =3D> system}/memory.h (99%) diff --git a/hw/arm/strongarm.h b/hw/arm/strongarm.h index 192821f6aa..b11b3a3379 100644 --- a/hw/arm/strongarm.h +++ b/hw/arm/strongarm.h @@ -1,7 +1,7 @@ #ifndef STRONGARM_H #define STRONGARM_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "target/arm/cpu-qom.h" =20 #define SA_CS0 0x00000000 diff --git a/hw/display/apple-gfx.h b/hw/display/apple-gfx.h index 3900cdbabb..a8b1d1efc0 100644 --- a/hw/display/apple-gfx.h +++ b/hw/display/apple-gfx.h @@ -9,7 +9,7 @@ #define QEMU_APPLE_GFX_H =20 #include "qemu/queue.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/qdev-properties.h" #include "ui/surface.h" =20 diff --git a/hw/display/framebuffer.h b/hw/display/framebuffer.h index 38fa0dcec6..29a828ce7a 100644 --- a/hw/display/framebuffer.h +++ b/hw/display/framebuffer.h @@ -1,7 +1,7 @@ #ifndef QEMU_FRAMEBUFFER_H #define QEMU_FRAMEBUFFER_H =20 -#include "exec/memory.h" +#include "system/memory.h" =20 /* Framebuffer device helper routines. */ =20 diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h index f77c1c1145..60ad26e03e 100644 --- a/hw/display/vga_int.h +++ b/hw/display/vga_int.h @@ -27,7 +27,7 @@ =20 #include "ui/console.h" #include "exec/ioport.h" -#include "exec/memory.h" +#include "system/memory.h" =20 #include "hw/display/bochs-vbe.h" #include "hw/acpi/acpi_aml_interface.h" diff --git a/hw/hyperv/hv-balloon-our_range_memslots.h b/hw/hyperv/hv-ballo= on-our_range_memslots.h index df3b686bc7..b1f19d77da 100644 --- a/hw/hyperv/hv-balloon-our_range_memslots.h +++ b/hw/hyperv/hv-balloon-our_range_memslots.h @@ -11,7 +11,7 @@ #define HW_HYPERV_HV_BALLOON_OUR_RANGE_MEMSLOTS_H =20 =20 -#include "exec/memory.h" +#include "system/memory.h" #include "qom/object.h" #include "hv-balloon-page_range_tree.h" =20 diff --git a/hw/intc/ioapic_internal.h b/hw/intc/ioapic_internal.h index 37b8565539..51205767f4 100644 --- a/hw/intc/ioapic_internal.h +++ b/hw/intc/ioapic_internal.h @@ -22,7 +22,7 @@ #ifndef HW_INTC_IOAPIC_INTERNAL_H #define HW_INTC_IOAPIC_INTERNAL_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/intc/ioapic.h" #include "hw/sysbus.h" #include "qemu/notify.h" diff --git a/hw/net/i82596.h b/hw/net/i82596.h index f0bbe810eb..4bdfcaf856 100644 --- a/hw/net/i82596.h +++ b/hw/net/i82596.h @@ -3,7 +3,7 @@ =20 #define I82596_IOPORT_SIZE 0x20 =20 -#include "exec/memory.h" +#include "system/memory.h" #include "exec/address-spaces.h" =20 #define PORT_RESET 0x00 /* reset 82596 */ diff --git a/hw/net/pcnet.h b/hw/net/pcnet.h index eb7f46aab3..a94356ec30 100644 --- a/hw/net/pcnet.h +++ b/hw/net/pcnet.h @@ -7,7 +7,7 @@ #define PCNET_LOOPTEST_CRC 1 #define PCNET_LOOPTEST_NOCRC 2 =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/irq.h" =20 /* BUS CONFIGURATION REGISTERS */ diff --git a/hw/tpm/tpm_ppi.h b/hw/tpm/tpm_ppi.h index bf5d4a300f..88f316ee95 100644 --- a/hw/tpm/tpm_ppi.h +++ b/hw/tpm/tpm_ppi.h @@ -12,7 +12,7 @@ #ifndef TPM_TPM_PPI_H #define TPM_TPM_PPI_H =20 -#include "exec/memory.h" +#include "system/memory.h" =20 typedef struct TPMPPI { MemoryRegion ram; diff --git a/hw/usb/hcd-uhci.h b/hw/usb/hcd-uhci.h index 6d26b94e92..d4664297cf 100644 --- a/hw/usb/hcd-uhci.h +++ b/hw/usb/hcd-uhci.h @@ -28,7 +28,7 @@ #ifndef HW_USB_HCD_UHCI_H #define HW_USB_HCD_UHCI_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/timer.h" #include "hw/pci/pci_device.h" #include "hw/usb.h" diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h index d638c781f6..837d7aaed3 100644 --- a/hw/vfio/pci.h +++ b/hw/vfio/pci.h @@ -12,7 +12,7 @@ #ifndef HW_VFIO_VFIO_PCI_H #define HW_VFIO_VFIO_PCI_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/pci/pci_device.h" #include "hw/vfio/vfio-common.h" #include "qemu/event_notifier.h" diff --git a/hw/virtio/vhost-iova-tree.h b/hw/virtio/vhost-iova-tree.h index 0c4ba5abd5..08f63b61cd 100644 --- a/hw/virtio/vhost-iova-tree.h +++ b/hw/virtio/vhost-iova-tree.h @@ -11,7 +11,7 @@ #define HW_VIRTIO_VHOST_IOVA_TREE_H =20 #include "qemu/iova-tree.h" -#include "exec/memory.h" +#include "system/memory.h" =20 typedef struct VhostIOVATree VhostIOVATree; =20 diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 8cd6c00cf8..d72c28a5d2 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -22,7 +22,6 @@ #include "exec/page-protection.h" #include "exec/cpu-common.h" #include "exec/cpu-interrupt.h" -#include "exec/memory.h" #include "exec/tswap.h" #include "hw/core/cpu.h" =20 @@ -66,7 +65,7 @@ /* MMU memory access macros */ =20 #if !defined(CONFIG_USER_ONLY) - +#include "system/memory.h" #include "exec/hwaddr.h" =20 #define SUFFIX diff --git a/include/exec/ioport.h b/include/exec/ioport.h index 4397f12f93..ecea3575bc 100644 --- a/include/exec/ioport.h +++ b/include/exec/ioport.h @@ -24,7 +24,7 @@ #ifndef IOPORT_H #define IOPORT_H =20 -#include "exec/memory.h" +#include "system/memory.h" =20 #define MAX_IOPORTS (64 * 1024) #define IOPORTS_MASK (MAX_IOPORTS - 1) diff --git a/include/hw/acpi/acpi.h b/include/hw/acpi/acpi.h index e0e51e85b4..96642b233f 100644 --- a/include/hw/acpi/acpi.h +++ b/include/hw/acpi/acpi.h @@ -21,7 +21,7 @@ */ =20 #include "qemu/notify.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/acpi/acpi_dev_interface.h" =20 /* diff --git a/include/hw/acpi/ich9_tco.h b/include/hw/acpi/ich9_tco.h index 2562a7cf39..b3c3f69451 100644 --- a/include/hw/acpi/ich9_tco.h +++ b/include/hw/acpi/ich9_tco.h @@ -10,7 +10,7 @@ #ifndef HW_ACPI_TCO_H #define HW_ACPI_TCO_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "migration/vmstate.h" =20 /* As per ICH9 spec, the internal timer has an error of ~0.6s on every tic= k */ diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h index df2f83980f..b68d4334a0 100644 --- a/include/hw/arm/fsl-imx25.h +++ b/include/hw/arm/fsl-imx25.h @@ -29,7 +29,7 @@ #include "hw/sd/sdhci.h" #include "hw/usb/chipidea.h" #include "hw/watchdog/wdt_imx2.h" -#include "exec/memory.h" +#include "system/memory.h" #include "target/arm/cpu.h" #include "qom/object.h" =20 diff --git a/include/hw/arm/fsl-imx31.h b/include/hw/arm/fsl-imx31.h index 40c593a5cf..41232a2237 100644 --- a/include/hw/arm/fsl-imx31.h +++ b/include/hw/arm/fsl-imx31.h @@ -25,7 +25,7 @@ #include "hw/i2c/imx_i2c.h" #include "hw/gpio/imx_gpio.h" #include "hw/watchdog/wdt_imx2.h" -#include "exec/memory.h" +#include "system/memory.h" #include "target/arm/cpu.h" #include "qom/object.h" =20 diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h index 9da32fc189..124bbd478f 100644 --- a/include/hw/arm/fsl-imx6.h +++ b/include/hw/arm/fsl-imx6.h @@ -34,7 +34,7 @@ #include "hw/usb/imx-usb-phy.h" #include "hw/pci-host/designware.h" #include "hw/or-irq.h" -#include "exec/memory.h" +#include "system/memory.h" #include "cpu.h" #include "qom/object.h" =20 diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h index 8277b0e8b2..4e3209b25b 100644 --- a/include/hw/arm/fsl-imx6ul.h +++ b/include/hw/arm/fsl-imx6ul.h @@ -33,7 +33,7 @@ #include "hw/net/imx_fec.h" #include "hw/usb/chipidea.h" #include "hw/usb/imx-usb-phy.h" -#include "exec/memory.h" +#include "system/memory.h" #include "cpu.h" #include "qom/object.h" #include "qemu/units.h" diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h index 7cb87ea89c..6185507373 100644 --- a/include/hw/arm/omap.h +++ b/include/hw/arm/omap.h @@ -20,7 +20,7 @@ #ifndef HW_ARM_OMAP_H #define HW_ARM_OMAP_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "target/arm/cpu-qom.h" #include "qemu/log.h" #include "qom/object.h" diff --git a/include/hw/arm/stm32l4x5_soc.h b/include/hw/arm/stm32l4x5_soc.h index c243fb0e7f..c2fae6e23f 100644 --- a/include/hw/arm/stm32l4x5_soc.h +++ b/include/hw/arm/stm32l4x5_soc.h @@ -24,7 +24,7 @@ #ifndef HW_ARM_STM32L4x5_SOC_H #define HW_ARM_STM32L4x5_SOC_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/arm/armv7m.h" #include "hw/or-irq.h" #include "hw/misc/stm32l4x5_syscfg.h" diff --git a/include/hw/boards.h b/include/hw/boards.h index f22b2e7fc7..02f43ac5d4 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -3,7 +3,7 @@ #ifndef HW_BOARDS_H #define HW_BOARDS_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "system/hostmem.h" #include "system/blockdev.h" #include "qapi/qapi-types-machine.h" diff --git a/include/hw/char/parallel.h b/include/hw/char/parallel.h index cfb97cc7cc..7b04478226 100644 --- a/include/hw/char/parallel.h +++ b/include/hw/char/parallel.h @@ -1,7 +1,7 @@ #ifndef HW_PARALLEL_H #define HW_PARALLEL_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/isa/isa.h" #include "hw/irq.h" #include "chardev/char-fe.h" diff --git a/include/hw/char/riscv_htif.h b/include/hw/char/riscv_htif.h index df493fdf6b..ee0ca29902 100644 --- a/include/hw/char/riscv_htif.h +++ b/include/hw/char/riscv_htif.h @@ -22,7 +22,7 @@ =20 #include "chardev/char.h" #include "chardev/char-fe.h" -#include "exec/memory.h" +#include "system/memory.h" =20 #define TYPE_HTIF_UART "riscv.htif.uart" =20 diff --git a/include/hw/char/serial-mm.h b/include/hw/char/serial-mm.h index 62a8489d69..77abd098e0 100644 --- a/include/hw/char/serial-mm.h +++ b/include/hw/char/serial-mm.h @@ -27,7 +27,7 @@ #define HW_SERIAL_MM_H =20 #include "hw/char/serial.h" -#include "exec/memory.h" +#include "system/memory.h" #include "chardev/char.h" #include "hw/sysbus.h" #include "qom/object.h" diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h index 942b372df6..4bf90a46f3 100644 --- a/include/hw/char/serial.h +++ b/include/hw/char/serial.h @@ -27,7 +27,7 @@ #define HW_SERIAL_H =20 #include "chardev/char-fe.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/fifo8.h" #include "qom/object.h" =20 diff --git a/include/hw/display/macfb.h b/include/hw/display/macfb.h index 27cebefc9e..0fae1f33a6 100644 --- a/include/hw/display/macfb.h +++ b/include/hw/display/macfb.h @@ -13,7 +13,7 @@ #ifndef MACFB_H #define MACFB_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/irq.h" #include "hw/nubus/nubus.h" #include "hw/sysbus.h" diff --git a/include/hw/fsi/aspeed_apb2opb.h b/include/hw/fsi/aspeed_apb2op= b.h index f6a2387abf..878619eafa 100644 --- a/include/hw/fsi/aspeed_apb2opb.h +++ b/include/hw/fsi/aspeed_apb2opb.h @@ -8,7 +8,7 @@ #ifndef FSI_ASPEED_APB2OPB_H #define FSI_ASPEED_APB2OPB_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/fsi/fsi-master.h" #include "hw/sysbus.h" =20 diff --git a/include/hw/fsi/cfam.h b/include/hw/fsi/cfam.h index 7abc3b287b..cceb4bd6f1 100644 --- a/include/hw/fsi/cfam.h +++ b/include/hw/fsi/cfam.h @@ -7,7 +7,7 @@ #ifndef FSI_CFAM_H #define FSI_CFAM_H =20 -#include "exec/memory.h" +#include "system/memory.h" =20 #include "hw/fsi/fsi.h" #include "hw/fsi/lbus.h" diff --git a/include/hw/fsi/fsi-master.h b/include/hw/fsi/fsi-master.h index 68e5f56db2..b634ecd393 100644 --- a/include/hw/fsi/fsi-master.h +++ b/include/hw/fsi/fsi-master.h @@ -7,7 +7,7 @@ #ifndef FSI_FSI_MASTER_H #define FSI_FSI_MASTER_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/qdev-core.h" #include "hw/fsi/fsi.h" #include "hw/fsi/cfam.h" diff --git a/include/hw/fsi/fsi.h b/include/hw/fsi/fsi.h index e00f6ef078..f34765ed80 100644 --- a/include/hw/fsi/fsi.h +++ b/include/hw/fsi/fsi.h @@ -7,7 +7,7 @@ #ifndef FSI_FSI_H #define FSI_FSI_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/qdev-core.h" #include "hw/fsi/lbus.h" #include "qemu/bitops.h" diff --git a/include/hw/fsi/lbus.h b/include/hw/fsi/lbus.h index 558268c013..12519073cd 100644 --- a/include/hw/fsi/lbus.h +++ b/include/hw/fsi/lbus.h @@ -9,7 +9,7 @@ =20 #include "hw/qdev-core.h" #include "qemu/units.h" -#include "exec/memory.h" +#include "system/memory.h" =20 #define TYPE_FSI_LBUS_DEVICE "fsi.lbus.device" OBJECT_DECLARE_SIMPLE_TYPE(FSILBusDevice, FSI_LBUS_DEVICE) diff --git a/include/hw/gpio/npcm7xx_gpio.h b/include/hw/gpio/npcm7xx_gpio.h index b1d771bd77..7c0bf61a96 100644 --- a/include/hw/gpio/npcm7xx_gpio.h +++ b/include/hw/gpio/npcm7xx_gpio.h @@ -15,7 +15,7 @@ #ifndef NPCM7XX_GPIO_H #define NPCM7XX_GPIO_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/sysbus.h" =20 /* Number of pins managed by each controller. */ diff --git a/include/hw/i2c/npcm7xx_smbus.h b/include/hw/i2c/npcm7xx_smbus.h index dc45963c0e..9c544c561b 100644 --- a/include/hw/i2c/npcm7xx_smbus.h +++ b/include/hw/i2c/npcm7xx_smbus.h @@ -16,7 +16,7 @@ #ifndef NPCM7XX_SMBUS_H #define NPCM7XX_SMBUS_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/i2c/i2c.h" #include "hw/irq.h" #include "hw/sysbus.h" diff --git a/include/hw/i2c/pm_smbus.h b/include/hw/i2c/pm_smbus.h index 0d74207efb..dafe0df4f6 100644 --- a/include/hw/i2c/pm_smbus.h +++ b/include/hw/i2c/pm_smbus.h @@ -1,7 +1,7 @@ #ifndef PM_SMBUS_H #define PM_SMBUS_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/i2c/smbus_master.h" =20 #define PM_SMBUS_MAX_MSG_SIZE 32 diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_interna= l.h index d6e85833da..429278da61 100644 --- a/include/hw/i386/apic_internal.h +++ b/include/hw/i386/apic_internal.h @@ -22,7 +22,7 @@ #define QEMU_APIC_INTERNAL_H =20 #include "cpu.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/timer.h" #include "target/i386/cpu-qom.h" #include "qom/object.h" diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index d43cb3908e..258b1343a1 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -18,7 +18,7 @@ #define HW_I386_X86_H =20 #include "exec/hwaddr.h" -#include "exec/memory.h" +#include "system/memory.h" =20 #include "hw/boards.h" #include "hw/i386/topology.h" diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h index ac0292c634..cd07b87811 100644 --- a/include/hw/ide/ahci.h +++ b/include/hw/ide/ahci.h @@ -24,7 +24,7 @@ #ifndef HW_IDE_AHCI_H #define HW_IDE_AHCI_H =20 -#include "exec/memory.h" +#include "system/memory.h" =20 typedef struct AHCIDevice AHCIDevice; =20 diff --git a/include/hw/ipmi/ipmi.h b/include/hw/ipmi/ipmi.h index 77a7213ed9..2882eb7f3d 100644 --- a/include/hw/ipmi/ipmi.h +++ b/include/hw/ipmi/ipmi.h @@ -25,7 +25,7 @@ #ifndef HW_IPMI_H #define HW_IPMI_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/qdev-core.h" #include "qom/object.h" =20 diff --git a/include/hw/isa/apm.h b/include/hw/isa/apm.h index b6e070c00e..0834539045 100644 --- a/include/hw/isa/apm.h +++ b/include/hw/isa/apm.h @@ -1,7 +1,7 @@ #ifndef APM_H #define APM_H =20 -#include "exec/memory.h" +#include "system/memory.h" =20 #define APM_CNT_IOPORT 0xb2 #define ACPI_PORT_SMI_CMD APM_CNT_IOPORT diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 40d6224a4e..1d852011b3 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -3,7 +3,7 @@ =20 /* ISA bus */ =20 -#include "exec/memory.h" +#include "system/memory.h" #include "exec/ioport.h" #include "hw/qdev-core.h" #include "qom/object.h" diff --git a/include/hw/m68k/q800.h b/include/hw/m68k/q800.h index 34365c9860..9caaed9692 100644 --- a/include/hw/m68k/q800.h +++ b/include/hw/m68k/q800.h @@ -26,7 +26,7 @@ #include "hw/boards.h" #include "qom/object.h" #include "target/m68k/cpu-qom.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/m68k/q800-glue.h" #include "hw/misc/mac_via.h" #include "hw/net/dp8393x.h" diff --git a/include/hw/mem/npcm7xx_mc.h b/include/hw/mem/npcm7xx_mc.h index 7ed38be243..568cc35fdd 100644 --- a/include/hw/mem/npcm7xx_mc.h +++ b/include/hw/mem/npcm7xx_mc.h @@ -16,7 +16,7 @@ #ifndef NPCM7XX_MC_H #define NPCM7XX_MC_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/sysbus.h" =20 /** diff --git a/include/hw/mem/pc-dimm.h b/include/hw/mem/pc-dimm.h index fe0f3ea963..e0dbdd43dc 100644 --- a/include/hw/mem/pc-dimm.h +++ b/include/hw/mem/pc-dimm.h @@ -16,7 +16,7 @@ #ifndef QEMU_PC_DIMM_H #define QEMU_PC_DIMM_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/qdev-core.h" #include "qom/object.h" =20 diff --git a/include/hw/mips/mips.h b/include/hw/mips/mips.h index 101799f7d3..1f3672ba5f 100644 --- a/include/hw/mips/mips.h +++ b/include/hw/mips/mips.h @@ -7,7 +7,7 @@ /* Kernels can be configured with 64KB pages */ #define INITRD_PAGE_SIZE (64 * KiB) =20 -#include "exec/memory.h" +#include "system/memory.h" =20 /* bonito.c */ PCIBus *bonito_init(qemu_irq *pic); diff --git a/include/hw/misc/auxbus.h b/include/hw/misc/auxbus.h index 03cacdee42..ccd18ce209 100644 --- a/include/hw/misc/auxbus.h +++ b/include/hw/misc/auxbus.h @@ -25,7 +25,7 @@ #ifndef HW_MISC_AUXBUS_H #define HW_MISC_AUXBUS_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/qdev-core.h" #include "qom/object.h" =20 diff --git a/include/hw/misc/ivshmem-flat.h b/include/hw/misc/ivshmem-flat.h index 0c2b015781..09bc3abcad 100644 --- a/include/hw/misc/ivshmem-flat.h +++ b/include/hw/misc/ivshmem-flat.h @@ -14,7 +14,7 @@ #include "qemu/queue.h" #include "qemu/event_notifier.h" #include "chardev/char-fe.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qom/object.h" #include "hw/sysbus.h" =20 diff --git a/include/hw/misc/mac_via.h b/include/hw/misc/mac_via.h index 63cdcf7c69..6a15228150 100644 --- a/include/hw/misc/mac_via.h +++ b/include/hw/misc/mac_via.h @@ -9,7 +9,7 @@ #ifndef HW_MISC_MAC_VIA_H #define HW_MISC_MAC_VIA_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/sysbus.h" #include "hw/misc/mos6522.h" #include "hw/input/adb.h" diff --git a/include/hw/misc/npcm7xx_mft.h b/include/hw/misc/npcm7xx_mft.h index d6384382ce..e4b997a6ad 100644 --- a/include/hw/misc/npcm7xx_mft.h +++ b/include/hw/misc/npcm7xx_mft.h @@ -16,7 +16,7 @@ #ifndef NPCM7XX_MFT_H #define NPCM7XX_MFT_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/clock.h" #include "hw/irq.h" #include "hw/sysbus.h" diff --git a/include/hw/misc/npcm_clk.h b/include/hw/misc/npcm_clk.h index 8fa1e14bdd..52e972f460 100644 --- a/include/hw/misc/npcm_clk.h +++ b/include/hw/misc/npcm_clk.h @@ -16,7 +16,7 @@ #ifndef NPCM_CLK_H #define NPCM_CLK_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/clock.h" #include "hw/sysbus.h" =20 diff --git a/include/hw/misc/npcm_gcr.h b/include/hw/misc/npcm_gcr.h index d81bb9afb2..702e7fddb1 100644 --- a/include/hw/misc/npcm_gcr.h +++ b/include/hw/misc/npcm_gcr.h @@ -16,7 +16,7 @@ #ifndef NPCM_GCR_H #define NPCM_GCR_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/sysbus.h" #include "qom/object.h" =20 diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h index 049a94c112..5098693437 100644 --- a/include/hw/misc/pvpanic.h +++ b/include/hw/misc/pvpanic.h @@ -15,7 +15,7 @@ #ifndef HW_MISC_PVPANIC_H #define HW_MISC_PVPANIC_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "qom/object.h" =20 #include "standard-headers/misc/pvpanic.h" diff --git a/include/hw/net/dp8393x.h b/include/hw/net/dp8393x.h index 4a3f7478be..24273dc1f4 100644 --- a/include/hw/net/dp8393x.h +++ b/include/hw/net/dp8393x.h @@ -22,7 +22,7 @@ =20 #include "hw/sysbus.h" #include "net/net.h" -#include "exec/memory.h" +#include "system/memory.h" =20 #define SONIC_REG_COUNT 0x40 =20 diff --git a/include/hw/net/msf2-emac.h b/include/hw/net/msf2-emac.h index 846ba6e6dc..b5d9127e46 100644 --- a/include/hw/net/msf2-emac.h +++ b/include/hw/net/msf2-emac.h @@ -23,7 +23,7 @@ */ =20 #include "hw/sysbus.h" -#include "exec/memory.h" +#include "system/memory.h" #include "net/net.h" #include "net/eth.h" #include "qom/object.h" diff --git a/include/hw/nvram/mac_nvram.h b/include/hw/nvram/mac_nvram.h index 0c4dfaeff6..e9d8398f84 100644 --- a/include/hw/nvram/mac_nvram.h +++ b/include/hw/nvram/mac_nvram.h @@ -26,7 +26,7 @@ #ifndef MAC_NVRAM_H #define MAC_NVRAM_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/sysbus.h" =20 #define MACIO_NVRAM_SIZE 0x2000 diff --git a/include/hw/nvram/npcm7xx_otp.h b/include/hw/nvram/npcm7xx_otp.h index ea4b5d0731..77b05f8b82 100644 --- a/include/hw/nvram/npcm7xx_otp.h +++ b/include/hw/nvram/npcm7xx_otp.h @@ -16,7 +16,7 @@ #ifndef NPCM7XX_OTP_H #define NPCM7XX_OTP_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/sysbus.h" =20 /* Each OTP module holds 8192 bits of one-time programmable storage */ diff --git a/include/hw/pci-host/fsl_imx8m_phy.h b/include/hw/pci-host/fsl_= imx8m_phy.h index 4f4875b37d..5f1b212fd9 100644 --- a/include/hw/pci-host/fsl_imx8m_phy.h +++ b/include/hw/pci-host/fsl_imx8m_phy.h @@ -11,7 +11,7 @@ =20 #include "hw/sysbus.h" #include "qom/object.h" -#include "exec/memory.h" +#include "system/memory.h" =20 #define TYPE_FSL_IMX8M_PCIE_PHY "fsl-imx8m-pcie-phy" OBJECT_DECLARE_SIMPLE_TYPE(FslImx8mPciePhyState, FSL_IMX8M_PCIE_PHY) diff --git a/include/hw/pci-host/pam.h b/include/hw/pci-host/pam.h index 005916f826..44f3908160 100644 --- a/include/hw/pci-host/pam.h +++ b/include/hw/pci-host/pam.h @@ -50,7 +50,7 @@ * 0xf0000 - 0xfffff System BIOS Area Memory Segments */ =20 -#include "exec/memory.h" +#include "system/memory.h" =20 #define SMRAM_C_BASE 0xa0000 #define SMRAM_C_END 0xc0000 diff --git a/include/hw/pci-host/remote.h b/include/hw/pci-host/remote.h index 690a01f0fe..5264c35936 100644 --- a/include/hw/pci-host/remote.h +++ b/include/hw/pci-host/remote.h @@ -11,7 +11,7 @@ #ifndef PCI_HOST_REMOTE_H #define PCI_HOST_REMOTE_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/pci/pcie_host.h" =20 #define TYPE_REMOTE_PCIHOST "remote-pcihost" diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 822fbacdf0..c2fe6caa2c 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -1,7 +1,7 @@ #ifndef QEMU_PCI_H #define QEMU_PCI_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "system/dma.h" #include "system/host_iommu_device.h" =20 diff --git a/include/hw/pci/pcie_host.h b/include/hw/pci/pcie_host.h index 82d92177da..f09de76bfe 100644 --- a/include/hw/pci/pcie_host.h +++ b/include/hw/pci/pcie_host.h @@ -22,7 +22,7 @@ #define PCIE_HOST_H =20 #include "hw/pci/pci_host.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qom/object.h" =20 #define TYPE_PCIE_HOST_BRIDGE "pcie-host-bridge" diff --git a/include/hw/pci/shpc.h b/include/hw/pci/shpc.h index a0789df153..ad1089567a 100644 --- a/include/hw/pci/shpc.h +++ b/include/hw/pci/shpc.h @@ -1,7 +1,7 @@ #ifndef SHPC_H #define SHPC_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/hotplug.h" #include "hw/pci/pci_device.h" #include "migration/vmstate.h" diff --git a/include/hw/ppc/mac_dbdma.h b/include/hw/ppc/mac_dbdma.h index 672c2be471..896ee4a2b1 100644 --- a/include/hw/ppc/mac_dbdma.h +++ b/include/hw/ppc/mac_dbdma.h @@ -23,7 +23,7 @@ #ifndef HW_MAC_DBDMA_H #define HW_MAC_DBDMA_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/iov.h" #include "system/dma.h" #include "hw/sysbus.h" diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h index 174add4c53..266d56214f 100644 --- a/include/hw/ppc/pnv_lpc.h +++ b/include/hw/ppc/pnv_lpc.h @@ -20,7 +20,7 @@ #ifndef PPC_PNV_LPC_H #define PPC_PNV_LPC_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/ppc/pnv.h" #include "hw/qdev-core.h" #include "hw/isa/isa.h" /* For ISA_NUM_IRQS */ diff --git a/include/hw/ppc/pnv_occ.h b/include/hw/ppc/pnv_occ.h index df321244e3..b811a3ee95 100644 --- a/include/hw/ppc/pnv_occ.h +++ b/include/hw/ppc/pnv_occ.h @@ -20,7 +20,7 @@ #ifndef PPC_PNV_OCC_H #define PPC_PNV_OCC_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/qdev-core.h" =20 #define TYPE_PNV_OCC "pnv-occ" diff --git a/include/hw/ppc/pnv_sbe.h b/include/hw/ppc/pnv_sbe.h index b6b378ad14..48a8b86a80 100644 --- a/include/hw/ppc/pnv_sbe.h +++ b/include/hw/ppc/pnv_sbe.h @@ -20,7 +20,7 @@ #ifndef PPC_PNV_SBE_H #define PPC_PNV_SBE_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/qdev-core.h" =20 #define TYPE_PNV_SBE "pnv-sbe" diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 648388a599..9e607d7c45 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -20,7 +20,7 @@ #ifndef PPC_PNV_XSCOM_H #define PPC_PNV_XSCOM_H =20 -#include "exec/memory.h" +#include "system/memory.h" =20 typedef struct PnvXScomInterface PnvXScomInterface; typedef struct PnvChip PnvChip; diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h index 1bd9b8821b..2e94b00673 100644 --- a/include/hw/ppc/ppc4xx.h +++ b/include/hw/ppc/ppc4xx.h @@ -26,7 +26,7 @@ #define PPC4XX_H =20 #include "hw/ppc/ppc.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/sysbus.h" =20 /* diff --git a/include/hw/ppc/vof.h b/include/hw/ppc/vof.h index d3f293da8b..2918aaab12 100644 --- a/include/hw/ppc/vof.h +++ b/include/hw/ppc/vof.h @@ -8,7 +8,7 @@ =20 #include "qom/object.h" #include "exec/address-spaces.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/cpu-defs.h" =20 typedef struct Vof { diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index e94d53405f..097fcdf00f 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -28,7 +28,7 @@ #ifndef XICS_H #define XICS_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/qdev-core.h" #include "qom/object.h" =20 diff --git a/include/hw/register.h b/include/hw/register.h index 6a076cfcdf..a913c52aee 100644 --- a/include/hw/register.h +++ b/include/hw/register.h @@ -12,7 +12,7 @@ #define REGISTER_H =20 #include "hw/qdev-core.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/registerfields.h" #include "qom/object.h" =20 diff --git a/include/hw/remote/proxy-memory-listener.h b/include/hw/remote/= proxy-memory-listener.h index c4f3efb928..ec516d8267 100644 --- a/include/hw/remote/proxy-memory-listener.h +++ b/include/hw/remote/proxy-memory-listener.h @@ -9,7 +9,7 @@ #ifndef PROXY_MEMORY_LISTENER_H #define PROXY_MEMORY_LISTENER_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "io/channel.h" =20 typedef struct ProxyMemoryListener { diff --git a/include/hw/sh4/sh_intc.h b/include/hw/sh4/sh_intc.h index f62d5c5e13..94f183121e 100644 --- a/include/hw/sh4/sh_intc.h +++ b/include/hw/sh4/sh_intc.h @@ -1,7 +1,7 @@ #ifndef SH_INTC_H #define SH_INTC_H =20 -#include "exec/memory.h" +#include "system/memory.h" =20 typedef unsigned char intc_enum; =20 diff --git a/include/hw/southbridge/ich9.h b/include/hw/southbridge/ich9.h index 6c60017024..1e231e89c9 100644 --- a/include/hw/southbridge/ich9.h +++ b/include/hw/southbridge/ich9.h @@ -7,7 +7,7 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_device.h" #include "hw/rtc/mc146818rtc.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/notify.h" #include "qom/object.h" =20 diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h index 81bbda10d3..7dc88aaa27 100644 --- a/include/hw/sysbus.h +++ b/include/hw/sysbus.h @@ -4,7 +4,7 @@ /* Devices attached directly to the main system bus. */ =20 #include "hw/qdev-core.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qom/object.h" =20 #define QDEV_MAX_MMIO 32 diff --git a/include/hw/timer/npcm7xx_timer.h b/include/hw/timer/npcm7xx_ti= mer.h index d45c051b56..e287375dce 100644 --- a/include/hw/timer/npcm7xx_timer.h +++ b/include/hw/timer/npcm7xx_timer.h @@ -16,7 +16,7 @@ #ifndef NPCM7XX_TIMER_H #define NPCM7XX_TIMER_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/sysbus.h" #include "qemu/timer.h" =20 diff --git a/include/hw/tricore/tricore.h b/include/hw/tricore/tricore.h index c19ed3f013..4ffc0fe1d6 100644 --- a/include/hw/tricore/tricore.h +++ b/include/hw/tricore/tricore.h @@ -1,7 +1,7 @@ #ifndef HW_TRICORE_H #define HW_TRICORE_H =20 -#include "exec/memory.h" +#include "system/memory.h" =20 struct tricore_boot_info { uint64_t ram_size; diff --git a/include/hw/usb.h b/include/hw/usb.h index e410693d0c..26a9f3ecde 100644 --- a/include/hw/usb.h +++ b/include/hw/usb.h @@ -25,7 +25,7 @@ * THE SOFTWARE. */ =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/qdev-core.h" #include "qemu/iov.h" #include "qemu/queue.h" diff --git a/include/hw/vfio/vfio-common.h b/include/hw/vfio/vfio-common.h index 04b123a6c9..f5b3f45a43 100644 --- a/include/hw/vfio/vfio-common.h +++ b/include/hw/vfio/vfio-common.h @@ -21,7 +21,7 @@ #ifndef HW_VFIO_VFIO_COMMON_H #define HW_VFIO_VFIO_COMMON_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/queue.h" #include "qemu/notify.h" #include "ui/console.h" diff --git a/include/hw/vfio/vfio-container-base.h b/include/hw/vfio/vfio-c= ontainer-base.h index 4cff9943ab..6aca02fb3d 100644 --- a/include/hw/vfio/vfio-container-base.h +++ b/include/hw/vfio/vfio-container-base.h @@ -13,7 +13,7 @@ #ifndef HW_VFIO_VFIO_CONTAINER_BASE_H #define HW_VFIO_VFIO_CONTAINER_BASE_H =20 -#include "exec/memory.h" +#include "system/memory.h" =20 typedef struct VFIODevice VFIODevice; typedef struct VFIOIOMMUClass VFIOIOMMUClass; diff --git a/include/hw/virtio/vhost-backend.h b/include/hw/virtio/vhost-ba= ckend.h index 70c2e8ffee..d6df209a2f 100644 --- a/include/hw/virtio/vhost-backend.h +++ b/include/hw/virtio/vhost-backend.h @@ -11,7 +11,7 @@ #ifndef VHOST_BACKEND_H #define VHOST_BACKEND_H =20 -#include "exec/memory.h" +#include "system/memory.h" =20 typedef enum VhostBackendType { VHOST_BACKEND_TYPE_NONE =3D 0, diff --git a/include/hw/virtio/vhost.h b/include/hw/virtio/vhost.h index a9469d50bc..bb4b58e115 100644 --- a/include/hw/virtio/vhost.h +++ b/include/hw/virtio/vhost.h @@ -3,7 +3,7 @@ =20 #include "hw/virtio/vhost-backend.h" #include "hw/virtio/virtio.h" -#include "exec/memory.h" +#include "system/memory.h" =20 #define VHOST_F_DEVICE_IOTLB 63 #define VHOST_USER_F_PROTOCOL_FEATURES 30 diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h index 6386910280..7e0c471ea4 100644 --- a/include/hw/virtio/virtio.h +++ b/include/hw/virtio/virtio.h @@ -14,7 +14,7 @@ #ifndef QEMU_VIRTIO_H #define QEMU_VIRTIO_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/qdev-core.h" #include "net/net.h" #include "migration/vmstate.h" diff --git a/include/hw/xen/xen-pvh-common.h b/include/hw/xen/xen-pvh-commo= n.h index 17c5a58a5a..5db83d88ec 100644 --- a/include/hw/xen/xen-pvh-common.h +++ b/include/hw/xen/xen-pvh-common.h @@ -9,7 +9,7 @@ #ifndef XEN_PVH_COMMON_H__ #define XEN_PVH_COMMON_H__ =20 -#include "exec/memory.h" +#include "system/memory.h" #include "qom/object.h" #include "hw/boards.h" #include "hw/pci-host/gpex.h" diff --git a/include/hw/xtensa/mx_pic.h b/include/hw/xtensa/mx_pic.h index 500424c8d3..cd316d86eb 100644 --- a/include/hw/xtensa/mx_pic.h +++ b/include/hw/xtensa/mx_pic.h @@ -28,7 +28,7 @@ #ifndef XTENSA_MX_PIC_H #define XTENSA_MX_PIC_H =20 -#include "exec/memory.h" +#include "system/memory.h" =20 struct XtensaMxPic; typedef struct XtensaMxPic XtensaMxPic; diff --git a/include/qemu/iova-tree.h b/include/qemu/iova-tree.h index 16d354a814..14e82a22d5 100644 --- a/include/qemu/iova-tree.h +++ b/include/qemu/iova-tree.h @@ -23,7 +23,7 @@ * for the thread safety issue. */ =20 -#include "exec/memory.h" +#include "system/memory.h" #include "exec/hwaddr.h" =20 #define IOVA_OK (0) diff --git a/include/qemu/reserved-region.h b/include/qemu/reserved-region.h index 8e6f0a97e2..9026cf08fd 100644 --- a/include/qemu/reserved-region.h +++ b/include/qemu/reserved-region.h @@ -20,7 +20,7 @@ #ifndef QEMU_RESERVED_REGION_H #define QEMU_RESERVED_REGION_H =20 -#include "exec/memory.h" +#include "system/memory.h" =20 /* * Insert a new region into a sorted list of reserved regions. In case diff --git a/include/system/dma.h b/include/system/dma.h index 5a49a30628..0a2f0ad2dd 100644 --- a/include/system/dma.h +++ b/include/system/dma.h @@ -10,7 +10,7 @@ #ifndef DMA_H #define DMA_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "exec/address-spaces.h" #include "block/block.h" #include "block/accounting.h" diff --git a/include/system/hostmem.h b/include/system/hostmem.h index 5c21ca55c0..17dd1cede5 100644 --- a/include/system/hostmem.h +++ b/include/system/hostmem.h @@ -16,7 +16,7 @@ #include "system/numa.h" #include "qapi/qapi-types-machine.h" #include "qom/object.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/bitmap.h" #include "qemu/thread-context.h" =20 diff --git a/include/system/kvm_int.h b/include/system/kvm_int.h index 4de6106869..756a3c0a25 100644 --- a/include/system/kvm_int.h +++ b/include/system/kvm_int.h @@ -9,7 +9,7 @@ #ifndef QEMU_KVM_INT_H #define QEMU_KVM_INT_H =20 -#include "exec/memory.h" +#include "system/memory.h" #include "qapi/qapi-types-common.h" #include "qemu/accel.h" #include "qemu/queue.h" diff --git a/include/exec/memory.h b/include/system/memory.h similarity index 99% rename from include/exec/memory.h rename to include/system/memory.h index d09af58c97..649dbb006f 100644 --- a/include/exec/memory.h +++ b/include/system/memory.h @@ -11,10 +11,8 @@ * */ =20 -#ifndef MEMORY_H -#define MEMORY_H - -#ifndef CONFIG_USER_ONLY +#ifndef SYSTEM_MEMORY_H +#define SYSTEM_MEMORY_H =20 #include "exec/cpu-common.h" #include "exec/hwaddr.h" @@ -3207,5 +3205,3 @@ void ram_block_add_cpr_blocker(RAMBlock *rb, Error **= errp); void ram_block_del_cpr_blocker(RAMBlock *rb); =20 #endif - -#endif diff --git a/include/system/vhost-user-backend.h b/include/system/vhost-use= r-backend.h index 327b0b84f1..5ed953cd53 100644 --- a/include/system/vhost-user-backend.h +++ b/include/system/vhost-user-backend.h @@ -13,7 +13,7 @@ #define QEMU_VHOST_USER_BACKEND_H =20 #include "qom/object.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/option.h" #include "qemu/bitmap.h" #include "hw/virtio/vhost.h" diff --git a/migration/rdma.h b/migration/rdma.h index f55f28bbed..4d3386b84a 100644 --- a/migration/rdma.h +++ b/migration/rdma.h @@ -19,7 +19,7 @@ #ifndef QEMU_MIGRATION_RDMA_H #define QEMU_MIGRATION_RDMA_H =20 -#include "exec/memory.h" +#include "system/memory.h" =20 void rdma_start_outgoing_migration(void *opaque, InetSocketAddress *host_p= ort, Error **errp); diff --git a/rust/wrapper.h b/rust/wrapper.h index d927ad6799..3bc4a6c899 100644 --- a/rust/wrapper.h +++ b/rust/wrapper.h @@ -52,7 +52,7 @@ typedef enum memory_order { #include "qemu-io.h" #include "system/system.h" #include "hw/sysbus.h" -#include "exec/memory.h" +#include "system/memory.h" #include "chardev/char-fe.h" #include "hw/clock.h" #include "hw/qdev-clock.h" diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index eae874c67b..1916716547 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -14,7 +14,7 @@ #include "hw/registerfields.h" #include "qemu/timer.h" #ifndef CONFIG_USER_ONLY -#include "exec/memory.h" +#include "system/memory.h" #endif #include "cpu-csr.h" #include "cpu-qom.h" diff --git a/target/mips/cpu.h b/target/mips/cpu.h index f6877ece8b..9ef72a95d7 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -4,7 +4,7 @@ #include "cpu-qom.h" #include "exec/cpu-defs.h" #ifndef CONFIG_USER_ONLY -#include "exec/memory.h" +#include "system/memory.h" #endif #include "fpu/softfloat-types.h" #include "hw/clock.h" diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index f89568bfa3..0d47bb0d9b 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -33,7 +33,7 @@ #include "system/cpus.h" #include "system/accel-blocker.h" #include "qemu/bswap.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/ram_addr.h" #include "qemu/event_notifier.h" #include "qemu/main-loop.h" diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 2817c9dbdd..6f0ea9067b 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -22,7 +22,7 @@ #include "accel/tcg/cpu-ops.h" #include "exec/exec-all.h" #include "exec/page-protection.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/cpu_ldst.h" #include "exec/cputlb.h" #include "exec/tb-flush.h" diff --git a/backends/tpm/tpm_util.c b/backends/tpm/tpm_util.c index f07a2656ce..f2d1739e33 100644 --- a/backends/tpm/tpm_util.c +++ b/backends/tpm/tpm_util.c @@ -25,7 +25,7 @@ #include "qapi/error.h" #include "qapi/visitor.h" #include "tpm_int.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/qdev-properties.h" #include "system/tpm_backend.h" #include "system/tpm_util.h" diff --git a/block/blkio.c b/block/blkio.c index 5f4fce2b1b..4142673984 100644 --- a/block/blkio.c +++ b/block/blkio.c @@ -11,7 +11,7 @@ #include "qemu/osdep.h" #include #include "block/block_int.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/cpu-common.h" /* for qemu_ram_get_fd() */ #include "qemu/defer-call.h" #include "qapi/error.h" @@ -19,7 +19,7 @@ #include "qobject/qdict.h" #include "qemu/module.h" #include "system/block-backend.h" -#include "exec/memory.h" /* for ram_block_discard_disable() */ +#include "system/memory.h" /* for ram_block_discard_disable() */ =20 #include "block/block-io.h" =20 diff --git a/disas/disas-mon.c b/disas/disas-mon.c index 37bf16ac79..9c693618c2 100644 --- a/disas/disas-mon.c +++ b/disas/disas-mon.c @@ -7,7 +7,7 @@ #include "qemu/osdep.h" #include "disas-internal.h" #include "disas/disas.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/core/cpu.h" #include "monitor/monitor.h" =20 diff --git a/hw/acpi/erst.c b/hw/acpi/erst.c index ec64f92893..5c4c1dc638 100644 --- a/hw/acpi/erst.c +++ b/hw/acpi/erst.c @@ -12,7 +12,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "hw/qdev-core.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qom/object.h" #include "hw/pci/pci_device.h" #include "qom/object_interfaces.h" diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c index f6844bf118..59c0160283 100644 --- a/hw/avr/atmega.c +++ b/hw/avr/atmega.c @@ -12,7 +12,7 @@ #include "qemu/module.h" #include "qemu/units.h" #include "qapi/error.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/address-spaces.h" #include "system/system.h" #include "hw/qdev-properties.h" diff --git a/hw/block/fdc-sysbus.c b/hw/block/fdc-sysbus.c index 381b492aec..4955e478cd 100644 --- a/hw/block/fdc-sysbus.c +++ b/hw/block/fdc-sysbus.c @@ -26,7 +26,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qom/object.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/sysbus.h" #include "hw/block/fdc.h" #include "migration/vmstate.h" diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c index aed5076ec7..5ef8c24b5b 100644 --- a/hw/core/cpu-system.c +++ b/hw/core/cpu-system.c @@ -22,7 +22,7 @@ #include "qapi/error.h" #include "exec/address-spaces.h" #include "exec/cputlb.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/tb-flush.h" #include "exec/tswap.h" #include "hw/qdev-core.h" diff --git a/hw/core/loader-fit.c b/hw/core/loader-fit.c index 6eb66406b0..2dea485ae0 100644 --- a/hw/core/loader-fit.c +++ b/hw/core/loader-fit.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu/units.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/loader.h" #include "hw/loader-fit.h" #include "qemu/cutils.h" diff --git a/hw/core/loader.c b/hw/core/loader.c index 332b879a0b..f96cc2c0a5 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -58,7 +58,7 @@ #include "uboot_image.h" #include "hw/loader.h" #include "hw/nvram/fw_cfg.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/boards.h" #include "qemu/cutils.h" #include "system/runstate.h" diff --git a/hw/display/edid-region.c b/hw/display/edid-region.c index 675429dc18..f1596fba9a 100644 --- a/hw/display/edid-region.c +++ b/hw/display/edid-region.c @@ -1,5 +1,5 @@ #include "qemu/osdep.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/display/edid.h" =20 static uint64_t edid_region_read(void *ptr, hwaddr addr, unsigned size) diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c index 831e04f214..382c62d668 100644 --- a/hw/hyperv/hyperv.c +++ b/hw/hyperv/hyperv.c @@ -12,7 +12,7 @@ #include "qemu/module.h" #include "qapi/error.h" #include "exec/address-spaces.h" -#include "exec/memory.h" +#include "system/memory.h" #include "system/kvm.h" #include "qemu/bitops.h" #include "qemu/error-report.h" diff --git a/hw/i386/acpi-common.c b/hw/i386/acpi-common.c index 0cc2919bb8..7bd08067a7 100644 --- a/hw/i386/acpi-common.c +++ b/hw/i386/acpi-common.c @@ -23,7 +23,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/acpi/acpi.h" #include "hw/acpi/aml-build.h" #include "hw/acpi/utils.h" diff --git a/hw/i386/acpi-microvm.c b/hw/i386/acpi-microvm.c index 279da6b4aa..bc6571778c 100644 --- a/hw/i386/acpi-microvm.c +++ b/hw/i386/acpi-microvm.c @@ -24,7 +24,7 @@ #include "qemu/cutils.h" #include "qapi/error.h" =20 -#include "exec/memory.h" +#include "system/memory.h" #include "hw/acpi/acpi.h" #include "hw/acpi/acpi_aml_interface.h" #include "hw/acpi/aml-build.h" diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 6c91e2d292..e9dbbe086a 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -47,7 +47,7 @@ #include "hw/i386/kvm/clock.h" #include "hw/sysbus.h" #include "hw/i2c/smbus_eeprom.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/acpi/acpi.h" #include "qapi/error.h" #include "qemu/error-report.h" diff --git a/hw/intc/mips_gic.c b/hw/intc/mips_gic.c index 5e3cbeabec..12d3908938 100644 --- a/hw/intc/mips_gic.c +++ b/hw/intc/mips_gic.c @@ -14,7 +14,7 @@ #include "qemu/module.h" #include "qapi/error.h" #include "hw/sysbus.h" -#include "exec/memory.h" +#include "system/memory.h" #include "system/kvm.h" #include "system/reset.h" #include "kvm_mips.h" diff --git a/hw/intc/ompic.c b/hw/intc/ompic.c index 42af4567c6..169baf2ded 100644 --- a/hw/intc/ompic.c +++ b/hw/intc/ompic.c @@ -13,7 +13,7 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "migration/vmstate.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qom/object.h" =20 #define TYPE_OR1K_OMPIC "or1k-ompic" diff --git a/hw/net/ne2000.c b/hw/net/ne2000.c index b482c5f3af..b1923c8c3e 100644 --- a/hw/net/ne2000.c +++ b/hw/net/ne2000.c @@ -25,7 +25,7 @@ #include "qemu/osdep.h" #include "net/eth.h" #include "qemu/module.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/irq.h" #include "migration/vmstate.h" #include "ne2000.h" diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c index 0a91a8ae6c..4931ea24f6 100644 --- a/hw/pci-bridge/pci_bridge_dev.c +++ b/hw/pci-bridge/pci_bridge_dev.c @@ -28,7 +28,7 @@ #include "hw/pci/shpc.h" #include "hw/pci/slotid_cap.h" #include "hw/qdev-properties.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/pci/pci_bus.h" #include "hw/hotplug.h" #include "qom/object.h" diff --git a/hw/pci-host/remote.c b/hw/pci-host/remote.c index bfb25ef6af..be077d075e 100644 --- a/hw/pci-host/remote.c +++ b/hw/pci-host/remote.c @@ -28,7 +28,7 @@ #include "hw/pci/pcie_host.h" #include "hw/qdev-properties.h" #include "hw/pci-host/remote.h" -#include "exec/memory.h" +#include "system/memory.h" =20 static const char *remote_pcihost_root_bus_path(PCIHostState *host_bridge, PCIBus *rootbus) diff --git a/hw/ppc/pnv_homer.c b/hw/ppc/pnv_homer.c index a1d83c8149..574ee80119 100644 --- a/hw/ppc/pnv_homer.c +++ b/hw/ppc/pnv_homer.c @@ -20,7 +20,7 @@ #include "qemu/log.h" #include "qapi/error.h" #include "exec/hwaddr.h" -#include "exec/memory.h" +#include "system/memory.h" #include "system/cpus.h" #include "hw/qdev-core.h" #include "hw/qdev-properties.h" diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index 3ecae6a950..567d9e78ac 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -24,7 +24,7 @@ #include "exec/page-protection.h" #include "hw/loader.h" #include "elf.h" -#include "exec/memory.h" +#include "system/memory.h" #include "ppc440.h" #include "hw/pci-host/ppc4xx.h" #include "hw/block/flash.h" diff --git a/hw/remote/iommu.c b/hw/remote/iommu.c index 7c56aad0fc..ec845d1f58 100644 --- a/hw/remote/iommu.c +++ b/hw/remote/iommu.c @@ -13,7 +13,7 @@ #include "hw/remote/iommu.h" #include "hw/pci/pci_bus.h" #include "hw/pci/pci.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/address-spaces.h" #include "trace.h" =20 diff --git a/hw/remote/machine.c b/hw/remote/machine.c index fdc6c441bb..d4616025e8 100644 --- a/hw/remote/machine.c +++ b/hw/remote/machine.c @@ -16,7 +16,7 @@ #include "qemu/osdep.h" =20 #include "hw/remote/machine.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qapi/error.h" #include "hw/pci/pci_host.h" #include "hw/remote/iohub.h" diff --git a/hw/remote/proxy-memory-listener.c b/hw/remote/proxy-memory-lis= tener.c index a926f61ebe..ce7f5b9bfb 100644 --- a/hw/remote/proxy-memory-listener.c +++ b/hw/remote/proxy-memory-listener.c @@ -10,7 +10,7 @@ =20 #include "qemu/int128.h" #include "qemu/range.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/cpu-common.h" #include "exec/ram_addr.h" #include "qapi/error.h" diff --git a/hw/remote/vfio-user-obj.c b/hw/remote/vfio-user-obj.c index 6e51a92856..9bdd0a465b 100644 --- a/hw/remote/vfio-user-obj.c +++ b/hw/remote/vfio-user-obj.c @@ -57,7 +57,7 @@ #include "hw/qdev-core.h" #include "hw/pci/pci.h" #include "qemu/timer.h" -#include "exec/memory.h" +#include "system/memory.h" #include "hw/pci/msi.h" #include "hw/pci/msix.h" #include "hw/remote/vfio-user-obj.h" diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c index 8cdeb6cb7f..b4e003c19c 100644 --- a/hw/s390x/s390-pci-inst.c +++ b/hw/s390x/s390-pci-inst.c @@ -13,7 +13,7 @@ =20 #include "qemu/osdep.h" #include "exec/memop.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/error-report.h" #include "system/hw_accel.h" #include "hw/boards.h" diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c index 7788939766..d4fa32c9d6 100644 --- a/hw/timer/sh_timer.c +++ b/hw/timer/sh_timer.c @@ -9,7 +9,7 @@ */ =20 #include "qemu/osdep.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/log.h" #include "hw/irq.h" #include "hw/sh4/sh.h" diff --git a/hw/vfio/common.c b/hw/vfio/common.c index 7a4010ef4e..cdcec21c08 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -28,7 +28,7 @@ #include "hw/vfio/vfio-common.h" #include "hw/vfio/pci.h" #include "exec/address-spaces.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/ram_addr.h" #include "hw/hw.h" #include "qemu/error-report.h" diff --git a/hw/vfio/container.c b/hw/vfio/container.c index 7c57bdd27b..1d1c5f9a77 100644 --- a/hw/vfio/container.c +++ b/hw/vfio/container.c @@ -24,7 +24,7 @@ =20 #include "hw/vfio/vfio-common.h" #include "exec/address-spaces.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/ram_addr.h" #include "qemu/error-report.h" #include "qemu/range.h" diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c index 67bc57409c..96c6bf5654 100644 --- a/hw/vfio/platform.c +++ b/hw/vfio/platform.c @@ -28,7 +28,7 @@ #include "qemu/main-loop.h" #include "qemu/module.h" #include "qemu/range.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/address-spaces.h" #include "qemu/queue.h" #include "hw/sysbus.h" diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c index 1cea29c66d..49d17e7bb2 100644 --- a/hw/xtensa/sim.c +++ b/hw/xtensa/sim.c @@ -32,7 +32,7 @@ #include "hw/boards.h" #include "hw/loader.h" #include "elf.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/error-report.h" #include "xtensa_memory.h" #include "xtensa_sim.h" diff --git a/hw/xtensa/virt.c b/hw/xtensa/virt.c index b08404fc17..b10866ccd8 100644 --- a/hw/xtensa/virt.c +++ b/hw/xtensa/virt.c @@ -33,7 +33,7 @@ #include "hw/pci-host/gpex.h" #include "net/net.h" #include "elf.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/error-report.h" #include "xtensa_memory.h" #include "xtensa_sim.h" diff --git a/hw/xtensa/xtensa_memory.c b/hw/xtensa/xtensa_memory.c index 2c1095f017..13a6077d86 100644 --- a/hw/xtensa/xtensa_memory.c +++ b/hw/xtensa/xtensa_memory.c @@ -27,7 +27,7 @@ =20 #include "qemu/osdep.h" #include "qapi/error.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/error-report.h" #include "xtensa_memory.h" =20 diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 3f3677f1c9..3bd0ef8268 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -34,7 +34,7 @@ #include "hw/loader.h" #include "hw/qdev-properties.h" #include "elf.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/tswap.h" #include "hw/char/serial-mm.h" #include "net/net.h" diff --git a/migration/dirtyrate.c b/migration/dirtyrate.c index 4cd14779d6..09caf92f87 100644 --- a/migration/dirtyrate.c +++ b/migration/dirtyrate.c @@ -27,7 +27,7 @@ #include "qobject/qdict.h" #include "system/kvm.h" #include "system/runstate.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/xxhash.h" #include "migration.h" =20 diff --git a/migration/rdma.c b/migration/rdma.c index 76fb034923..d9603ab603 100644 --- a/migration/rdma.c +++ b/migration/rdma.c @@ -30,7 +30,7 @@ #include "qemu/sockets.h" #include "qemu/bitmap.h" #include "qemu/coroutine.h" -#include "exec/memory.h" +#include "system/memory.h" #include #include #include diff --git a/migration/savevm.c b/migration/savevm.c index ce158c3512..c33200a33f 100644 --- a/migration/savevm.c +++ b/migration/savevm.c @@ -48,7 +48,7 @@ #include "qapi/qapi-builtin-visit.h" #include "qemu/error-report.h" #include "system/cpus.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/target_page.h" #include "trace.h" #include "qemu/iov.h" diff --git a/monitor/hmp-cmds-target.c b/monitor/hmp-cmds-target.c index 239c2a61a4..6654d31406 100644 --- a/monitor/hmp-cmds-target.c +++ b/monitor/hmp-cmds-target.c @@ -25,7 +25,7 @@ #include "qemu/osdep.h" #include "disas/disas.h" #include "exec/address-spaces.h" -#include "exec/memory.h" +#include "system/memory.h" #include "monitor/hmp-target.h" #include "monitor/monitor-internal.h" #include "qapi/error.h" diff --git a/stubs/ram-block.c b/stubs/ram-block.c index 108197683b..e88fab31a5 100644 --- a/stubs/ram-block.c +++ b/stubs/ram-block.c @@ -1,7 +1,7 @@ #include "qemu/osdep.h" #include "exec/ramlist.h" #include "exec/cpu-common.h" -#include "exec/memory.h" +#include "system/memory.h" =20 void *qemu_ram_get_host_addr(RAMBlock *rb) { diff --git a/system/dirtylimit.c b/system/dirtylimit.c index 7dedef8dd4..30cd09f3d1 100644 --- a/system/dirtylimit.c +++ b/system/dirtylimit.c @@ -19,7 +19,7 @@ #include "system/dirtylimit.h" #include "monitor/hmp.h" #include "monitor/monitor.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/target_page.h" #include "hw/boards.h" #include "system/kvm.h" diff --git a/system/ioport.c b/system/ioport.c index 55c2a75239..5f8718486c 100644 --- a/system/ioport.c +++ b/system/ioport.c @@ -28,7 +28,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/ioport.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/address-spaces.h" #include "trace.h" =20 diff --git a/system/memory.c b/system/memory.c index 4c829793a0..6d6b33b366 100644 --- a/system/memory.c +++ b/system/memory.c @@ -16,7 +16,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qapi/error.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qapi/visitor.h" #include "qemu/bitops.h" #include "qemu/error-report.h" diff --git a/system/memory_mapping.c b/system/memory_mapping.c index 37d3325f77..8538a8241e 100644 --- a/system/memory_mapping.c +++ b/system/memory_mapping.c @@ -16,7 +16,7 @@ #include "qapi/error.h" =20 #include "system/memory_mapping.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/address-spaces.h" #include "hw/core/cpu.h" =20 diff --git a/system/physmem.c b/system/physmem.c index e97de3ef65..be92969a4a 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -50,7 +50,7 @@ #include "qemu/log.h" #include "qemu/memalign.h" #include "qemu/memfd.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/ioport.h" #include "system/dma.h" #include "system/hostmem.h" diff --git a/system/qtest.c b/system/qtest.c index 12152efbcd..5407289154 100644 --- a/system/qtest.c +++ b/system/qtest.c @@ -17,7 +17,7 @@ #include "system/runstate.h" #include "chardev/char-fe.h" #include "exec/ioport.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/tswap.h" #include "hw/qdev-core.h" #include "hw/irq.h" diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 7663b62d01..ec6a0a8b66 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -36,7 +36,7 @@ #include "migration/vmstate.h" #include "hw/qdev-clock.h" #ifndef CONFIG_USER_ONLY -#include "exec/memory.h" +#include "system/memory.h" #endif =20 =20 diff --git a/tests/qtest/fuzz/generic_fuzz.c b/tests/qtest/fuzz/generic_fuz= z.c index d107a496da..239be9372d 100644 --- a/tests/qtest/fuzz/generic_fuzz.c +++ b/tests/qtest/fuzz/generic_fuzz.c @@ -20,7 +20,7 @@ #include "tests/qtest/libqos/pci-pc.h" #include "fuzz.h" #include "string.h" -#include "exec/memory.h" +#include "system/memory.h" #include "exec/ramblock.h" #include "hw/qdev-core.h" #include "hw/pci/pci.h" diff --git a/tests/qtest/fuzz/qos_fuzz.c b/tests/qtest/fuzz/qos_fuzz.c index d3839bf999..9afe8bf6d8 100644 --- a/tests/qtest/fuzz/qos_fuzz.c +++ b/tests/qtest/fuzz/qos_fuzz.c @@ -19,7 +19,7 @@ #include "qemu/osdep.h" #include "qemu/units.h" #include "qapi/error.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/main-loop.h" =20 #include "tests/qtest/libqtest.h" diff --git a/tests/unit/test-resv-mem.c b/tests/unit/test-resv-mem.c index cd8f7318cc..4de2d042d1 100644 --- a/tests/unit/test-resv-mem.c +++ b/tests/unit/test-resv-mem.c @@ -10,7 +10,7 @@ =20 #include "qemu/osdep.h" #include "qemu/range.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qemu/reserved-region.h" =20 #define DEBUG 0 diff --git a/ui/console.c b/ui/console.c index 6456e8dd90..6cd122cf40 100644 --- a/ui/console.c +++ b/ui/console.c @@ -35,7 +35,7 @@ #include "qemu/option.h" #include "chardev/char.h" #include "trace.h" -#include "exec/memory.h" +#include "system/memory.h" #include "qom/object.h" #include "qemu/memfd.h" =20 diff --git a/util/vfio-helpers.c b/util/vfio-helpers.c index f8bab46c68..fdff042ab4 100644 --- a/util/vfio-helpers.c +++ b/util/vfio-helpers.c @@ -16,7 +16,7 @@ #include "qapi/error.h" #include "exec/ramlist.h" #include "exec/cpu-common.h" -#include "exec/memory.h" +#include "system/memory.h" #include "trace.h" #include "qemu/error-report.h" #include "standard-headers/linux/pci_regs.h" diff --git a/MAINTAINERS b/MAINTAINERS index 0e5db7a574..b5f1e81771 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3109,7 +3109,7 @@ R: Philippe Mathieu-Daud=C3=A9 S: Supported F: include/exec/ioport.h F: include/exec/memop.h -F: include/exec/memory.h +F: include/system/memory.h F: include/exec/ram_addr.h F: include/exec/ramblock.h F: include/system/memory_mapping.h diff --git a/docs/devel/memory.rst b/docs/devel/memory.rst index 69c5e3f914..57fb2aec76 100644 --- a/docs/devel/memory.rst +++ b/docs/devel/memory.rst @@ -369,4 +369,4 @@ callbacks are called: API Reference ------------- =20 -.. kernel-doc:: include/exec/memory.h +.. kernel-doc:: include/system/memory.h diff --git a/scripts/analyze-inclusions b/scripts/analyze-inclusions index b6280f25c8..d2c566667d 100644 --- a/scripts/analyze-inclusions +++ b/scripts/analyze-inclusions @@ -53,7 +53,7 @@ echo $(grep_include -F 'trace/generated-tracers.h') files= include generated-trac echo $(grep_include -F 'qapi/error.h') files include qapi/error.h echo $(grep_include -F 'qom/object.h') files include qom/object.h echo $(grep_include -F 'block/aio.h') files include block/aio.h -echo $(grep_include -F 'exec/memory.h') files include exec/memory.h +echo $(grep_include -F 'system/memory.h') files include system/memory.h echo $(grep_include -F 'fpu/softfloat.h') files include fpu/softfloat.h echo $(grep_include -F 'qemu/bswap.h') files include qemu/bswap.h echo --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: 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Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier --- hw/net/i82596.h | 2 +- hw/s390x/ipl.h | 2 +- include/hw/misc/lasi.h | 2 +- include/hw/nubus/nubus.h | 2 +- include/hw/ppc/vof.h | 2 +- include/hw/tricore/triboard.h | 2 +- include/{exec =3D> system}/address-spaces.h | 8 ++------ include/system/dma.h | 2 +- rust/wrapper.h | 2 +- target/i386/hvf/vmx.h | 2 +- accel/hvf/hvf-accel-ops.c | 2 +- hw/acpi/erst.c | 2 +- hw/arm/aspeed_ast10x0.c | 2 +- hw/arm/bananapi_m2u.c | 2 +- hw/arm/collie.c | 2 +- hw/arm/exynos4_boards.c | 2 +- hw/arm/fsl-imx31.c | 2 +- hw/arm/fsl-imx8mp.c | 2 +- hw/arm/imx8mp-evk.c | 2 +- hw/arm/integratorcp.c | 2 +- hw/arm/kzm.c | 2 +- hw/arm/microbit.c | 2 +- hw/arm/mps2-tz.c | 2 +- hw/arm/mps2.c | 2 +- hw/arm/mps3r.c | 2 +- hw/arm/msf2-soc.c | 2 +- hw/arm/msf2-som.c | 2 +- hw/arm/musca.c | 2 +- hw/arm/omap1.c | 2 +- hw/arm/omap_sx1.c | 2 +- hw/arm/orangepi.c | 2 +- hw/arm/stellaris.c | 2 +- hw/arm/stm32f100_soc.c | 2 +- hw/arm/stm32f205_soc.c | 2 +- hw/arm/stm32f405_soc.c | 2 +- hw/arm/stm32l4x5_soc.c | 2 +- hw/avr/atmega.c | 2 +- hw/char/goldfish_tty.c | 2 +- hw/char/omap_uart.c | 2 +- hw/char/riscv_htif.c | 2 +- hw/core/cpu-system.c | 2 +- hw/core/null-machine.c | 2 +- hw/core/sysbus.c | 2 +- hw/dma/rc4030.c | 2 +- hw/hyperv/hv-balloon.c | 2 +- hw/hyperv/hyperv.c | 2 +- hw/i386/kvm/xen_evtchn.c | 2 +- hw/i386/kvm/xen_gnttab.c | 2 +- hw/i386/kvm/xen_overlay.c | 2 +- hw/i386/sgx-epc.c | 2 +- hw/i386/sgx.c | 2 +- hw/i386/vapic.c | 2 +- hw/ide/ahci-sysbus.c | 2 +- hw/input/lasips2.c | 2 +- hw/intc/loongarch_extioi.c | 2 +- hw/intc/riscv_aplic.c | 2 +- hw/intc/riscv_imsic.c | 2 +- hw/loongarch/virt.c | 2 +- hw/mem/memory-device.c | 2 +- hw/microblaze/petalogix_ml605_mmu.c | 2 +- hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +- hw/microblaze/xlnx-zynqmp-pmu.c | 2 +- hw/mips/mipssim.c | 2 +- hw/misc/allwinner-h3-dramc.c | 2 +- hw/misc/allwinner-r40-dramc.c | 2 +- hw/misc/ivshmem-flat.c | 2 +- hw/misc/mac_via.c | 2 +- hw/net/i82596.c | 2 +- hw/nvram/fw_cfg.c | 2 +- hw/openrisc/openrisc_sim.c | 2 +- hw/openrisc/virt.c | 2 +- hw/pci-host/mv64361.c | 2 +- hw/ppc/pegasos2.c | 2 +- hw/ppc/pnv_psi.c | 2 +- hw/ppc/ppc405_uc.c | 2 +- hw/ppc/ppc4xx_sdram.c | 2 +- hw/ppc/prep_systemio.c | 2 +- hw/ppc/rs6000_mc.c | 2 +- hw/ppc/spapr_ovec.c | 2 +- hw/ppc/vof.c | 2 +- hw/remote/iommu.c | 2 +- hw/riscv/microblaze-v-generic.c | 2 +- hw/riscv/opentitan.c | 2 +- hw/riscv/shakti_c.c | 2 +- hw/s390x/css.c | 2 +- hw/s390x/s390-skeys.c | 2 +- hw/s390x/virtio-ccw.c | 2 +- hw/sparc/sun4m_iommu.c | 2 +- hw/sparc64/sun4u_iommu.c | 2 +- hw/timer/hpet.c | 2 +- hw/tpm/tpm_crb.c | 2 +- hw/vfio/ap.c | 2 +- hw/vfio/ccw.c | 2 +- hw/vfio/common.c | 2 +- hw/vfio/container.c | 2 +- hw/vfio/platform.c | 2 +- hw/vfio/spapr.c | 2 +- hw/virtio/vhost-vdpa.c | 2 +- hw/virtio/virtio-balloon.c | 2 +- hw/virtio/virtio-bus.c | 2 +- monitor/hmp-cmds-target.c | 2 +- monitor/hmp-cmds.c | 2 +- system/ioport.c | 2 +- system/memory.c | 2 +- system/memory_mapping.c | 2 +- target/arm/hvf/hvf.c | 2 +- target/arm/kvm.c | 2 +- target/avr/helper.c | 2 +- target/i386/cpu-apic.c | 2 +- target/i386/cpu.c | 2 +- target/i386/kvm/xen-emu.c | 2 +- target/i386/nvmm/nvmm-all.c | 2 +- target/i386/sev.c | 2 +- target/i386/tcg/system/misc_helper.c | 2 +- target/i386/tcg/system/tcg-cpu.c | 2 +- target/i386/whpx/whpx-all.c | 2 +- target/loongarch/kvm/kvm.c | 2 +- target/riscv/kvm/kvm-cpu.c | 2 +- target/s390x/mmu_helper.c | 2 +- target/s390x/sigp.c | 2 +- target/s390x/tcg/excp_helper.c | 2 +- target/xtensa/dbg_helper.c | 2 +- hw/display/apple-gfx.m | 2 +- 123 files changed, 124 insertions(+), 128 deletions(-) rename include/{exec =3D> system}/address-spaces.h (89%) diff --git a/hw/net/i82596.h b/hw/net/i82596.h index 4bdfcaf856..dc1fa1a1dc 100644 --- a/hw/net/i82596.h +++ b/hw/net/i82596.h @@ -4,7 +4,7 @@ #define I82596_IOPORT_SIZE 0x20 =20 #include "system/memory.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" =20 #define PORT_RESET 0x00 /* reset 82596 */ #define PORT_SELFTEST 0x01 /* selftest */ diff --git a/hw/s390x/ipl.h b/hw/s390x/ipl.h index 8e3882d506..c6ecb3433c 100644 --- a/hw/s390x/ipl.h +++ b/hw/s390x/ipl.h @@ -14,7 +14,7 @@ #define HW_S390_IPL_H =20 #include "cpu.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/qdev-core.h" #include "hw/s390x/ipl/qipl.h" #include "qom/object.h" diff --git a/include/hw/misc/lasi.h b/include/hw/misc/lasi.h index f01c0f680a..0bdfb11b50 100644 --- a/include/hw/misc/lasi.h +++ b/include/hw/misc/lasi.h @@ -12,7 +12,7 @@ #ifndef LASI_H #define LASI_H =20 -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/pci/pci_host.h" #include "hw/boards.h" =20 diff --git a/include/hw/nubus/nubus.h b/include/hw/nubus/nubus.h index fee79b71d1..7825840dca 100644 --- a/include/hw/nubus/nubus.h +++ b/include/hw/nubus/nubus.h @@ -11,7 +11,7 @@ =20 #include "hw/qdev-properties.h" #include "hw/sysbus.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qom/object.h" #include "qemu/units.h" =20 diff --git a/include/hw/ppc/vof.h b/include/hw/ppc/vof.h index 2918aaab12..3a0fbffe54 100644 --- a/include/hw/ppc/vof.h +++ b/include/hw/ppc/vof.h @@ -7,7 +7,7 @@ #define HW_VOF_H =20 #include "qom/object.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/memory.h" #include "exec/cpu-defs.h" =20 diff --git a/include/hw/tricore/triboard.h b/include/hw/tricore/triboard.h index 8250470643..ca49a0c752 100644 --- a/include/hw/tricore/triboard.h +++ b/include/hw/tricore/triboard.h @@ -21,7 +21,7 @@ #include "qapi/error.h" #include "hw/boards.h" #include "system/system.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qom/object.h" =20 #include "hw/tricore/tc27x_soc.h" diff --git a/include/exec/address-spaces.h b/include/system/address-spaces.h similarity index 89% rename from include/exec/address-spaces.h rename to include/system/address-spaces.h index 0d0aa61d68..72d17afb0f 100644 --- a/include/exec/address-spaces.h +++ b/include/system/address-spaces.h @@ -11,16 +11,14 @@ * */ =20 -#ifndef EXEC_ADDRESS_SPACES_H -#define EXEC_ADDRESS_SPACES_H +#ifndef SYSTEM_ADDRESS_SPACES_H +#define SYSTEM_ADDRESS_SPACES_H =20 /* * Internal interfaces between memory.c/exec.c/vl.c. Do not #include unle= ss * you're one of them. */ =20 -#ifndef CONFIG_USER_ONLY - /* Get the root memory region. This interface should only be used tempora= rily * until a proper bus interface is available. */ @@ -35,5 +33,3 @@ extern AddressSpace address_space_memory; extern AddressSpace address_space_io; =20 #endif - -#endif diff --git a/include/system/dma.h b/include/system/dma.h index 0a2f0ad2dd..7178d4f610 100644 --- a/include/system/dma.h +++ b/include/system/dma.h @@ -11,7 +11,7 @@ #define DMA_H =20 #include "system/memory.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "block/block.h" #include "block/accounting.h" =20 diff --git a/rust/wrapper.h b/rust/wrapper.h index 3bc4a6c899..f80dbab24f 100644 --- a/rust/wrapper.h +++ b/rust/wrapper.h @@ -64,4 +64,4 @@ typedef enum memory_order { #include "chardev/char-serial.h" #include "exec/memattrs.h" #include "qemu/timer.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h index 80ce26279b..87a478f7fd 100644 --- a/target/i386/hvf/vmx.h +++ b/target/i386/hvf/vmx.h @@ -33,7 +33,7 @@ #include "system/hvf.h" #include "system/hvf_int.h" =20 -#include "exec/address-spaces.h" +#include "system/address-spaces.h" =20 static inline uint64_t rreg(hv_vcpuid_t vcpu, hv_x86_reg_t reg) { diff --git a/accel/hvf/hvf-accel-ops.c b/accel/hvf/hvf-accel-ops.c index 12fc30c276..601c3bc0ac 100644 --- a/accel/hvf/hvf-accel-ops.c +++ b/accel/hvf/hvf-accel-ops.c @@ -50,7 +50,7 @@ #include "qemu/osdep.h" #include "qemu/error-report.h" #include "qemu/main-loop.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "exec/exec-all.h" #include "gdbstub/enums.h" #include "hw/boards.h" diff --git a/hw/acpi/erst.c b/hw/acpi/erst.c index 5c4c1dc638..2e49b551f2 100644 --- a/hw/acpi/erst.c +++ b/hw/acpi/erst.c @@ -23,7 +23,7 @@ #include "hw/acpi/acpi-defs.h" #include "hw/acpi/aml-build.h" #include "hw/acpi/bios-linker-loader.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/hostmem.h" #include "hw/acpi/erst.h" #include "trace.h" diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index ec329f4991..21ffab10f3 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -11,7 +11,7 @@ =20 #include "qemu/osdep.h" #include "qapi/error.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/system.h" #include "hw/qdev-clock.h" #include "hw/misc/unimp.h" diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c index 4d84d10d24..b750a575f7 100644 --- a/hw/arm/bananapi_m2u.c +++ b/hw/arm/bananapi_m2u.c @@ -19,7 +19,7 @@ =20 #include "qemu/osdep.h" #include "qemu/units.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "hw/boards.h" diff --git a/hw/arm/collie.c b/hw/arm/collie.c index eaa5c52d45..e83aee58c6 100644 --- a/hw/arm/collie.c +++ b/hw/arm/collie.c @@ -16,7 +16,7 @@ #include "strongarm.h" #include "hw/arm/boot.h" #include "hw/block/flash.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qom/object.h" #include "qemu/error-report.h" =20 diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index 43dc89d902..2d8f2d7326 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -28,7 +28,7 @@ #include "hw/sysbus.h" #include "net/net.h" #include "hw/arm/boot.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/arm/exynos4210.h" #include "hw/net/lan9118.h" #include "hw/qdev-properties.h" diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index 9de0f2148f..2a8ffb15f7 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -23,7 +23,7 @@ #include "qapi/error.h" #include "hw/arm/fsl-imx31.h" #include "system/system.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/qdev-properties.h" #include "chardev/char.h" #include "target/arm/cpu-qom.h" diff --git a/hw/arm/fsl-imx8mp.c b/hw/arm/fsl-imx8mp.c index 1ea98e1463..0b19e071cf 100644 --- a/hw/arm/fsl-imx8mp.c +++ b/hw/arm/fsl-imx8mp.c @@ -9,7 +9,7 @@ */ =20 #include "qemu/osdep.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/arm/bsa.h" #include "hw/arm/fsl-imx8mp.h" #include "hw/intc/arm_gicv3.h" diff --git a/hw/arm/imx8mp-evk.c b/hw/arm/imx8mp-evk.c index e1a7892fd7..6e64ec4ea5 100644 --- a/hw/arm/imx8mp-evk.c +++ b/hw/arm/imx8mp-evk.c @@ -7,7 +7,7 @@ */ =20 #include "qemu/osdep.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/arm/boot.h" #include "hw/arm/fsl-imx8mp.h" #include "hw/boards.h" diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index 8aa2e6e98e..ac0c6c6096 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -16,7 +16,7 @@ #include "hw/misc/arm_integrator_debug.h" #include "hw/net/smc91c111.h" #include "net/net.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/runstate.h" #include "system/system.h" #include "qemu/log.h" diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c index 08d2b3025c..362c145409 100644 --- a/hw/arm/kzm.c +++ b/hw/arm/kzm.c @@ -19,7 +19,7 @@ #include "hw/arm/boot.h" #include "hw/boards.h" #include "qemu/error-report.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "net/net.h" #include "hw/net/lan9118.h" #include "hw/char/serial-mm.h" diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c index 3f56fb45ce..ade363daaa 100644 --- a/hw/arm/microbit.c +++ b/hw/arm/microbit.c @@ -13,7 +13,7 @@ #include "hw/boards.h" #include "hw/arm/boot.h" #include "system/system.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" =20 #include "hw/arm/nrf51_soc.h" #include "hw/i2c/microbit_i2c.h" diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 13ed868b6b..b0633a5a69 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -54,7 +54,7 @@ #include "hw/arm/armv7m.h" #include "hw/or-irq.h" #include "hw/boards.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/system.h" #include "system/reset.h" #include "hw/misc/unimp.h" diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index 3f8db0cab6..6958485a66 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -33,7 +33,7 @@ #include "hw/arm/armv7m.h" #include "hw/or-irq.h" #include "hw/boards.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/system.h" #include "hw/qdev-properties.h" #include "hw/misc/unimp.h" diff --git a/hw/arm/mps3r.c b/hw/arm/mps3r.c index 1bddb5e822..4dd1e8a718 100644 --- a/hw/arm/mps3r.c +++ b/hw/arm/mps3r.c @@ -28,7 +28,7 @@ #include "qemu/units.h" #include "qapi/error.h" #include "qobject/qlist.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "cpu.h" #include "system/system.h" #include "hw/boards.h" diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c index e8a5b231ba..bc9b419e37 100644 --- a/hw/arm/msf2-soc.c +++ b/hw/arm/msf2-soc.c @@ -25,7 +25,7 @@ #include "qemu/osdep.h" #include "qemu/units.h" #include "qapi/error.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/char/serial-mm.h" #include "hw/arm/msf2-soc.h" #include "hw/misc/unimp.h" diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c index 9b20f1e2c9..29c76c6860 100644 --- a/hw/arm/msf2-som.c +++ b/hw/arm/msf2-som.c @@ -33,7 +33,7 @@ #include "hw/qdev-properties.h" #include "hw/arm/boot.h" #include "hw/qdev-clock.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/arm/msf2-soc.h" =20 #define DDR_BASE_ADDRESS 0xA0000000 diff --git a/hw/arm/musca.c b/hw/arm/musca.c index e9c092abc3..a4f43f1992 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -22,7 +22,7 @@ #include "qemu/osdep.h" #include "qemu/error-report.h" #include "qapi/error.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/system.h" #include "hw/arm/boot.h" #include "hw/arm/armsse.h" diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 3ee10b4777..91d7e3f04b 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -23,7 +23,7 @@ #include "qemu/main-loop.h" #include "qapi/error.h" #include "cpu.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/hw.h" #include "hw/irq.h" #include "hw/qdev-properties.h" diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c index 24b4043183..aa1e96b3ad 100644 --- a/hw/arm/omap_sx1.c +++ b/hw/arm/omap_sx1.c @@ -34,7 +34,7 @@ #include "hw/arm/boot.h" #include "hw/block/flash.h" #include "system/qtest.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qemu/cutils.h" #include "qemu/error-report.h" =20 diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index 634af9b0a1..e0956880d1 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -19,7 +19,7 @@ =20 #include "qemu/osdep.h" #include "qemu/units.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "hw/boards.h" diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 3361111360..cbe914c93e 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -20,7 +20,7 @@ #include "net/net.h" #include "hw/boards.h" #include "qemu/log.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/system.h" #include "hw/arm/armv7m.h" #include "hw/char/pl011.h" diff --git a/hw/arm/stm32f100_soc.c b/hw/arm/stm32f100_soc.c index 53b5636452..0eabaf8d9b 100644 --- a/hw/arm/stm32f100_soc.c +++ b/hw/arm/stm32f100_soc.c @@ -27,7 +27,7 @@ #include "qapi/error.h" #include "qemu/module.h" #include "hw/arm/boot.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/arm/stm32f100_soc.h" #include "hw/qdev-properties.h" #include "hw/qdev-clock.h" diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index 47a54e592b..32e96912f0 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -26,7 +26,7 @@ #include "qapi/error.h" #include "qemu/module.h" #include "hw/arm/boot.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/arm/stm32f205_soc.h" #include "hw/qdev-properties.h" #include "hw/qdev-clock.h" diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c index 18d8824f29..bba9060daf 100644 --- a/hw/arm/stm32f405_soc.c +++ b/hw/arm/stm32f405_soc.c @@ -24,7 +24,7 @@ =20 #include "qemu/osdep.h" #include "qapi/error.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/system.h" #include "hw/arm/stm32f405_soc.h" #include "hw/qdev-clock.h" diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c index dbf75329f7..6278d354c8 100644 --- a/hw/arm/stm32l4x5_soc.c +++ b/hw/arm/stm32l4x5_soc.c @@ -24,7 +24,7 @@ #include "qemu/osdep.h" #include "qemu/units.h" #include "qapi/error.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/system.h" #include "hw/or-irq.h" #include "hw/arm/stm32l4x5_soc.h" diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c index 59c0160283..ee8747781e 100644 --- a/hw/avr/atmega.c +++ b/hw/avr/atmega.c @@ -13,7 +13,7 @@ #include "qemu/units.h" #include "qapi/error.h" #include "system/memory.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/system.h" #include "hw/qdev-properties.h" #include "hw/sysbus.h" diff --git a/hw/char/goldfish_tty.c b/hw/char/goldfish_tty.c index 7374561141..f0891ffa4d 100644 --- a/hw/char/goldfish_tty.c +++ b/hw/char/goldfish_tty.c @@ -15,7 +15,7 @@ #include "chardev/char-fe.h" #include "qemu/log.h" #include "trace.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/dma.h" #include "hw/char/goldfish_tty.h" =20 diff --git a/hw/char/omap_uart.c b/hw/char/omap_uart.c index 07fb868965..8cbf6ce803 100644 --- a/hw/char/omap_uart.c +++ b/hw/char/omap_uart.c @@ -21,7 +21,7 @@ #include "chardev/char.h" #include "hw/arm/omap.h" #include "hw/char/serial-mm.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" =20 /* UARTs */ struct omap_uart_s { diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c index ec5db5a597..c884be5d75 100644 --- a/hw/char/riscv_htif.c +++ b/hw/char/riscv_htif.c @@ -28,7 +28,7 @@ #include "chardev/char-fe.h" #include "qemu/timer.h" #include "qemu/error-report.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "exec/tswap.h" #include "system/dma.h" #include "system/runstate.h" diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c index 5ef8c24b5b..82b68b8927 100644 --- a/hw/core/cpu-system.c +++ b/hw/core/cpu-system.c @@ -20,7 +20,7 @@ =20 #include "qemu/osdep.h" #include "qapi/error.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "exec/cputlb.h" #include "system/memory.h" #include "exec/tb-flush.h" diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c index 7f1fb562be..a6e477a2d8 100644 --- a/hw/core/null-machine.c +++ b/hw/core/null-machine.c @@ -14,7 +14,7 @@ #include "qemu/osdep.h" #include "qemu/error-report.h" #include "hw/boards.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/core/cpu.h" =20 static void machine_none_init(MachineState *mch) diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index 98819d5dc6..6eb4c0f15a 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -21,7 +21,7 @@ #include "qapi/error.h" #include "hw/sysbus.h" #include "monitor/monitor.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" =20 static void sysbus_dev_print(Monitor *mon, DeviceState *dev, int indent); static char *sysbus_get_fw_dev_path(DeviceState *dev); diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 5bf54347ed..6842e7d491 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -32,7 +32,7 @@ #include "qemu/timer.h" #include "qemu/log.h" #include "qemu/module.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "trace.h" #include "qom/object.h" =20 diff --git a/hw/hyperv/hv-balloon.c b/hw/hyperv/hv-balloon.c index 6f33c3e741..0b1da723c8 100644 --- a/hw/hyperv/hv-balloon.c +++ b/hw/hyperv/hv-balloon.c @@ -10,7 +10,7 @@ #include "qemu/osdep.h" #include "hv-balloon-internal.h" =20 -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "exec/cpu-common.h" #include "exec/ramblock.h" #include "hw/boards.h" diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c index 382c62d668..d21e428eae 100644 --- a/hw/hyperv/hyperv.c +++ b/hw/hyperv/hyperv.c @@ -11,7 +11,7 @@ #include "qemu/main-loop.h" #include "qemu/module.h" #include "qapi/error.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/memory.h" #include "system/kvm.h" #include "qemu/bitops.h" diff --git a/hw/i386/kvm/xen_evtchn.c b/hw/i386/kvm/xen_evtchn.c index 9b8b092bc2..f9223ef1a1 100644 --- a/hw/i386/kvm/xen_evtchn.c +++ b/hw/i386/kvm/xen_evtchn.c @@ -23,7 +23,7 @@ #include "qobject/qdict.h" #include "qom/object.h" #include "exec/target_page.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "migration/vmstate.h" #include "trace.h" =20 diff --git a/hw/i386/kvm/xen_gnttab.c b/hw/i386/kvm/xen_gnttab.c index 7b843a72b1..430ba62896 100644 --- a/hw/i386/kvm/xen_gnttab.c +++ b/hw/i386/kvm/xen_gnttab.c @@ -17,7 +17,7 @@ #include "qapi/error.h" #include "qom/object.h" #include "exec/target_page.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "migration/vmstate.h" =20 #include "hw/sysbus.h" diff --git a/hw/i386/kvm/xen_overlay.c b/hw/i386/kvm/xen_overlay.c index db9aa7942d..a2b26e9906 100644 --- a/hw/i386/kvm/xen_overlay.c +++ b/hw/i386/kvm/xen_overlay.c @@ -16,7 +16,7 @@ #include "qapi/error.h" #include "qom/object.h" #include "exec/target_page.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "migration/vmstate.h" =20 #include "hw/sysbus.h" diff --git a/hw/i386/sgx-epc.c b/hw/i386/sgx-epc.c index 875e1c5c33..00b220d4d6 100644 --- a/hw/i386/sgx-epc.c +++ b/hw/i386/sgx-epc.c @@ -17,7 +17,7 @@ #include "qapi/error.h" #include "qapi/visitor.h" #include "target/i386/cpu.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" =20 static const Property sgx_epc_properties[] =3D { DEFINE_PROP_UINT64(SGX_EPC_ADDR_PROP, SGXEPCDevice, addr, 0), diff --git a/hw/i386/sgx.c b/hw/i386/sgx.c index e665e2111c..5685c4fb80 100644 --- a/hw/i386/sgx.c +++ b/hw/i386/sgx.c @@ -20,7 +20,7 @@ #include "qapi/error.h" #include "qemu/error-report.h" #include "qapi/qapi-commands-misc-target.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/hw_accel.h" #include "system/reset.h" #include diff --git a/hw/i386/vapic.c b/hw/i386/vapic.c index 14de9b7a82..26aae64e5d 100644 --- a/hw/i386/vapic.c +++ b/hw/i386/vapic.c @@ -16,7 +16,7 @@ #include "system/hw_accel.h" #include "system/kvm.h" #include "system/runstate.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/i386/apic_internal.h" #include "hw/sysbus.h" #include "hw/boards.h" diff --git a/hw/ide/ahci-sysbus.c b/hw/ide/ahci-sysbus.c index 03a5bd42d0..3c1935d81c 100644 --- a/hw/ide/ahci-sysbus.c +++ b/hw/ide/ahci-sysbus.c @@ -22,7 +22,7 @@ */ =20 #include "qemu/osdep.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" =20 diff --git a/hw/input/lasips2.c b/hw/input/lasips2.c index d9f8c36778..987034efd3 100644 --- a/hw/input/lasips2.c +++ b/hw/input/lasips2.c @@ -29,7 +29,7 @@ #include "hw/input/lasips2.h" #include "exec/hwaddr.h" #include "trace.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "migration/vmstate.h" #include "hw/irq.h" #include "qapi/error.h" diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c index a51a215e6e..a558c50185 100644 --- a/hw/intc/loongarch_extioi.c +++ b/hw/intc/loongarch_extioi.c @@ -11,7 +11,7 @@ #include "qapi/error.h" #include "hw/irq.h" #include "hw/loongarch/virt.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/intc/loongarch_extioi.h" #include "trace.h" =20 diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c index 5964cde7e0..789c4a4d6e 100644 --- a/hw/intc/riscv_aplic.c +++ b/hw/intc/riscv_aplic.c @@ -22,7 +22,7 @@ #include "qemu/module.h" #include "qemu/error-report.h" #include "qemu/bswap.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/sysbus.h" #include "hw/pci/msi.h" #include "hw/boards.h" diff --git a/hw/intc/riscv_imsic.c b/hw/intc/riscv_imsic.c index 241b12fef0..852f413e5a 100644 --- a/hw/intc/riscv_imsic.c +++ b/hw/intc/riscv_imsic.c @@ -22,7 +22,7 @@ #include "qemu/module.h" #include "qemu/error-report.h" #include "qemu/bswap.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/sysbus.h" #include "hw/pci/msi.h" #include "hw/boards.h" diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index a5840ff968..08ae2d9692 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -18,7 +18,7 @@ #include "system/reset.h" #include "system/rtc.h" #include "hw/loongarch/virt.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/irq.h" #include "net/net.h" #include "hw/loader.h" diff --git a/hw/mem/memory-device.c b/hw/mem/memory-device.c index 1de8dfec7d..1a432e9bd2 100644 --- a/hw/mem/memory-device.c +++ b/hw/mem/memory-device.c @@ -17,7 +17,7 @@ #include "qemu/range.h" #include "hw/virtio/vhost.h" #include "system/kvm.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "trace.h" =20 static bool memory_device_is_empty(const MemoryDeviceState *md) diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_= ml605_mmu.c index 21ad215e44..c887c7a99e 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -36,7 +36,7 @@ #include "hw/boards.h" #include "hw/char/serial-mm.h" #include "hw/qdev-properties.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/ssi/ssi.h" =20 #include "boot.h" diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petal= ogix_s3adsp1800_mmu.c index bdba2006b7..f976c90bd2 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -33,7 +33,7 @@ #include "system/system.h" #include "hw/boards.h" #include "hw/misc/unimp.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/char/xilinx_uartlite.h" =20 #include "boot.h" diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pm= u.c index bdbf7328bf..0922c65295 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -17,7 +17,7 @@ =20 #include "qemu/osdep.h" #include "qapi/error.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/boards.h" #include "cpu.h" #include "boot.h" diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c index c530688e76..b6dabf2893 100644 --- a/hw/mips/mipssim.c +++ b/hw/mips/mipssim.c @@ -28,7 +28,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu/datadir.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/clock.h" #include "hw/mips/mips.h" #include "hw/char/serial-mm.h" diff --git a/hw/misc/allwinner-h3-dramc.c b/hw/misc/allwinner-h3-dramc.c index c4f3eb9274..74ff71b753 100644 --- a/hw/misc/allwinner-h3-dramc.c +++ b/hw/misc/allwinner-h3-dramc.c @@ -24,7 +24,7 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/qdev-properties.h" #include "qapi/error.h" #include "hw/misc/allwinner-h3-dramc.h" diff --git a/hw/misc/allwinner-r40-dramc.c b/hw/misc/allwinner-r40-dramc.c index 96e1848c21..5908a059e8 100644 --- a/hw/misc/allwinner-r40-dramc.c +++ b/hw/misc/allwinner-r40-dramc.c @@ -24,7 +24,7 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/qdev-properties.h" #include "qapi/error.h" #include "qemu/bitops.h" diff --git a/hw/misc/ivshmem-flat.c b/hw/misc/ivshmem-flat.c index 40309a8ff3..076c4b42de 100644 --- a/hw/misc/ivshmem-flat.c +++ b/hw/misc/ivshmem-flat.c @@ -17,7 +17,7 @@ #include "hw/qdev-properties-system.h" #include "hw/sysbus.h" #include "chardev/char-fe.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "trace.h" =20 #include "hw/misc/ivshmem-flat.h" diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c index 03b1feda50..3c0819c58a 100644 --- a/hw/misc/mac_via.c +++ b/hw/misc/mac_via.c @@ -16,7 +16,7 @@ */ =20 #include "qemu/osdep.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "migration/vmstate.h" #include "hw/sysbus.h" #include "hw/irq.h" diff --git a/hw/net/i82596.c b/hw/net/i82596.c index ee919dab3c..64ed3c8390 100644 --- a/hw/net/i82596.c +++ b/hw/net/i82596.c @@ -15,7 +15,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qemu/module.h" #include "trace.h" #include "i82596.h" diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index a757939cfb..cbfb2b5303 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -27,7 +27,7 @@ #include "system/system.h" #include "system/dma.h" #include "system/reset.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/boards.h" #include "hw/nvram/fw_cfg.h" #include "hw/qdev-properties.h" diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index 83d7c2a8af..c2284a7d41 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -28,7 +28,7 @@ #include "net/net.h" #include "hw/openrisc/boot.h" #include "hw/qdev-properties.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/device_tree.h" #include "system/system.h" #include "hw/sysbus.h" diff --git a/hw/openrisc/virt.c b/hw/openrisc/virt.c index 3055306783..0d1c1f103c 100644 --- a/hw/openrisc/virt.c +++ b/hw/openrisc/virt.c @@ -11,7 +11,7 @@ #include "qemu/guest-random.h" #include "qapi/error.h" #include "cpu.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/irq.h" #include "hw/boards.h" #include "hw/char/serial-mm.h" diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c index 9c41c155fb..a297318c6e 100644 --- a/hw/pci-host/mv64361.c +++ b/hw/pci-host/mv64361.c @@ -17,7 +17,7 @@ #include "hw/irq.h" #include "hw/intc/i8259.h" #include "hw/qdev-properties.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qemu/log.h" #include "qemu/error-report.h" #include "trace.h" diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c index 246d6d633b..7b2dc6985c 100644 --- a/hw/ppc/pegasos2.c +++ b/hw/ppc/pegasos2.c @@ -31,7 +31,7 @@ #include "qemu/error-report.h" #include "system/kvm.h" #include "kvm_ppc.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qom/qom-qobject.h" #include "qobject/qdict.h" #include "trace.h" diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 1fe11dde50..f832ee61e8 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -18,7 +18,7 @@ */ =20 #include "qemu/osdep.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/irq.h" #include "target/ppc/cpu.h" #include "qemu/log.h" diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index 8250824a1a..5c7278ea4b 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -36,7 +36,7 @@ #include "qemu/timer.h" #include "system/reset.h" #include "system/system.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/intc/ppc-uic.h" #include "trace.h" =20 diff --git a/hw/ppc/ppc4xx_sdram.c b/hw/ppc/ppc4xx_sdram.c index 562bff8d53..bf0faad9e7 100644 --- a/hw/ppc/ppc4xx_sdram.c +++ b/hw/ppc/ppc4xx_sdram.c @@ -34,7 +34,7 @@ #include "qapi/error.h" #include "qemu/log.h" #include "qemu/error-report.h" -#include "exec/address-spaces.h" /* get_system_memory() */ +#include "system/address-spaces.h" /* get_system_memory() */ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/ppc/ppc4xx.h" diff --git a/hw/ppc/prep_systemio.c b/hw/ppc/prep_systemio.c index b1f2e130f0..08f29e72e4 100644 --- a/hw/ppc/prep_systemio.c +++ b/hw/ppc/prep_systemio.c @@ -28,7 +28,7 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qom/object.h" #include "qemu/error-report.h" /* for error_report() */ #include "qemu/module.h" diff --git a/hw/ppc/rs6000_mc.c b/hw/ppc/rs6000_mc.c index 0e5d53b8b6..27f1c90f06 100644 --- a/hw/ppc/rs6000_mc.c +++ b/hw/ppc/rs6000_mc.c @@ -24,7 +24,7 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qapi/error.h" #include "trace.h" #include "qom/object.h" diff --git a/hw/ppc/spapr_ovec.c b/hw/ppc/spapr_ovec.c index 88e29536aa..6d6eaf67cb 100644 --- a/hw/ppc/spapr_ovec.c +++ b/hw/ppc/spapr_ovec.c @@ -15,7 +15,7 @@ #include "hw/ppc/spapr_ovec.h" #include "migration/vmstate.h" #include "qemu/bitmap.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qemu/error-report.h" #include "trace.h" #include diff --git a/hw/ppc/vof.c b/hw/ppc/vof.c index 09cb77de93..f14efa3a7c 100644 --- a/hw/ppc/vof.c +++ b/hw/ppc/vof.c @@ -15,7 +15,7 @@ #include "qemu/units.h" #include "qemu/log.h" #include "qapi/error.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/ppc/vof.h" #include "hw/ppc/fdt.h" #include "system/runstate.h" diff --git a/hw/remote/iommu.c b/hw/remote/iommu.c index ec845d1f58..3e0758a21e 100644 --- a/hw/remote/iommu.c +++ b/hw/remote/iommu.c @@ -14,7 +14,7 @@ #include "hw/pci/pci_bus.h" #include "hw/pci/pci.h" #include "system/memory.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "trace.h" =20 /** diff --git a/hw/riscv/microblaze-v-generic.c b/hw/riscv/microblaze-v-generi= c.c index d8e67906d2..e863c50cbc 100644 --- a/hw/riscv/microblaze-v-generic.c +++ b/hw/riscv/microblaze-v-generic.c @@ -22,7 +22,7 @@ #include "net/net.h" #include "hw/boards.h" #include "hw/char/serial-mm.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/char/xilinx_uartlite.h" #include "hw/misc/unimp.h" =20 diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 98a67fe52a..019d6b3986 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -28,7 +28,7 @@ #include "hw/riscv/boot.h" #include "qemu/units.h" #include "system/system.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" =20 /* * This version of the OpenTitan machine currently supports diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c index e2242b97d0..17c5c72102 100644 --- a/hw/riscv/shakti_c.c +++ b/hw/riscv/shakti_c.c @@ -25,7 +25,7 @@ #include "hw/intc/riscv_aclint.h" #include "system/system.h" #include "hw/qdev-properties.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/riscv/boot.h" =20 static const struct MemmapEntry { diff --git a/hw/s390x/css.c b/hw/s390x/css.c index 738800c98d..2059c5dd0b 100644 --- a/hw/s390x/css.c +++ b/hw/s390x/css.c @@ -14,7 +14,7 @@ #include "qapi/visitor.h" #include "qemu/bitops.h" #include "qemu/error-report.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/s390x/ioinst.h" #include "hw/qdev-properties.h" #include "hw/s390x/css.h" diff --git a/hw/s390x/s390-skeys.c b/hw/s390x/s390-skeys.c index 811d892122..425e3e4a87 100644 --- a/hw/s390x/s390-skeys.c +++ b/hw/s390x/s390-skeys.c @@ -19,7 +19,7 @@ #include "qobject/qdict.h" #include "qemu/error-report.h" #include "system/memory_mapping.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/kvm.h" #include "migration/qemu-file-types.h" #include "migration/register.h" diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c index 43f3b162c8..e8ecb90826 100644 --- a/hw/s390x/virtio-ccw.c +++ b/hw/s390x/virtio-ccw.c @@ -12,7 +12,7 @@ =20 #include "qemu/osdep.h" #include "qapi/error.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/kvm.h" #include "net/net.h" #include "hw/virtio/virtio.h" diff --git a/hw/sparc/sun4m_iommu.c b/hw/sparc/sun4m_iommu.c index 5a4c1f5e3b..4a542b18d2 100644 --- a/hw/sparc/sun4m_iommu.c +++ b/hw/sparc/sun4m_iommu.c @@ -29,7 +29,7 @@ #include "hw/sysbus.h" #include "migration/vmstate.h" #include "qemu/module.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "trace.h" =20 /* diff --git a/hw/sparc64/sun4u_iommu.c b/hw/sparc64/sun4u_iommu.c index eba811af0c..533fcae1fb 100644 --- a/hw/sparc64/sun4u_iommu.c +++ b/hw/sparc64/sun4u_iommu.c @@ -27,7 +27,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" #include "hw/sparc/sun4u_iommu.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index ccb97b6806..ea82472105 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -36,7 +36,7 @@ #include "hw/rtc/mc146818rtc_regs.h" #include "migration/vmstate.h" #include "hw/timer/i8254.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qom/object.h" #include "trace.h" =20 diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index 6cdeb72df0..b668aee97a 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -18,7 +18,7 @@ =20 #include "qemu/module.h" #include "qapi/error.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/qdev-properties.h" #include "hw/pci/pci_ids.h" #include "hw/acpi/tpm.h" diff --git a/hw/vfio/ap.c b/hw/vfio/ap.c index c7ab4ff57a..d6575d7c44 100644 --- a/hw/vfio/ap.c +++ b/hw/vfio/ap.c @@ -28,7 +28,7 @@ #include "migration/vmstate.h" #include "hw/qdev-properties.h" #include "hw/s390x/ap-bridge.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qom/object.h" =20 #define TYPE_VFIO_AP_DEVICE "vfio-ap" diff --git a/hw/vfio/ccw.c b/hw/vfio/ccw.c index e5e0d9e3e7..29e804e122 100644 --- a/hw/vfio/ccw.c +++ b/hw/vfio/ccw.c @@ -27,7 +27,7 @@ #include "hw/s390x/vfio-ccw.h" #include "hw/qdev-properties.h" #include "hw/s390x/ccw-device.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qemu/error-report.h" #include "qemu/main-loop.h" #include "qemu/module.h" diff --git a/hw/vfio/common.c b/hw/vfio/common.c index cdcec21c08..5c3bc88222 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -27,7 +27,7 @@ =20 #include "hw/vfio/vfio-common.h" #include "hw/vfio/pci.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/memory.h" #include "exec/ram_addr.h" #include "hw/hw.h" diff --git a/hw/vfio/container.c b/hw/vfio/container.c index 1d1c5f9a77..2e993c7e73 100644 --- a/hw/vfio/container.c +++ b/hw/vfio/container.c @@ -23,7 +23,7 @@ #include =20 #include "hw/vfio/vfio-common.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/memory.h" #include "exec/ram_addr.h" #include "qemu/error-report.h" diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c index 96c6bf5654..c6edbdd4ae 100644 --- a/hw/vfio/platform.c +++ b/hw/vfio/platform.c @@ -29,7 +29,7 @@ #include "qemu/module.h" #include "qemu/range.h" #include "system/memory.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qemu/queue.h" #include "hw/sysbus.h" #include "trace.h" diff --git a/hw/vfio/spapr.c b/hw/vfio/spapr.c index ad4c499eaf..bc00badb34 100644 --- a/hw/vfio/spapr.c +++ b/hw/vfio/spapr.c @@ -15,7 +15,7 @@ #include #endif #include "system/kvm.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" =20 #include "hw/vfio/vfio-common.h" #include "hw/hw.h" diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c index 7efbde3d4c..1e0336df1d 100644 --- a/hw/virtio/vhost-vdpa.c +++ b/hw/virtio/vhost-vdpa.c @@ -20,7 +20,7 @@ #include "hw/virtio/virtio-net.h" #include "hw/virtio/vhost-shadow-virtqueue.h" #include "hw/virtio/vhost-vdpa.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "migration/blocker.h" #include "qemu/cutils.h" #include "qemu/main-loop.h" diff --git a/hw/virtio/virtio-balloon.c b/hw/virtio/virtio-balloon.c index 2eb5a14fa2..0d0603c674 100644 --- a/hw/virtio/virtio-balloon.c +++ b/hw/virtio/virtio-balloon.c @@ -24,7 +24,7 @@ #include "hw/boards.h" #include "system/balloon.h" #include "hw/virtio/virtio-balloon.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qapi/error.h" #include "qapi/qapi-events-machine.h" #include "qapi/visitor.h" diff --git a/hw/virtio/virtio-bus.c b/hw/virtio/virtio-bus.c index 896feb37a1..d1c79c567b 100644 --- a/hw/virtio/virtio-bus.c +++ b/hw/virtio/virtio-bus.c @@ -28,7 +28,7 @@ #include "qapi/error.h" #include "hw/virtio/virtio-bus.h" #include "hw/virtio/virtio.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" =20 /* #define DEBUG_VIRTIO_BUS */ =20 diff --git a/monitor/hmp-cmds-target.c b/monitor/hmp-cmds-target.c index 6654d31406..011a367357 100644 --- a/monitor/hmp-cmds-target.c +++ b/monitor/hmp-cmds-target.c @@ -24,7 +24,7 @@ =20 #include "qemu/osdep.h" #include "disas/disas.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/memory.h" #include "monitor/hmp-target.h" #include "monitor/monitor-internal.h" diff --git a/monitor/hmp-cmds.c b/monitor/hmp-cmds.c index 7ded3378cf..8ddcdd76c1 100644 --- a/monitor/hmp-cmds.c +++ b/monitor/hmp-cmds.c @@ -14,7 +14,7 @@ */ =20 #include "qemu/osdep.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "exec/ioport.h" #include "exec/gdbstub.h" #include "gdbstub/enums.h" diff --git a/system/ioport.c b/system/ioport.c index 5f8718486c..2bc14bdcfa 100644 --- a/system/ioport.c +++ b/system/ioport.c @@ -29,7 +29,7 @@ #include "cpu.h" #include "exec/ioport.h" #include "system/memory.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "trace.h" =20 struct MemoryRegionPortioList { diff --git a/system/memory.c b/system/memory.c index 6d6b33b366..050bffdbf8 100644 --- a/system/memory.c +++ b/system/memory.c @@ -33,7 +33,7 @@ #include "qemu/accel.h" #include "hw/boards.h" #include "migration/vmstate.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" =20 //#define DEBUG_UNASSIGNED =20 diff --git a/system/memory_mapping.c b/system/memory_mapping.c index 8538a8241e..da708a08ab 100644 --- a/system/memory_mapping.c +++ b/system/memory_mapping.c @@ -17,7 +17,7 @@ =20 #include "system/memory_mapping.h" #include "system/memory.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/core/cpu.h" =20 //#define DEBUG_GUEST_PHYS_REGION_ADD diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 2439af63a0..93a3f9b53d 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -22,7 +22,7 @@ =20 #include =20 -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/boards.h" #include "hw/irq.h" #include "qemu/main-loop.h" diff --git a/target/arm/kvm.c b/target/arm/kvm.c index da30bdbb23..97de8c7e93 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -30,7 +30,7 @@ #include "internals.h" #include "hw/pci/pci.h" #include "exec/memattrs.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "gdbstub/enums.h" #include "hw/boards.h" #include "hw/irq.h" diff --git a/target/avr/helper.c b/target/avr/helper.c index 3412312ad5..a1e2cc9c35 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -26,7 +26,7 @@ #include "exec/cputlb.h" #include "exec/page-protection.h" #include "exec/cpu_ldst.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "exec/helper-proto.h" =20 bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request) diff --git a/target/i386/cpu-apic.c b/target/i386/cpu-apic.c index c1708b04bb..242a05fdbe 100644 --- a/target/i386/cpu-apic.c +++ b/target/i386/cpu-apic.c @@ -14,7 +14,7 @@ #include "system/hw_accel.h" #include "system/kvm.h" #include "system/xen.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/qdev-properties.h" #include "hw/i386/apic_internal.h" #include "cpu-internal.h" diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 1b64ceaaba..dba1b3ffef 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -38,7 +38,7 @@ #ifndef CONFIG_USER_ONLY #include "system/reset.h" #include "qapi/qapi-commands-machine-target.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/boards.h" #include "hw/i386/sgx-epc.h" #endif diff --git a/target/i386/kvm/xen-emu.c b/target/i386/kvm/xen-emu.c index e81a245881..b23010374f 100644 --- a/target/i386/kvm/xen-emu.c +++ b/target/i386/kvm/xen-emu.c @@ -17,7 +17,7 @@ #include "system/kvm_int.h" #include "system/kvm_xen.h" #include "kvm/kvm_i386.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "xen-emu.h" #include "trace.h" #include "system/runstate.h" diff --git a/target/i386/nvmm/nvmm-all.c b/target/i386/nvmm/nvmm-all.c index 04e5f7e637..91f0e32366 100644 --- a/target/i386/nvmm/nvmm-all.c +++ b/target/i386/nvmm/nvmm-all.c @@ -9,7 +9,7 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "exec/ioport.h" #include "qemu/accel.h" #include "system/nvmm.h" diff --git a/target/i386/sev.c b/target/i386/sev.c index 0e1dbb6959..ba88976e9f 100644 --- a/target/i386/sev.c +++ b/target/i386/sev.c @@ -39,7 +39,7 @@ #include "qapi/qapi-commands-misc-target.h" #include "confidential-guest.h" #include "hw/i386/pc.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "qemu/queue.h" =20 OBJECT_DECLARE_TYPE(SevCommonState, SevCommonStateClass, SEV_COMMON) diff --git a/target/i386/tcg/system/misc_helper.c b/target/i386/tcg/system/= misc_helper.c index ce18c75b9f..0555cf2604 100644 --- a/target/i386/tcg/system/misc_helper.c +++ b/target/i386/tcg/system/misc_helper.c @@ -22,7 +22,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "exec/cpu_ldst.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "exec/cputlb.h" #include "tcg/helper-tcg.h" #include "hw/i386/apic.h" diff --git a/target/i386/tcg/system/tcg-cpu.c b/target/i386/tcg/system/tcg-= cpu.c index 13a3507863..ab1f3c7c59 100644 --- a/target/i386/tcg/system/tcg-cpu.c +++ b/target/i386/tcg/system/tcg-cpu.c @@ -23,7 +23,7 @@ =20 #include "system/system.h" #include "qemu/units.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" =20 #include "tcg/tcg-cpu.h" =20 diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index 41fb8c5a4e..d58cb11cee 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -10,7 +10,7 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "exec/ioport.h" #include "gdbstub/helpers.h" #include "qemu/accel.h" diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c index 28735c80be..1668f12410 100644 --- a/target/loongarch/kvm/kvm.c +++ b/target/loongarch/kvm/kvm.c @@ -18,7 +18,7 @@ #include "system/kvm_int.h" #include "hw/pci/pci.h" #include "exec/memattrs.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/boards.h" #include "hw/irq.h" #include "hw/loongarch/virt.h" diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 4ffeeaa1c9..9686fa86e0 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -35,7 +35,7 @@ #include "accel/accel-cpu-target.h" #include "hw/pci/pci.h" #include "exec/memattrs.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/boards.h" #include "hw/irq.h" #include "hw/intc/riscv_imsic.h" diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index d8f483898d..b079d120db 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -17,7 +17,7 @@ =20 #include "qemu/osdep.h" #include "qemu/error-report.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "cpu.h" #include "s390x-internal.h" #include "kvm/kvm_s390x.h" diff --git a/target/s390x/sigp.c b/target/s390x/sigp.c index 6a4d9c5081..a3347f1236 100644 --- a/target/s390x/sigp.c +++ b/target/s390x/sigp.c @@ -14,7 +14,7 @@ #include "hw/boards.h" #include "system/hw_accel.h" #include "system/runstate.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "exec/cputlb.h" #include "exec/exec-all.h" #include "system/tcg.h" diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index f969850f87..ac733f407f 100644 --- a/target/s390x/tcg/excp_helper.c +++ b/target/s390x/tcg/excp_helper.c @@ -28,7 +28,7 @@ #include "tcg_s390x.h" #ifndef CONFIG_USER_ONLY #include "qemu/timer.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "hw/s390x/ioinst.h" #include "hw/s390x/s390_flic.h" #include "hw/boards.h" diff --git a/target/xtensa/dbg_helper.c b/target/xtensa/dbg_helper.c index 5546c82ecd..163a1ffc7b 100644 --- a/target/xtensa/dbg_helper.c +++ b/target/xtensa/dbg_helper.c @@ -31,7 +31,7 @@ #include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "exec/exec-all.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" =20 void HELPER(wsr_ibreakenable)(CPUXtensaState *env, uint32_t v) { diff --git a/hw/display/apple-gfx.m b/hw/display/apple-gfx.m index c4323574e1..2ff1c90df7 100644 --- a/hw/display/apple-gfx.m +++ b/hw/display/apple-gfx.m @@ -18,7 +18,7 @@ #include "qapi/visitor.h" #include "qapi/error.h" #include "block/aio-wait.h" -#include "exec/address-spaces.h" +#include "system/address-spaces.h" #include "system/dma.h" #include "migration/blocker.h" #include "ui/console.h" --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of 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Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- hw/display/vga_int.h | 2 +- include/hw/char/parallel-isa.h | 2 +- include/hw/dma/i8257.h | 2 +- include/hw/ide/ide-bus.h | 2 +- include/hw/isa/isa.h | 2 +- include/{exec =3D> system}/ioport.h | 6 ++---- hw/block/fdc-isa.c | 2 +- monitor/hmp-cmds.c | 2 +- system/ioport.c | 2 +- system/physmem.c | 2 +- system/qtest.c | 2 +- target/i386/nvmm/nvmm-all.c | 2 +- target/i386/whpx/whpx-all.c | 2 +- tests/qtest/fuzz/qtest_wrappers.c | 2 +- MAINTAINERS | 2 +- 15 files changed, 16 insertions(+), 18 deletions(-) rename include/{exec =3D> system}/ioport.h (97%) diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h index 60ad26e03e..747b5cc6cf 100644 --- a/hw/display/vga_int.h +++ b/hw/display/vga_int.h @@ -26,7 +26,7 @@ #define HW_VGA_INT_H =20 #include "ui/console.h" -#include "exec/ioport.h" +#include "system/ioport.h" #include "system/memory.h" =20 #include "hw/display/bochs-vbe.h" diff --git a/include/hw/char/parallel-isa.h b/include/hw/char/parallel-isa.h index 5284b2ffec..3edaf9dbe4 100644 --- a/include/hw/char/parallel-isa.h +++ b/include/hw/char/parallel-isa.h @@ -12,7 +12,7 @@ =20 #include "parallel.h" =20 -#include "exec/ioport.h" +#include "system/ioport.h" #include "hw/isa/isa.h" #include "qom/object.h" =20 diff --git a/include/hw/dma/i8257.h b/include/hw/dma/i8257.h index 4342e4a91e..33b6286d5a 100644 --- a/include/hw/dma/i8257.h +++ b/include/hw/dma/i8257.h @@ -2,7 +2,7 @@ #define HW_I8257_H =20 #include "hw/isa/isa.h" -#include "exec/ioport.h" +#include "system/ioport.h" #include "qom/object.h" =20 #define TYPE_I8257 "i8257" diff --git a/include/hw/ide/ide-bus.h b/include/hw/ide/ide-bus.h index 4841a7dcd6..121b455fcd 100644 --- a/include/hw/ide/ide-bus.h +++ b/include/hw/ide/ide-bus.h @@ -1,7 +1,7 @@ #ifndef HW_IDE_BUS_H #define HW_IDE_BUS_H =20 -#include "exec/ioport.h" +#include "system/ioport.h" #include "hw/ide/ide-dev.h" #include "hw/ide/ide-dma.h" =20 diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 1d852011b3..a82c5f1004 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -4,7 +4,7 @@ /* ISA bus */ =20 #include "system/memory.h" -#include "exec/ioport.h" +#include "system/ioport.h" #include "hw/qdev-core.h" #include "qom/object.h" =20 diff --git a/include/exec/ioport.h b/include/system/ioport.h similarity index 97% rename from include/exec/ioport.h rename to include/system/ioport.h index ecea3575bc..780ea5a676 100644 --- a/include/exec/ioport.h +++ b/include/system/ioport.h @@ -21,8 +21,8 @@ * IO ports API */ =20 -#ifndef IOPORT_H -#define IOPORT_H +#ifndef SYSTEM_IOPORT_H +#define SYSTEM_IOPORT_H =20 #include "system/memory.h" =20 @@ -39,9 +39,7 @@ typedef struct MemoryRegionPortio { =20 #define PORTIO_END_OF_LIST() { } =20 -#ifndef CONFIG_USER_ONLY extern const MemoryRegionOps unassigned_io_ops; -#endif =20 void cpu_outb(uint32_t addr, uint8_t val); void cpu_outw(uint32_t addr, uint16_t val); diff --git a/hw/block/fdc-isa.c b/hw/block/fdc-isa.c index a10c24aab1..561cfa47c1 100644 --- a/hw/block/fdc-isa.c +++ b/hw/block/fdc-isa.c @@ -42,7 +42,7 @@ #include "system/block-backend.h" #include "system/blockdev.h" #include "system/system.h" -#include "exec/ioport.h" +#include "system/ioport.h" #include "qemu/log.h" #include "qemu/main-loop.h" #include "qemu/module.h" diff --git a/monitor/hmp-cmds.c b/monitor/hmp-cmds.c index 8ddcdd76c1..74a0f56566 100644 --- a/monitor/hmp-cmds.c +++ b/monitor/hmp-cmds.c @@ -15,7 +15,7 @@ =20 #include "qemu/osdep.h" #include "system/address-spaces.h" -#include "exec/ioport.h" +#include "system/ioport.h" #include "exec/gdbstub.h" #include "gdbstub/enums.h" #include "monitor/hmp.h" diff --git a/system/ioport.c b/system/ioport.c index 2bc14bdcfa..ec5c586cf8 100644 --- a/system/ioport.c +++ b/system/ioport.c @@ -27,7 +27,7 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "exec/ioport.h" +#include "system/ioport.h" #include "system/memory.h" #include "system/address-spaces.h" #include "trace.h" diff --git a/system/physmem.c b/system/physmem.c index be92969a4a..2850e14780 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -51,7 +51,7 @@ #include "qemu/memalign.h" #include "qemu/memfd.h" #include "system/memory.h" -#include "exec/ioport.h" +#include "system/ioport.h" #include "system/dma.h" #include "system/hostmem.h" #include "system/hw_accel.h" diff --git a/system/qtest.c b/system/qtest.c index 5407289154..523a047995 100644 --- a/system/qtest.c +++ b/system/qtest.c @@ -16,7 +16,7 @@ #include "system/qtest.h" #include "system/runstate.h" #include "chardev/char-fe.h" -#include "exec/ioport.h" +#include "system/ioport.h" #include "system/memory.h" #include "exec/tswap.h" #include "hw/qdev-core.h" diff --git a/target/i386/nvmm/nvmm-all.c b/target/i386/nvmm/nvmm-all.c index 91f0e32366..17394d073d 100644 --- a/target/i386/nvmm/nvmm-all.c +++ b/target/i386/nvmm/nvmm-all.c @@ -10,7 +10,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "system/address-spaces.h" -#include "exec/ioport.h" +#include "system/ioport.h" #include "qemu/accel.h" #include "system/nvmm.h" #include "system/cpus.h" diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index d58cb11cee..b64852e13e 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -11,7 +11,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "system/address-spaces.h" -#include "exec/ioport.h" +#include "system/ioport.h" #include "gdbstub/helpers.h" #include "qemu/accel.h" #include "system/whpx.h" diff --git a/tests/qtest/fuzz/qtest_wrappers.c b/tests/qtest/fuzz/qtest_wra= ppers.c index 0580f8df86..d7adcbe3fd 100644 --- a/tests/qtest/fuzz/qtest_wrappers.c +++ b/tests/qtest/fuzz/qtest_wrappers.c @@ -13,7 +13,7 @@ =20 #include "qemu/osdep.h" #include "hw/core/cpu.h" -#include "exec/ioport.h" +#include "system/ioport.h" =20 #include "fuzz.h" =20 diff --git a/MAINTAINERS b/MAINTAINERS index b5f1e81771..751d611613 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3107,7 +3107,7 @@ M: Peter Xu M: David Hildenbrand R: Philippe Mathieu-Daud=C3=A9 S: Supported -F: include/exec/ioport.h +F: include/system/ioport.h F: include/exec/memop.h F: include/system/memory.h F: include/exec/ram_addr.h --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837540; x=1742442340; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HBRn320f0vqZtJU6nV6Y66O0sC8qfPrEa7TKcBvFURw=; b=WA4nmHfuo1uhHRE0vBecsJqVGjqRQOccWRQfnZLPwe/fkv/mzgM6xT1EqSFHgMUL2N JioKaq7MiHPpEmuN1ic2LLLkS+WcAfsuQ9Iftf1BKNVqvAABkIsxP2kg6Zgkr5zBk28v 13h57+F5SKj3r7G8aLWSW4ZE/lVE1zM/laZtG1CuFKdwo9BatcSICYAAfD6Mzoq9LBZv BEtbP+FZkW9T052ehxeoSPZlR7S4g51mrMJUfg0zQ1UtYYHuyoHH3OYuE7+qAcWsmrgT HPH7EpOGhXdnBnQAaVTkbgbwlvwySDXBQ8IoUNG7j3Sa/orFEJyOF/kRWxpzNzZgD0GP iuDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837540; x=1742442340; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HBRn320f0vqZtJU6nV6Y66O0sC8qfPrEa7TKcBvFURw=; b=OzcgcY4nIK5Bdkebfzp1MYmzjTjFrZR2LkkvLNHsM8k6QGOA/DXPnConzr1+8Bsj7S ismTYBYGm0UZggBkgzdO9wqYx9YuGALjmgoM5RK6pITX/V6ZfC5WouUHHXt/i7rFCIMs KQt7pOGq47VCqeWwxLHQZ2ssVFsJ7HVjCA/fLF6zk/tbP5WltrHlxYalcNhlOWY6dSdO 7SZZnvnvo++L6IH1xAJNWzUEcT2dcFi1y58AZes+k0Tt/azIKLYQSVNCoNSfO7qHwHcn S2o6ANM39PkEcxyoYeksgvH51d/PV+qZIvojqQaig5XzIVmY+mLEj70gntTBHLiawEyd Jwtg== X-Gm-Message-State: AOJu0Yx8izrTe/LQ4SPDgNv5s1lfKZVruIwy0J3X7yjaZC7lyBWL6plX 0yQVbkVCBHVRfhGNnIHfJOK7QcqaBu+BjXd/si5SaMKyhBdz0fTjv+w0KCdTlxAScWnmqorI3fB m X-Gm-Gg: ASbGncu2N/n8fCE0gOCgETV0/UCpPoOAep7S4Oax8FKiHDE4ih/DzigH6daJCjJind5 Gz8aC+FbhIiQq2Ucodl/7Gzyq/0EFeOFbp+hl+quZJDbdJXNEmrXAAXBq+07LUr3eJssggdTniw qIXgWFaVvhH5khK2h4MD7M/ekfVvKi/sy4JlS2hZdy1+A678igIynF4gedF2xAsZhB04D0ZD1p1 UcqczBfutkR+Fg5DLYIcgqMnZZKVamZy4El8xG4I5WEpFtNKM1yPx6aP4hYyHLV8fFySQvJGQvX hBZV3AVicy4MLuWJ3WdFNUFSEFrNrN6rYXbfOs2mfG5S/krCiNl9270i9LuBLczMW1zYAFF+qai + X-Google-Smtp-Source: AGHT+IGKln9yoGyodt3HmCRhtcaK5NUv/CYAHNrkFi8lHxE7RjRsF+/xZbrYCbc2OijI4MOYee4YqQ== X-Received: by 2002:a05:6a00:8d2:b0:736:46b4:beef with SMTP id d2e1a72fcca58-736eb7b36d9mr15103299b3a.3.1741837540096; Wed, 12 Mar 2025 20:45:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 17/37] meson: Introduce top-level libuser_ss and libsystem_ss Date: Wed, 12 Mar 2025 20:44:57 -0700 Message-ID: <20250313034524.3069690-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837618610019100 Content-Type: text/plain; charset="utf-8" We already have two subdirectories for which we need to build files twice, for user vs system modes. Move this handling to the top level. This cannot be combined with user_ss or system_ss, because the formulation has not been extended to support configuration symbols. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- gdbstub/meson.build | 32 ++++++++------------------------ meson.build | 22 ++++++++++++++++++++++ tcg/meson.build | 23 ++--------------------- 3 files changed, 32 insertions(+), 45 deletions(-) diff --git a/gdbstub/meson.build b/gdbstub/meson.build index dff741ddd4..0e8099ae9c 100644 --- a/gdbstub/meson.build +++ b/gdbstub/meson.build @@ -4,32 +4,16 @@ # types such as hwaddr. # =20 -# We need to build the core gdb code via a library to be able to tweak -# cflags so: - -gdb_user_ss =3D ss.source_set() -gdb_system_ss =3D ss.source_set() - # We build two versions of gdbstub, one for each mode -gdb_user_ss.add(files('gdbstub.c', 'user.c')) -gdb_system_ss.add(files('gdbstub.c', 'system.c')) +libuser_ss.add(files( + 'gdbstub.c', + 'user.c' +)) =20 -gdb_user_ss =3D gdb_user_ss.apply({}) -gdb_system_ss =3D gdb_system_ss.apply({}) - -libgdb_user =3D static_library('gdb_user', - gdb_user_ss.sources() + genh, - c_args: '-DCONFIG_USER_ONLY', - build_by_default: false) - -libgdb_system =3D static_library('gdb_system', - gdb_system_ss.sources() + genh, - build_by_default: false) - -gdb_user =3D declare_dependency(objects: libgdb_user.extract_all_objects(r= ecursive: false)) -user_ss.add(gdb_user) -gdb_system =3D declare_dependency(objects: libgdb_system.extract_all_objec= ts(recursive: false)) -system_ss.add(gdb_system) +libsystem_ss.add(files( + 'gdbstub.c', + 'system.c' +)) =20 common_ss.add(files('syscalls.c')) =20 diff --git a/meson.build b/meson.build index 9d9c11731f..3869e5bfbc 100644 --- a/meson.build +++ b/meson.build @@ -3655,12 +3655,14 @@ io_ss =3D ss.source_set() qmp_ss =3D ss.source_set() qom_ss =3D ss.source_set() system_ss =3D ss.source_set() +libsystem_ss =3D ss.source_set() specific_fuzz_ss =3D ss.source_set() specific_ss =3D ss.source_set() rust_devices_ss =3D ss.source_set() stub_ss =3D ss.source_set() trace_ss =3D ss.source_set() user_ss =3D ss.source_set() +libuser_ss =3D ss.source_set() util_ss =3D ss.source_set() =20 # accel modules @@ -4038,6 +4040,26 @@ common_ss.add(qom, qemuutil) common_ss.add_all(when: 'CONFIG_SYSTEM_ONLY', if_true: [system_ss]) common_ss.add_all(when: 'CONFIG_USER_ONLY', if_true: user_ss) =20 +libuser_ss =3D libuser_ss.apply({}) +libuser =3D static_library('user', + libuser_ss.sources() + genh, + c_args: '-DCONFIG_USER_ONLY', + dependencies: libuser_ss.dependencies(), + build_by_default: false) +libuser =3D declare_dependency(objects: libuser.extract_all_objects(recurs= ive: false), + dependencies: libuser_ss.dependencies()) +common_ss.add(when: 'CONFIG_USER_ONLY', if_true: libuser) + +libsystem_ss =3D libsystem_ss.apply({}) +libsystem =3D static_library('system', + libsystem_ss.sources() + genh, + c_args: '-DCONFIG_SOFTMMU', + dependencies: libsystem_ss.dependencies(), + build_by_default: false) +libsystem =3D declare_dependency(objects: libsystem.extract_all_objects(re= cursive: false), + dependencies: libsystem_ss.dependencies()) +common_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_true: libsystem) + # Note that this library is never used directly (only through extract_obje= cts) # and is not built by default; therefore, source files not used by the bui= ld # configuration will be in build.ninja, but are never built by default. diff --git a/tcg/meson.build b/tcg/meson.build index 69ebb4908a..7df378d773 100644 --- a/tcg/meson.build +++ b/tcg/meson.build @@ -27,24 +27,5 @@ if host_os =3D=3D 'linux' tcg_ss.add(files('perf.c')) endif =20 -tcg_ss =3D tcg_ss.apply({}) - -libtcg_user =3D static_library('tcg_user', - tcg_ss.sources() + genh, - dependencies: tcg_ss.dependencies(), - c_args: '-DCONFIG_USER_ONLY', - build_by_default: false) - -tcg_user =3D declare_dependency(objects: libtcg_user.extract_all_objects(r= ecursive: false), - dependencies: tcg_ss.dependencies()) -user_ss.add(tcg_user) - -libtcg_system =3D static_library('tcg_system', - tcg_ss.sources() + genh, - dependencies: tcg_ss.dependencies(), - c_args: '-DCONFIG_SOFTMMU', - build_by_default: false) - -tcg_system =3D declare_dependency(objects: libtcg_system.extract_all_objec= ts(recursive: false), - dependencies: tcg_ss.dependencies()) -system_ss.add(tcg_system) +libuser_ss.add_all(tcg_ss) +libsystem_ss.add_all(tcg_ss) --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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This file uses semihosting/semihost.h, which has separate implementations with and without CONFIG_USER_ONLY. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- gdbstub/meson.build | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gdbstub/meson.build b/gdbstub/meson.build index 0e8099ae9c..b25db86767 100644 --- a/gdbstub/meson.build +++ b/gdbstub/meson.build @@ -7,15 +7,15 @@ # We build two versions of gdbstub, one for each mode libuser_ss.add(files( 'gdbstub.c', + 'syscalls.c', 'user.c' )) =20 libsystem_ss.add(files( 'gdbstub.c', + 'syscalls.c', 'system.c' )) =20 -common_ss.add(files('syscalls.c')) - # The user-target is specialised by the guest specific_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-target.c')) --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837684; cv=none; d=zohomail.com; s=zohoarc; b=N0G3WADpJyH9TyVlGm+hSY+m6j9QMfACU5bKMBWzsD3yN+kZ7A83Pz7EFpzD3Gt8E2N83XjOXYSFnqUgs8mno3/2/WOjeQjGwG4FencAyET30+bQAQrUuGuzRxF+mwTbTLl00lQrc8Gtmf6ZPSIoWUcl8cvvKvcH6/KPbo3XOJI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837684; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=QKRbj+5MK3zl/OCfvVEBbhsEyjSkzG8m6y3RQx2tpyU=; b=i7WZSlyDu/TLdZESolkGN00/l8jTDsa0msd5akBWF9WFTuzHS5VYO1q9mj9vjRCmOGnt/tSc8nG8+a5wAkYP9KAx28pkUHT+cE1IAXYTVLhRi7D2Hu0liUxZ6moA7AWtW9DGu2cPne9TzEZhdqdhUk1LDOsVOBXUQifxTkTDjdg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741837684696640.9126987646283; Wed, 12 Mar 2025 20:48:04 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWD-0004gk-Lb; Wed, 12 Mar 2025 23:46:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZW8-0004fP-2z for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:45:56 -0400 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZVv-0007nG-N4 for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:45:55 -0400 Received: by mail-pj1-x1030.google.com with SMTP id 98e67ed59e1d1-2f9d3d0f55dso936444a91.1 for ; Wed, 12 Mar 2025 20:45:43 -0700 (PDT) Received: from stoup.. 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So make use of the common infrastructure to allow that. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- accel/tcg/meson.build | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build index 185830d0f5..72d4acfe5e 100644 --- a/accel/tcg/meson.build +++ b/accel/tcg/meson.build @@ -1,12 +1,21 @@ -common_ss.add(when: 'CONFIG_TCG', if_true: files( +if not get_option('tcg').allowed() + subdir_done() +endif + +tcg_ss =3D ss.source_set() + +tcg_ss.add(files( 'cpu-exec-common.c', 'tcg-runtime.c', 'tcg-runtime-gvec.c', )) if get_option('plugins') - common_ss.add(when: 'CONFIG_TCG', if_true: files('plugin-gen.c')) + tcg_ss.add(files('plugin-gen.c')) endif =20 +libuser_ss.add_all(tcg_ss) +libsystem_ss.add_all(tcg_ss) + tcg_specific_ss =3D ss.source_set() tcg_specific_ss.add(files( 'tcg-all.c', @@ -22,11 +31,11 @@ specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TC= G'], if_true: files( 'cputlb.c', )) =20 -user_ss.add(when: ['CONFIG_TCG'], if_true: files( +libuser_ss.add(files( 'user-exec-stub.c', )) =20 -system_ss.add(when: ['CONFIG_TCG'], if_true: files( +libsystem_ss.add(files( 'icount-common.c', 'monitor.c', 'tcg-accel-ops.c', --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837722; cv=none; d=zohomail.com; s=zohoarc; b=hFkCKpV0GJiSWvpCqv+ScaEYUppAx7QCk8ZnTxwygmVkiumi38AHy17oIBcVWE/no7MlyQT8Q8GXelnCCoZivPmSRvGo8eHPZyfpMGJLCGBQYYbtF9A7M4NChHjE37UW5koYcnBpfbjwiO0lpSyBRxnEWdlabH9sxiyVDQ7eMm8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837722; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=uDzOujbAgG9mzQExSfzVLdnEwm54eULxBuAHMS75b4s=; b=m79+ehR7Cy7HxrZVWVqSfQG3hPr3mfCqYFF5fGQrfzuM/NjFZi+P8rMyrZbpWb0z9bHWZAnHrNevAerHqh7IlVjvEcHvulrm0Cqq4bOY0OcGqW2g1iIlVIklojHf3yMeTemP8JwLhZm7gWOxwP3z2rmRhfO3lT3gQoHuwSoRN2M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741837722341384.93868193799926; Wed, 12 Mar 2025 20:48:42 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWS-0004m2-4x; Wed, 12 Mar 2025 23:46:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZWC-0004gc-K2 for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:00 -0400 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZVw-0007ne-98 for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:45:57 -0400 Received: by mail-pl1-x62a.google.com with SMTP id d9443c01a7336-22334203781so29536935ad.0 for ; Wed, 12 Mar 2025 20:45:43 -0700 (PDT) Received: from stoup.. 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837542; x=1742442342; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uDzOujbAgG9mzQExSfzVLdnEwm54eULxBuAHMS75b4s=; b=og9cibiK3xfb/8m46tZeymhjpiaCB7ZzngLACF7Ym1IOw42RcRxiZ+0toRCd/F7ZLw Px/8VyqoTwxwsWT1xXpd+ASnmus7wGdRrkdtWWwxoCjT3pCUsc4O7r0tQwuWtSDlas6+ 0KUrEFpNN+mAuC4ndfeWR3+KyKgSPJ408OnXu3kivRs/fFcAO2MOnaBHSejW31Vb04n9 pEBahqa5ogFJ0BlhI7QnhONJxdqCOTuKDoF4PoXbZcnII4hhVvur6dAmX//q2aFZq056 x2KyIMlknTLyxds7/wOwiWV/U7g8f105zLQQw3CnuD1WcAbWWuLS52l+ukmDhWjA+0wX gLJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837542; x=1742442342; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uDzOujbAgG9mzQExSfzVLdnEwm54eULxBuAHMS75b4s=; b=XO1l22OFBMAQCHVdDPPbaAX8IsIvUmv+V1sHCsrR8Fx8eoH7qBWlfx3PepqbSLbdRM xOwwqDyI0obbFZm0s6TxgnALwUmymCYrApFXuLy/ecWoRM5L0m4BHvCVPGwsrl3C+MIs ojYCHFG4sD2i3I/tJ028NygKrHOTr3w9ERamSWcHjLm1yMaaEQoghmJbPsXpMkGXFTfz wWhSOd84GOAAzSyXo5sQ3crWRwTbD0lBXo9TOgcnrB1Sn0RhocuZ3NALRlVFgdfnqwJ2 dBSCwJcLguJ7PWnZmUi5lMcY5NqSNw7458r8l1EXvjF8KrsOmxastubqHQXnVbEjXAK8 j0CA== X-Gm-Message-State: AOJu0YyZdKgTjiiCsP3F8y55jh7zNi5kYfAMRQX37/O4APTS0T/3miHx QIsl5ncI0uL1zBIBTezrLF0uqKjgtNUfS2K/1eB0KFuUM5qrt8KNoqr9A4PhfS5Zx1QGthcYWTk U X-Gm-Gg: ASbGncvUk0zerfS0rhVY9uaGf8MjdKEjcnvt7eS+/DfD+ks8yjin9YU7dtWtGbLwZRY vtGXxZCaWfn/5lIglk6R1+OAtrTfFFKgRgUFc74msfnsC7phr9XZnSsEW65/+gtBZClcmTksQXk ZmalocCRo/AWv5Q2P9i9sLtWSUO59yEtO9HTV6kkUc1nFtfmd8mqfTpwYAY70pbA5VJbfRjFz7d 7SUfM3tAyVrW++4Zv3hVqc6cjDk2VvSuwgk5/ei3gdfk3ZKC1ZSVNKzpaBiNDxu/jZBYXZ6UIGo Yh8B2CWRofiKSw1CPPgVQjtPAmXgT4kCCEuKiVW50DXUIUZ1sld0A4JH7xpBKrikikuVwIc0f1m E X-Google-Smtp-Source: AGHT+IEU+qNHlwFxhQjoFd+k14ruD3W1tCh3b9a8+r6TxW9Rrk51zzPcAVmB11e8W1rWz8pZJx72vQ== X-Received: by 2002:a05:6a00:6993:b0:737:cd8:2484 with SMTP id d2e1a72fcca58-737106f646emr1205616b3a.6.1741837542475; Wed, 12 Mar 2025 20:45:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 20/37] target/mips: Protect semihosting call with CONFIG_SEMIHOSTING Date: Wed, 12 Mar 2025 20:45:00 -0700 Message-ID: <20250313034524.3069690-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837722671019000 Content-Type: text/plain; charset="utf-8" Semihosting is not enabled for user-only. Avoid the test for that case. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- target/mips/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index b207106dd7..1ca182c1a2 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -415,11 +415,12 @@ static void mips_cpu_reset_hold(Object *obj, ResetTyp= e type) restore_pamask(env); cs->exception_index =3D EXCP_NONE; =20 +#ifdef CONFIG_SEMIHOSTING if (semihosting_get_argc()) { /* UHI interface can be used to obtain argc and argv */ env->active_tc.gpr[4] =3D -1; } - +#endif #ifndef CONFIG_USER_ONLY if (kvm_enabled()) { kvm_mips_reset_vcpu(cpu); --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837626; cv=none; d=zohomail.com; s=zohoarc; b=Q+r62MBjODJj0ynjmkdDHJ1uo9QUMIRDwCsVFOxHYoiRPn8vkHfyBXLU3MrM7KCzPbLZH7GnUN/JeDqfzWX7QVKbrL70/DL/jRHQj1y7wo5pTiVFMa38MTkkFjO5TfI3qdYXuMDkT77sFaRHjNdBd5sjQnXYD75KfbpLeQWT7Q0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837626; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=CzbzPzlNd+PWpDZmz+vRGOcXw51DO2ZIhjrLL9kjlLw=; b=nzDlaHT/KRe1/vweqDmIfbLRSTZTM+gqjT2Iga1q+1VsgaMlTAFZ/gXxasLFd0dra9SjvF26HjVlBaGcmX99sLhI85rHchwFF9sKtZXszahfzdml2gM3+OXEElt7A/HUG/0bOZvY2tgEWDiexq506XB7Ys2YpvvBTuHefcFs770= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741837626803680.4946166382115; Wed, 12 Mar 2025 20:47:06 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWR-0004jY-Dp; Wed, 12 Mar 2025 23:46:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZW8-0004gJ-Vm for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:45:57 -0400 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZVz-0007ns-5z for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:45:56 -0400 Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-223959039f4so9368705ad.3 for ; Wed, 12 Mar 2025 20:45:44 -0700 (PDT) Received: from stoup.. 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837543; x=1742442343; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CzbzPzlNd+PWpDZmz+vRGOcXw51DO2ZIhjrLL9kjlLw=; b=FhPJKs62CSks1DSO9MNQ/0zGmlhc9nWLPFqbbWqkx/w1jf/GKNXoOcxZd/TufEFWAR iTq56eoDVjuoVg8MvxLn+EDNFwdPwWI37Lv4wpRyhaJ+I4abioc/332LcriFxemQc5Kf OiXcaKcJkQWwGrYseMXaM669jKfsTkVH1oDcuZ0dY/uRuyk2m9gOIA4S0vhoPl3DaNlT wtmbU+GkLI9vvkbQ2fQ9dodQ6S0K0SDh73gGLi75hgVfLuFEHjiv/vTQJ0lUioEYjbe/ 8/S5aMLTOittkJlDFKH2N3WHrK/UWWpzcjEsrGlYVpD0X0SzsasfldIQqlUUhn3QIzKe VdRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837543; x=1742442343; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CzbzPzlNd+PWpDZmz+vRGOcXw51DO2ZIhjrLL9kjlLw=; b=VoNWrnKEXw89PFmojo5f9eAcogXKnmJ7L/T6GLCiKMdJHGo3H6Z6qdZVXoxgRJm8vZ US4so4/9Inw4CP7KcDnIvffFEXeiOdiGu0a31Fwm8dN1lwNOJnESmE0lJdAzGyNSw7pM OYHGf1SuhT6iXKjzyY+IxQ2LN5nctUh6Nr4Ae8wXltoZisAnKXYp3JGtq7YPjRfyjQzu vxZqfLH8VyjCLWVD6bnDlAjwYzxAe03sjuYNH5kGcYOfwUSIObrqEL5ohPLX2eHg6FHD 7S4KNo/IPrUskkEw1wefZGSwEws0qsMaXpSvtyVezXa41gKRak4froZj0MfyrgWFhbBa PouQ== X-Gm-Message-State: AOJu0YyItmNEJwwopX9p+VuzsDqLdcrY7mh3V6hDRCDbDl5UhJTlTCwU nYz/wjqL3hz3cqIEFm4OuiB6XmCJzcZuSnPT0q2z4Q2bNuE26IrxH1+GHMsY6VROWsWl0eLPj5V D X-Gm-Gg: ASbGnctT2NV8HGBsaEw2ofG+ZJWPd7UayBZaN8hEWE6qXK/cAKxzDvyykvEYZHThceA HRF66h+dTqJzfTvm69fg2UXX2rk0Sxm+8RkQsSe+9WDUGxEs/q0UwXAq+6YUvhTRboFFLsXLTtX WkgsYb9X84gqDzHyFIaC/g+ukqTszfPv0vOrD5HhPwasyU1XrY47oTv73pBBlgEIJSHiuqvVvzF coH0MjjzBKM4TPp9ksJYp3OXdS31fnwDGQg+YwGzPir+QUEaVW/SbdSUGQBYJk+nQpZU34JByYs FpVxlPuTuWiWq65qNt33I1cDSJxVp2uzDQ17tzE1yZ494LgdMmQhtLbmvQWMNIt57inL98ojBqa d X-Google-Smtp-Source: AGHT+IG2ofcjK7KBPizXvoScrKlHtc3ulAh9SUibvAZ9MWd25ndTVl9NyLgZbR6CU3jYJMb0VskEnQ== X-Received: by 2002:a05:6a00:8285:b0:736:fff2:9ac with SMTP id d2e1a72fcca58-736fff20bf3mr5140582b3a.23.1741837543271; Wed, 12 Mar 2025 20:45:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 21/37] target/xtensa: Protect semihosting call with CONFIG_SEMIHOSTING Date: Wed, 12 Mar 2025 20:45:01 -0700 Message-ID: <20250313034524.3069690-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837628307019000 Content-Type: text/plain; charset="utf-8" Semihosting is not enabled for user-only. Avoid the test for that case. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- target/xtensa/translate.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 4f02cefde3..d13d05878e 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -2241,13 +2241,16 @@ static uint32_t test_exceptions_simcall(DisasContex= t *dc, const OpcodeArg arg[], const uint32_t par[]) { - bool is_semi =3D semihosting_enabled(dc->cring !=3D 0); -#ifdef CONFIG_USER_ONLY - bool ill =3D true; -#else + bool ill =3D true, is_semi =3D false; + +#ifndef CONFIG_USER_ONLY /* Between RE.2 and RE.3 simcall opcode's become nop for the hardware.= */ - bool ill =3D dc->config->hw_version <=3D 250002 && !is_semi; + ill =3D dc->config->hw_version <=3D 250002 && !is_semi; #endif +#ifdef CONFIG_SEMIHOSTING + is_semi =3D semihosting_enabled(dc->cring !=3D 0); +#endif + if (ill || !is_semi) { qemu_log_mask(LOG_GUEST_ERROR, "SIMCALL but semihosting is disable= d\n"); } --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837976; cv=none; d=zohomail.com; s=zohoarc; b=avulgkiOi7VBvQNJAnx2SprxiF4tlYDUut2PV2P6GWUhkGTUKnxXh3rzPYoFC7rT//1XO99MeE8F0q/I6X+nZ/d97ZfVz9t1SZ7qVZjo5yX7FvAQIuh6Yi9FwBodpZbteE1EUsicJ2AfQ7rWGO/U33+B3Nn5QeRS7/BKb1HfINk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837976; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=NPMqV5ZrxescUBAWokXjuel9hAvYVjYaAdlujGAXfkU=; b=abvnO5gxTblw2ELYpDnokLdmrRyY73JqE7ZC1jo66/6D2gMlVf+d5uEnu0FMXODkrHqZMLpHwG9icqneyxYZ6yR8UXxIodqN3EhH/iaxqu4CizzD1Uj9tXtxGg+Nctew3j+C6i4f9twk5POinGN3fpKTIP8KOdmfay2Scsyzd4Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17418379765371017.0999993110423; Wed, 12 Mar 2025 20:52:56 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWU-0004mB-46; Wed, 12 Mar 2025 23:46:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZWC-0004ga-IM for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:00 -0400 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZVy-0007nx-Mu for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:00 -0400 Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-22401f4d35aso9395915ad.2 for ; Wed, 12 Mar 2025 20:45:46 -0700 (PDT) Received: from stoup.. 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Signed-off-by: Richard Henderson --- include/semihosting/semihost.h | 29 ++--------------------------- semihosting/user.c | 30 ++++++++++++++++++++++++++++++ semihosting/meson.build | 2 ++ 3 files changed, 34 insertions(+), 27 deletions(-) create mode 100644 semihosting/user.c diff --git a/include/semihosting/semihost.h b/include/semihosting/semihost.h index 97d2a2ba99..b03e637578 100644 --- a/include/semihosting/semihost.h +++ b/include/semihosting/semihost.h @@ -26,32 +26,6 @@ typedef enum SemihostingTarget { SEMIHOSTING_TARGET_GDB } SemihostingTarget; =20 -#ifdef CONFIG_USER_ONLY -static inline bool semihosting_enabled(bool is_user) -{ - return true; -} - -static inline SemihostingTarget semihosting_get_target(void) -{ - return SEMIHOSTING_TARGET_AUTO; -} - -static inline const char *semihosting_get_arg(int i) -{ - return NULL; -} - -static inline int semihosting_get_argc(void) -{ - return 0; -} - -static inline const char *semihosting_get_cmdline(void) -{ - return NULL; -} -#else /* !CONFIG_USER_ONLY */ /** * semihosting_enabled: * @is_user: true if guest code is in usermode (i.e. not privileged) @@ -59,17 +33,18 @@ static inline const char *semihosting_get_cmdline(void) * Return true if guest code is allowed to make semihosting calls. */ bool semihosting_enabled(bool is_user); + SemihostingTarget semihosting_get_target(void); const char *semihosting_get_arg(int i); int semihosting_get_argc(void); const char *semihosting_get_cmdline(void); void semihosting_arg_fallback(const char *file, const char *cmd); + /* for vl.c hooks */ void qemu_semihosting_enable(void); int qemu_semihosting_config_options(const char *optstr); void qemu_semihosting_chardev_init(void); void qemu_semihosting_console_init(Chardev *); -#endif /* CONFIG_USER_ONLY */ void qemu_semihosting_guestfd_init(void); =20 #endif /* SEMIHOST_H */ diff --git a/semihosting/user.c b/semihosting/user.c new file mode 100644 index 0000000000..f5b500493b --- /dev/null +++ b/semihosting/user.c @@ -0,0 +1,30 @@ +/* + * Semihosting for user emulation + * + * Copyright (c) 2019 Linaro Ltd + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "semihosting/semihost.h" + +bool semihosting_enabled(bool is_user) +{ + return true; +} + +const char *semihosting_get_arg(int i) +{ + return NULL; +} + +int semihosting_get_argc(void) +{ + return 0; +} + +const char *semihosting_get_cmdline(void) +{ + return NULL; +} diff --git a/semihosting/meson.build b/semihosting/meson.build index 86f5004bed..ab67f87e4f 100644 --- a/semihosting/meson.build +++ b/semihosting/meson.build @@ -15,5 +15,7 @@ system_ss.add(when: ['CONFIG_SEMIHOSTING'], if_true: file= s( 'stubs-system.c', )) =20 +user_ss.add(when: 'CONFIG_SEMIHOSTING', if_true: files('user.c')) + specific_ss.add(when: ['CONFIG_ARM_COMPATIBLE_SEMIHOSTING'], if_true: files('arm-compat-semi.c')) --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741838122; cv=none; d=zohomail.com; s=zohoarc; b=OpofVKYpaM0qWxsDPqNKCmaSOnYxzk7ojDeiFJRN52tnFdKX/TrUvh+ZE73lFVXyM1Lea3dRVcoW8wzXjOeD5R7cgDTEm1Nl3WEgQdzsEYvz0SO8lnCnmORiEeuorB785RU8u3yoOuA1Z790bw18Jj9JlZhdcMXXvwrMamZmGcc= ARC-Message-Signature: i=1; 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Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/{exec =3D> system}/ram_addr.h | 7 +++---- accel/kvm/kvm-all.c | 2 +- accel/tcg/cputlb.c | 2 +- accel/tcg/translate-all.c | 2 +- hw/ppc/spapr.c | 2 +- hw/ppc/spapr_caps.c | 2 +- hw/ppc/spapr_pci.c | 2 +- hw/remote/memory.c | 2 +- hw/remote/proxy-memory-listener.c | 2 +- hw/s390x/s390-stattrib-kvm.c | 2 +- hw/s390x/s390-stattrib.c | 2 +- hw/s390x/s390-virtio-ccw.c | 2 +- hw/vfio/common.c | 2 +- hw/vfio/container.c | 2 +- hw/vfio/iommufd.c | 2 +- hw/vfio/migration.c | 2 +- hw/vfio/spapr.c | 2 +- hw/virtio/virtio-mem.c | 2 +- migration/ram.c | 2 +- system/memory.c | 2 +- system/physmem.c | 2 +- target/arm/tcg/mte_helper.c | 2 +- target/ppc/kvm.c | 2 +- target/s390x/kvm/kvm.c | 2 +- MAINTAINERS | 2 +- 25 files changed, 27 insertions(+), 28 deletions(-) rename include/{exec =3D> system}/ram_addr.h (99%) diff --git a/include/exec/ram_addr.h b/include/system/ram_addr.h similarity index 99% rename from include/exec/ram_addr.h rename to include/system/ram_addr.h index 3d8df4edf1..65f8f37b2a 100644 --- a/include/exec/ram_addr.h +++ b/include/system/ram_addr.h @@ -16,10 +16,9 @@ * The functions declared here will be removed soon. */ =20 -#ifndef RAM_ADDR_H -#define RAM_ADDR_H +#ifndef SYSTEM_RAM_ADDR_H +#define SYSTEM_RAM_ADDR_H =20 -#ifndef CONFIG_USER_ONLY #include "cpu.h" #include "system/xen.h" #include "system/tcg.h" @@ -557,5 +556,5 @@ uint64_t cpu_physical_memory_sync_dirty_bitmap(RAMBlock= *rb, =20 return num_dirty; } -#endif + #endif diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 0d47bb0d9b..0723a3933b 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -34,7 +34,7 @@ #include "system/accel-blocker.h" #include "qemu/bswap.h" #include "system/memory.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "qemu/event_notifier.h" #include "qemu/main-loop.h" #include "trace.h" diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 6f0ea9067b..134e523cab 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -27,7 +27,7 @@ #include "exec/cputlb.h" #include "exec/tb-flush.h" #include "exec/memory-internal.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "exec/mmu-access-type.h" #include "exec/tlb-common.h" #include "exec/vaddr.h" diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 16e5043597..167535bcb1 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -40,7 +40,7 @@ #endif #endif #else -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #endif =20 #include "exec/cputlb.h" diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index c15340a58d..e31bc0f0f3 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -74,7 +74,7 @@ #include "hw/virtio/virtio-scsi.h" #include "hw/virtio/vhost-scsi-common.h" =20 -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "system/confidential-guest-support.h" #include "hw/usb.h" #include "qemu/config-file.h" diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 904bff87ce..fb010bd215 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -27,7 +27,7 @@ #include "qapi/error.h" #include "qapi/visitor.h" #include "system/hw_accel.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "target/ppc/cpu.h" #include "target/ppc/mmu-hash64.h" #include "cpu-models.h" diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index e0a9d50edc..384269b831 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -34,7 +34,7 @@ #include "hw/pci/pci_host.h" #include "hw/ppc/spapr.h" #include "hw/pci-host/spapr.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include #include "trace.h" #include "qemu/error-report.h" diff --git a/hw/remote/memory.c b/hw/remote/memory.c index 6d60da91e0..00193a552f 100644 --- a/hw/remote/memory.c +++ b/hw/remote/memory.c @@ -11,7 +11,7 @@ #include "qemu/osdep.h" =20 #include "hw/remote/memory.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "qapi/error.h" =20 static void remote_sysmem_reset(void) diff --git a/hw/remote/proxy-memory-listener.c b/hw/remote/proxy-memory-lis= tener.c index ce7f5b9bfb..30ac74961d 100644 --- a/hw/remote/proxy-memory-listener.c +++ b/hw/remote/proxy-memory-listener.c @@ -12,7 +12,7 @@ #include "qemu/range.h" #include "system/memory.h" #include "exec/cpu-common.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "hw/remote/mpqemu-link.h" diff --git a/hw/s390x/s390-stattrib-kvm.c b/hw/s390x/s390-stattrib-kvm.c index 2a8e31718b..f5695b0e53 100644 --- a/hw/s390x/s390-stattrib-kvm.c +++ b/hw/s390x/s390-stattrib-kvm.c @@ -16,7 +16,7 @@ #include "qemu/error-report.h" #include "system/kvm.h" #include "system/memory_mapping.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "kvm/kvm_s390x.h" #include "qapi/error.h" =20 diff --git a/hw/s390x/s390-stattrib.c b/hw/s390x/s390-stattrib.c index be07c28c6e..d95b58a8a8 100644 --- a/hw/s390x/s390-stattrib.c +++ b/hw/s390x/s390-stattrib.c @@ -16,7 +16,7 @@ #include "hw/qdev-properties.h" #include "hw/s390x/storage-attributes.h" #include "qemu/error-report.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "qapi/error.h" #include "qobject/qdict.h" #include "cpu.h" diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index a9b3db19f6..d284b1c7d2 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -13,7 +13,7 @@ =20 #include "qemu/osdep.h" #include "qapi/error.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "system/confidential-guest-support.h" #include "hw/boards.h" #include "hw/s390x/sclp.h" diff --git a/hw/vfio/common.c b/hw/vfio/common.c index 5c3bc88222..f2d30cb06e 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -29,7 +29,7 @@ #include "hw/vfio/pci.h" #include "system/address-spaces.h" #include "system/memory.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "hw/hw.h" #include "qemu/error-report.h" #include "qemu/main-loop.h" diff --git a/hw/vfio/container.c b/hw/vfio/container.c index 2e993c7e73..812d5edbcf 100644 --- a/hw/vfio/container.c +++ b/hw/vfio/container.c @@ -25,7 +25,7 @@ #include "hw/vfio/vfio-common.h" #include "system/address-spaces.h" #include "system/memory.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "qemu/error-report.h" #include "qemu/range.h" #include "system/reset.h" diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c index df61edffc0..ec323fa32b 100644 --- a/hw/vfio/iommufd.c +++ b/hw/vfio/iommufd.c @@ -25,7 +25,7 @@ #include "qemu/cutils.h" #include "qemu/chardev_open.h" #include "pci.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" =20 static int iommufd_cdev_map(const VFIOContainerBase *bcontainer, hwaddr io= va, ram_addr_t size, void *vaddr, bool readonly) diff --git a/hw/vfio/migration.c b/hw/vfio/migration.c index 416643ddd6..273618c7e0 100644 --- a/hw/vfio/migration.c +++ b/hw/vfio/migration.c @@ -27,7 +27,7 @@ #include "qapi/error.h" #include "qapi/qapi-events-vfio.h" #include "exec/ramlist.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "pci.h" #include "trace.h" #include "hw/hw.h" diff --git a/hw/vfio/spapr.c b/hw/vfio/spapr.c index bc00badb34..3c9a4385a2 100644 --- a/hw/vfio/spapr.c +++ b/hw/vfio/spapr.c @@ -19,7 +19,7 @@ =20 #include "hw/vfio/vfio-common.h" #include "hw/hw.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "qemu/error-report.h" #include "qapi/error.h" #include "trace.h" diff --git a/hw/virtio/virtio-mem.c b/hw/virtio/virtio-mem.c index 7b140add76..f6c9aca291 100644 --- a/hw/virtio/virtio-mem.c +++ b/hw/virtio/virtio-mem.c @@ -24,7 +24,7 @@ #include "hw/virtio/virtio-mem.h" #include "qapi/error.h" #include "qapi/visitor.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "migration/misc.h" #include "hw/boards.h" #include "hw/qdev-properties.h" diff --git a/migration/ram.c b/migration/ram.c index 424df6d9f1..6295f675df 100644 --- a/migration/ram.c +++ b/migration/ram.c @@ -48,7 +48,7 @@ #include "qapi/qapi-commands-migration.h" #include "qapi/qmp/qerror.h" #include "trace.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "exec/target_page.h" #include "qemu/rcu_queue.h" #include "migration/colo.h" diff --git a/system/memory.c b/system/memory.c index 050bffdbf8..faddcbfd8a 100644 --- a/system/memory.c +++ b/system/memory.c @@ -26,7 +26,7 @@ #include "trace.h" =20 #include "exec/memory-internal.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "system/kvm.h" #include "system/runstate.h" #include "system/tcg.h" diff --git a/system/physmem.c b/system/physmem.c index 2850e14780..765d195cb0 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -67,7 +67,7 @@ #include "system/replay.h" =20 #include "exec/memory-internal.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" =20 #include "qemu/pmem.h" =20 diff --git a/target/arm/tcg/mte_helper.c b/target/arm/tcg/mte_helper.c index 5d6d8a17ae..80164a8050 100644 --- a/target/arm/tcg/mte_helper.c +++ b/target/arm/tcg/mte_helper.c @@ -27,7 +27,7 @@ #include "user/cpu_loop.h" #include "user/page-protection.h" #else -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #endif #include "exec/cpu_ldst.h" #include "exec/helper-proto.h" diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 216638dee4..4e2663e3f1 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -41,7 +41,7 @@ #include "trace.h" #include "gdbstub/enums.h" #include "exec/memattrs.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "system/hostmem.h" #include "qemu/cutils.h" #include "qemu/main-loop.h" diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c index 4d56e653dd..b9f1422197 100644 --- a/target/s390x/kvm/kvm.c +++ b/target/s390x/kvm/kvm.c @@ -41,7 +41,7 @@ #include "system/runstate.h" #include "system/device_tree.h" #include "gdbstub/enums.h" -#include "exec/ram_addr.h" +#include "system/ram_addr.h" #include "trace.h" #include "hw/s390x/s390-pci-inst.h" #include "hw/s390x/s390-pci-bus.h" diff --git a/MAINTAINERS b/MAINTAINERS index 751d611613..2cc0b54ec4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3110,7 +3110,7 @@ S: Supported F: include/system/ioport.h F: include/exec/memop.h F: include/system/memory.h -F: include/exec/ram_addr.h +F: include/system/ram_addr.h F: include/exec/ramblock.h F: include/system/memory_mapping.h F: system/dma-helpers.c --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837546; x=1742442346; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PsjMy5lcZ0oWARq4nJr2i4kwj0kpFaIrAOqFSC65xXY=; b=aXV9u1NPz96Bp1u5m02f6YZSBQJnkh6fUKT5KdeduY1l9iJX/QdDHXibwHUnBUqdFG jPDp1C+ZSHLj/Zf3IVS4h1m1r8K0Sw+X7eNkILIpJW/4P4k88gjEDtswTnYZZaN8s7R1 xZai5CEfzmp/UvXBZutaXtbXy1HkPLCTHxxlkEwRnLpMDa9XjYinUPTvkefMBNq3jbrP 1MVv6YvXk3tnHDSJqLLu3f5stf0x4fGw6i+Eb9TU8Rd2f5h9bB1EVzyQ9Vkq//aQXtFf 37SUrvGTqwpZsVS73AcKcn/+InGIvpFh9hz0UnXmQzQLCyudxErJIFqFnKKG78H8pyrQ x/Zg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837546; x=1742442346; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PsjMy5lcZ0oWARq4nJr2i4kwj0kpFaIrAOqFSC65xXY=; b=D3nAVUHTvistwb4fJH92nT9FyNVjqOzX3gWRcHP6EnlqSPs6rFFd0Bwh9acyFEFvRv k4wP/6h1qm5Kx3eskskYRCpOkIOj6HWwyc/dhEMq9oxtsW2ftDb8VdakyIGBPHBupgsX 4LTWF9uGomHI5k0hykMgTxyFvPEKFrq+1+khSBxSNneBuiUJyd3yATXpoFV81x3bAHnb KM4aN00lJx/wUYadsIxxiHpWavr8NHMuvYL7JLXYFZg0+lVza6pBfYMR5UKYondyaDtg L2O1i9alcLHQbHGz0dG2f7XfbJP3fORmyyp8Aa56/mMi7rPVfjmXKfAxZyG5RxiPT6v/ 8p0A== X-Gm-Message-State: AOJu0Yw/yDKG9bIJgGnfT7hrF59v/eza81YgDfURM5ZqVZEZXpKOlsqq 5R5r9QUtZeVdz3KHY4Pi1MnnCgbBUn98hRBBDP9//6YVnjE3aJtbYHTDxuyJpcla1OEqv2afQ+l E X-Gm-Gg: ASbGncsDtVaKLo6ZTvr0EeiBNUKSkJSk2LlzF1bxEQW0MeNHHpXnN6t/pAjmFpJtrQ6 hbNN3Yvi5Giz6/oV6x4/8wCmCw+Z5+pSO4hDvT4I38PW27D65fnftGYZyGgagd80Ag5SNn/KxVa GR8cFxQiTVJ03ByEUVYpHt1dmpZQiazVxvlnTJd5+A942gVdPhiSSLIk2ULhlGa2yksOYEI/5pO myQ36+MCq8ZEm9N92kUwOErgqamci51B4+f9AXVAsVVz4uxm6W9hXIi5o5Za8/nMF0tKus/LkHt XzoPgxnyknJ5BIZf1lH5abW0CDoI9Jvin3xBYQ864v1ROtGjiHHuHynW60AC++CKjt98H6MD9AM NP8zVb707pKU= X-Google-Smtp-Source: AGHT+IGbhDokIuIPdNFMGIYXGH9mKpupRDjFL64QMp9nvEuHD22ZfSWSHbttqASG9BWNgGk3z+lBNg== X-Received: by 2002:a05:6a00:4f90:b0:736:4a5b:7f08 with SMTP id d2e1a72fcca58-736aaae86d4mr30499210b3a.22.1741837545770; Wed, 12 Mar 2025 20:45:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 24/37] include/system: Move exec/ramblock.h to system/ramblock.h Date: Wed, 12 Mar 2025 20:45:04 -0700 Message-ID: <20250313034524.3069690-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837806272019100 Content-Type: text/plain; charset="utf-8" Convert the existing includes with sed. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/system/ram_addr.h | 2 +- include/{exec =3D> system}/ramblock.h | 9 ++++----- hw/display/virtio-gpu-udmabuf.c | 2 +- hw/hyperv/hv-balloon.c | 2 +- hw/virtio/vhost-user.c | 2 +- migration/dirtyrate.c | 2 +- migration/file.c | 2 +- migration/multifd-nocomp.c | 2 +- migration/multifd-qatzip.c | 2 +- migration/multifd-qpl.c | 2 +- migration/multifd-uadk.c | 2 +- migration/multifd-zero-page.c | 2 +- migration/multifd-zlib.c | 2 +- migration/multifd-zstd.c | 2 +- migration/multifd.c | 2 +- migration/postcopy-ram.c | 2 +- tests/qtest/fuzz/generic_fuzz.c | 2 +- MAINTAINERS | 2 +- 18 files changed, 21 insertions(+), 22 deletions(-) rename include/{exec =3D> system}/ramblock.h (96%) diff --git a/include/system/ram_addr.h b/include/system/ram_addr.h index 65f8f37b2a..eceb8fbe4b 100644 --- a/include/system/ram_addr.h +++ b/include/system/ram_addr.h @@ -24,7 +24,7 @@ #include "system/tcg.h" #include "exec/cputlb.h" #include "exec/ramlist.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "exec/exec-all.h" #include "qemu/rcu.h" =20 diff --git a/include/exec/ramblock.h b/include/system/ramblock.h similarity index 96% rename from include/exec/ramblock.h rename to include/system/ramblock.h index 64484cd821..d8a116ba99 100644 --- a/include/exec/ramblock.h +++ b/include/system/ramblock.h @@ -16,11 +16,10 @@ * The functions declared here will be removed soon. */ =20 -#ifndef QEMU_EXEC_RAMBLOCK_H -#define QEMU_EXEC_RAMBLOCK_H +#ifndef SYSTEM_RAMBLOCK_H +#define SYSTEM_RAMBLOCK_H =20 -#ifndef CONFIG_USER_ONLY -#include "cpu-common.h" +#include "exec/cpu-common.h" #include "qemu/rcu.h" #include "exec/ramlist.h" =20 @@ -91,5 +90,5 @@ struct RAMBlock { */ ram_addr_t postcopy_length; }; -#endif + #endif diff --git a/hw/display/virtio-gpu-udmabuf.c b/hw/display/virtio-gpu-udmabu= f.c index 85ca23cb32..0510577475 100644 --- a/hw/display/virtio-gpu-udmabuf.c +++ b/hw/display/virtio-gpu-udmabuf.c @@ -19,7 +19,7 @@ #include "hw/virtio/virtio-gpu.h" #include "hw/virtio/virtio-gpu-pixman.h" #include "trace.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "system/hostmem.h" #include #include diff --git a/hw/hyperv/hv-balloon.c b/hw/hyperv/hv-balloon.c index 0b1da723c8..acabff2c4a 100644 --- a/hw/hyperv/hv-balloon.c +++ b/hw/hyperv/hv-balloon.c @@ -12,7 +12,7 @@ =20 #include "system/address-spaces.h" #include "exec/cpu-common.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "hw/boards.h" #include "hw/hyperv/dynmem-proto.h" #include "hw/hyperv/hv-balloon.h" diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c index 267b612587..48561d3c74 100644 --- a/hw/virtio/vhost-user.c +++ b/hw/virtio/vhost-user.c @@ -28,7 +28,7 @@ #include "system/cryptodev.h" #include "migration/postcopy-ram.h" #include "trace.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" =20 #include #include diff --git a/migration/dirtyrate.c b/migration/dirtyrate.c index 09caf92f87..986624c79a 100644 --- a/migration/dirtyrate.c +++ b/migration/dirtyrate.c @@ -14,7 +14,7 @@ #include "qemu/error-report.h" #include "hw/core/cpu.h" #include "qapi/error.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "exec/target_page.h" #include "qemu/rcu_queue.h" #include "qemu/main-loop.h" diff --git a/migration/file.c b/migration/file.c index 7f11e26f5c..bb8031e3c7 100644 --- a/migration/file.c +++ b/migration/file.c @@ -6,7 +6,7 @@ */ =20 #include "qemu/osdep.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "qemu/cutils.h" #include "qemu/error-report.h" #include "qapi/error.h" diff --git a/migration/multifd-nocomp.c b/migration/multifd-nocomp.c index ffe75256c9..94f248e8a2 100644 --- a/migration/multifd-nocomp.c +++ b/migration/multifd-nocomp.c @@ -11,7 +11,7 @@ */ =20 #include "qemu/osdep.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "exec/target_page.h" #include "file.h" #include "migration-stats.h" diff --git a/migration/multifd-qatzip.c b/migration/multifd-qatzip.c index 6a0e989fae..7419e5dc0d 100644 --- a/migration/multifd-qatzip.c +++ b/migration/multifd-qatzip.c @@ -13,7 +13,7 @@ */ =20 #include "qemu/osdep.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "qapi/qapi-types-migration.h" diff --git a/migration/multifd-qpl.c b/migration/multifd-qpl.c index 88e2344af2..52902eb00c 100644 --- a/migration/multifd-qpl.c +++ b/migration/multifd-qpl.c @@ -14,7 +14,7 @@ #include "qemu/module.h" #include "qapi/error.h" #include "qapi/qapi-types-migration.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "multifd.h" #include "qpl/qpl.h" =20 diff --git a/migration/multifd-uadk.c b/migration/multifd-uadk.c index 6895c1f65a..fd7cd9b5e8 100644 --- a/migration/multifd-uadk.c +++ b/migration/multifd-uadk.c @@ -13,7 +13,7 @@ #include "qemu/osdep.h" #include "qemu/module.h" #include "qapi/error.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "migration.h" #include "multifd.h" #include "options.h" diff --git a/migration/multifd-zero-page.c b/migration/multifd-zero-page.c index f1e988a959..dbc1184921 100644 --- a/migration/multifd-zero-page.c +++ b/migration/multifd-zero-page.c @@ -12,7 +12,7 @@ =20 #include "qemu/osdep.h" #include "qemu/cutils.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "migration.h" #include "migration-stats.h" #include "multifd.h" diff --git a/migration/multifd-zlib.c b/migration/multifd-zlib.c index 8cf8a26bb4..8820b2a787 100644 --- a/migration/multifd-zlib.c +++ b/migration/multifd-zlib.c @@ -13,7 +13,7 @@ #include "qemu/osdep.h" #include #include "qemu/rcu.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "exec/target_page.h" #include "qapi/error.h" #include "migration.h" diff --git a/migration/multifd-zstd.c b/migration/multifd-zstd.c index abed140855..3c2dcf76b0 100644 --- a/migration/multifd-zstd.c +++ b/migration/multifd-zstd.c @@ -13,7 +13,7 @@ #include "qemu/osdep.h" #include #include "qemu/rcu.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "exec/target_page.h" #include "qapi/error.h" #include "migration.h" diff --git a/migration/multifd.c b/migration/multifd.c index dfb5189f0e..86c83e43c0 100644 --- a/migration/multifd.c +++ b/migration/multifd.c @@ -16,7 +16,7 @@ #include "qemu/rcu.h" #include "exec/target_page.h" #include "system/system.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "qemu/error-report.h" #include "qapi/error.h" #include "file.h" diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c index 5d3edfcfec..995614b38c 100644 --- a/migration/postcopy-ram.c +++ b/migration/postcopy-ram.c @@ -31,7 +31,7 @@ #include "qemu/error-report.h" #include "trace.h" #include "hw/boards.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "socket.h" #include "yank_functions.h" #include "tls.h" diff --git a/tests/qtest/fuzz/generic_fuzz.c b/tests/qtest/fuzz/generic_fuz= z.c index 239be9372d..507de74806 100644 --- a/tests/qtest/fuzz/generic_fuzz.c +++ b/tests/qtest/fuzz/generic_fuzz.c @@ -21,7 +21,7 @@ #include "fuzz.h" #include "string.h" #include "system/memory.h" -#include "exec/ramblock.h" +#include "system/ramblock.h" #include "hw/qdev-core.h" #include "hw/pci/pci.h" #include "hw/pci/pci_device.h" diff --git a/MAINTAINERS b/MAINTAINERS index 2cc0b54ec4..212435e302 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3111,7 +3111,7 @@ F: include/system/ioport.h F: include/exec/memop.h F: include/system/memory.h F: include/system/ram_addr.h -F: include/exec/ramblock.h +F: include/system/ramblock.h F: include/system/memory_mapping.h F: system/dma-helpers.c F: system/ioport.c --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837546; x=1742442346; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aK//rMFZS5m/xTF4BT0rTuKgEK3G2LafBMbe8sULGLA=; b=jC5lTGaBczqXxsLMDHm5SmCR/pH5oPwBBpA3c50D7OLUpTzyRBYoxwNxQ0dlyo/dd1 ij/d7jmkrgHy70+8W/We0WwiaET8Tm8FSztXJfwnyGG/U8iGtEjuYHbtUT+dEcz1ALCY 62jnZUmNOtkWwrK8f4p4nwBHlFOoGZ76gx54PGNP93z/zY4F3uYEIyn2zNNvhYBQF8t5 MG5CWkKCDlE8JVmA2cvL7q4XRrLhdUmOn1MT1HNh4ezdoiJudMRZ3b2lGR8+2Iwrdda8 XAthbazNBbjqq9QH5TElsr74IIZw+1S+cBE+WnllFHrXrXQe55nbzFR/+tRQqO3w0zIm gWTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837546; x=1742442346; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aK//rMFZS5m/xTF4BT0rTuKgEK3G2LafBMbe8sULGLA=; b=Y+GGMecYfuIvmXKrx+YB4ivCS4hlaSZwIZlPAjewy0hTFkRv8c/jCc9HvT65xxfGlg uNWnvqblbelm023zcQL3723ovY7cMXFC7V/dnenveE5yzxCPRn/pQtlgO//D0HxtnTVE PRQOZ66Dcr1ueDRty6/hs5B6H4lnF1jQpJ7ctf1X920TIAzRC2CRQ8hF7IzZwm117vee WBPeYDuz9pv6HXfOohphwr5bQ+mp16lv1QTmkw3yxM0ZlQC69QAJ3o3/2iVJB1JDjruC VAlbnvibiiw1niKTtEGQ7yyCOSEoZUal4bhquK8BCmJYlgR7T4UbQk8Zsmgi7DABTyjW fxeQ== X-Gm-Message-State: AOJu0YyDJVDMhNOIm3j5TmCUTOSqxXZ4+o3LLxdyYs6bXpxSQlBlO3RT QN1aQ+vzyJuk7TQJgou3PSgAr0GaPkA9ZvRLxrhHdQDA+kfMKjSFhOh4+zCkAjaB3cGJILCLWbn t X-Gm-Gg: ASbGncsDtVpoO3BwubwB0wCaJbC00yy36g0Dh9Y8DBDTyoQqBHn0JTxAxndwd2631o7 rVKAHPjP4cHNyrWG+u9s7lOn+/iKWrg2mMuwkE1bsDzf4yALNHF1fBmSRkNbGh/lf/wJ7DRmFwl TNH9jdIj/UgIbxXBHEgolzrkwSORTaXEVxfxtkZUNkTOzrYJDVPmjbS34yvqVtRpNMl301Mk4W8 uyd1sTw4xKI8ek/+33cFBtSPNmaJf1iv6jXXDFeY4P1Wqe3o2mrFddTrRqpn42uBuEWt7zD9eyM JRiV+D5yKFKfKXFpqZl6L/onp9Cgwnj3xGUKh045WAiJvkxOZqKCiwWZ9xuYMCEamtkwSDUrFEA T X-Google-Smtp-Source: AGHT+IGhq906jz/uvY1AWRPOwbMBifTyXFWqkHWaSfIHQrBAwAUjVgP0grYuoKfQwURVRLuCtL7VaQ== X-Received: by 2002:a05:6a00:1395:b0:736:476b:fcd3 with SMTP id d2e1a72fcca58-736eb8a2cfemr15070461b3a.24.1741837546508; Wed, 12 Mar 2025 20:45:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 25/37] common-user: Split out watchpoint-stub.c Date: Wed, 12 Mar 2025 20:45:05 -0700 Message-ID: <20250313034524.3069690-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837598321019000 Content-Type: text/plain; charset="utf-8" Uninline the user-only stubs from hw/core/cpu.h. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/hw/core/cpu.h | 23 ----------------------- common-user/watchpoint-stub.c | 28 ++++++++++++++++++++++++++++ common-user/meson.build | 1 + 3 files changed, 29 insertions(+), 23 deletions(-) create mode 100644 common-user/watchpoint-stub.c diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 5d11d26556..2fdb115b19 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1109,35 +1109,12 @@ static inline bool cpu_breakpoint_test(CPUState *cp= u, vaddr pc, int mask) return false; } =20 -#if defined(CONFIG_USER_ONLY) -static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr l= en, - int flags, CPUWatchpoint **watchpo= int) -{ - return -ENOSYS; -} - -static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, - vaddr len, int flags) -{ - return -ENOSYS; -} - -static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu, - CPUWatchpoint *wp) -{ -} - -static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask) -{ -} -#else int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, int flags, CPUWatchpoint **watchpoint); int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len, int flags); void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint= ); void cpu_watchpoint_remove_all(CPUState *cpu, int mask); -#endif =20 /** * cpu_get_address_space: diff --git a/common-user/watchpoint-stub.c b/common-user/watchpoint-stub.c new file mode 100644 index 0000000000..2489fca4f3 --- /dev/null +++ b/common-user/watchpoint-stub.c @@ -0,0 +1,28 @@ +/* + * CPU watchpoint stubs + * + * Copyright (c) 2003 Fabrice Bellard + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#include "qemu/osdep.h" +#include "hw/core/cpu.h" + +int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, + int flags, CPUWatchpoint **watchpoint) +{ + return -ENOSYS; +} + +int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len, int flags) +{ + return -ENOSYS; +} + +void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *wp) +{ +} + +void cpu_watchpoint_remove_all(CPUState *cpu, int mask) +{ +} diff --git a/common-user/meson.build b/common-user/meson.build index ac9de5b9e3..4dba482863 100644 --- a/common-user/meson.build +++ b/common-user/meson.build @@ -7,4 +7,5 @@ common_user_inc +=3D include_directories('host/' / host_arc= h) user_ss.add(files( 'safe-syscall.S', 'safe-syscall-error.c', + 'watchpoint-stub.c', )) --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837833; cv=none; d=zohomail.com; s=zohoarc; b=l+g9K4DsvVExfINL8/6cWQXXwHOwPXyGbi1uihlhAJzcjHgnyVDQ/8eAy3ORbbe/H1GRhNvF290igyRQBk/jxR433rOIRtT2PQjvzWXzUzXY2FAp/eYeZYsW2O2eoL5vo64rWMuL3o6HOsVq3uIbkJDFYcvYm+2nhOtZgrCn0jU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837833; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=eWzBKO1/To0wCT8nmaMy44WaiVDHmmm+TeyiC/0cSSM=; b=LR6ljHyePxNW6UsK5ESa6+iLAvrO6RYWOJ0uf2o2mEnfeyOoa8rvWOrxS/fEIB+rocq2174Y1/Kl87FJ3eBsr4vJIhrFgUJNZNlE8f8tKHGPhWys0eTHxhhTWGwk+88jiNhercdFKYPMw4Bo6/bjeF8yk7H32PaHknd0+Fy52q0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741837833556334.30367900496844; Wed, 12 Mar 2025 20:50:33 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWQ-0004kU-DZ; Wed, 12 Mar 2025 23:46:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZWH-0004hc-FE for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:07 -0400 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZW0-0007od-LP for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:03 -0400 Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-2241053582dso12852075ad.1 for ; Wed, 12 Mar 2025 20:45:48 -0700 (PDT) Received: from stoup.. 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837547; x=1742442347; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eWzBKO1/To0wCT8nmaMy44WaiVDHmmm+TeyiC/0cSSM=; b=Jn83QHQmKzbeHgi60eZcye8J0C6hV+kz/60MJTR/AzCcWswXWe82sH9eQVm79Ps6c3 XZ16lzZGdUXToTTdXUGXClMp1EZhNyqWcxlRMhno01ZJcGDCrb1La5gin4z+5Y57+Ryc VBLhN6mNz5ohqJQCbD4SQtOpwd5+I5uoVYBC+N+yg3SqAibR3QVw7u+up7lRm0y9B8Vf B637rcaXqeN5f/Spxv42GsGjru78AMGqBTpjd3OAe0+/UvwzY/B20xDOkjORv1o/WL1W 0kXp4JNzu3XjN5cbH30IrWHje1PRSYnyYGtMT/g5L89q+Y5zukxL0ZO6SlRJXVIGCMFK hPww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837547; x=1742442347; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eWzBKO1/To0wCT8nmaMy44WaiVDHmmm+TeyiC/0cSSM=; b=lfccvN+upIYwHcSpL4Qt1xEW4a/jCIXdG2evdfmzQ0PYW+wizg6bHibU01+bpS03wP PllU9xP/ZOl/Vg2x5zgPhxZV2JfmUrY0xI4uFAtieSIDqPOZu9KsquwTUrzrmxSnK821 1FYxS+N83Vd39J05PopU/WmCPaQSHHfZ9YWXxrYbGFYwMms1o0YFTShNdOaOl0TvslSO A1ZQeC7Q02BvoBuATUg8ET9zVEi6G1YePEQW/bFUrhvWXKlDt5dXXzoVLd6btcaT9zIv NNyPK2RP2BYREvwT8f5Pf1lphoR5+AGx8lccG0BfZYiRT4TycFkBF5NrH6zm2+2w3ccn kz4g== X-Gm-Message-State: AOJu0Yz4bulcZe/U2AWkM3acgpCs9Ec78I0PK+Ntz/GELAyVoS+pEuLg slpDSrfGxBOos5VF1G2xL9GW/OKdWi1cgtY+h64Y1bBGDRCGBJWqRdlQMKD8AVermQnLGykzX4M u X-Gm-Gg: ASbGncuJR8zEB5NW3jBqe4skKTzepTwEX0UxikkzHGvqwz740MB/GJjVR4aO2W/qMdp Iy0JBTS1qd3GA1XBvOc0zVOmwgoTmxBYsxJbbfB0wydqmMPMyAfNvnY4fAZWAijZ9uGQbS9uLJg AhGcwSoI+Ly4VRa12V7jjk4c4B9FqLu6yheDsTsorgRP0pGKQhQg/NVB9w8uJNVtyVIhTiSBEOJ DLM3QBlbS+qhilpiFQrUOkNrr8bLMk26w1mmR7L/D6mfTRII+C3uvTPKXGq6eJ3/JPH7N+oqaor CM2tc+/zkRWzLnLSWWGtdDVMqbLvFpfjVP97epidfME4ep2sFu4IzhIINVwotTn11r/O8EY7ncw 4 X-Google-Smtp-Source: AGHT+IHuM9nTYXQ78i5GwdOtHpevzF+oRd4E9azon2ZhFkfEm0L0PCFzGrZhWWp38KupVCrt438/KA== X-Received: by 2002:a17:902:e5d2:b0:21f:859a:9eab with SMTP id d9443c01a7336-22428ab8647mr364309085ad.37.1741837547216; Wed, 12 Mar 2025 20:45:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 26/37] hw/core: Move unconditional files to libsystem_ss, libuser_ss Date: Wed, 12 Mar 2025 20:45:06 -0700 Message-ID: <20250313034524.3069690-27-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837836222019100 Content-Type: text/plain; charset="utf-8" Many of the headers used by these require CONFIG_USER_ONLY. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- hw/core/meson.build | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/core/meson.build b/hw/core/meson.build index b5a545a0ed..547de6527c 100644 --- a/hw/core/meson.build +++ b/hw/core/meson.build @@ -26,7 +26,7 @@ system_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('= stream.c')) system_ss.add(when: 'CONFIG_PLATFORM_BUS', if_true: files('sysbus-fdt.c')) system_ss.add(when: 'CONFIG_EIF', if_true: [files('eif.c'), zlib, libcbor,= gnutls]) =20 -system_ss.add(files( +libsystem_ss.add(files( 'cpu-system.c', 'fw-path-provider.c', 'gpio.c', @@ -46,7 +46,7 @@ system_ss.add(files( 'vm-change-state-handler.c', 'clock-vmstate.c', )) -user_ss.add(files( +libuser_ss.add(files( 'cpu-user.c', 'qdev-user.c', )) --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837595; cv=none; d=zohomail.com; s=zohoarc; b=KHjSwG3Bb8vuJEvV1udiLRJkMUcct4uYWQhYMiCz50KxNuT4HzrG5+Al9yu1jqkqB2GNbAwEGtJC5qU70mAEcwi1+HrfwEvIPQvU4ELXk4tnpbrRcP2mfEvalfTpH701WvfCvMbC3gn8G1NBrSRyYteWvW8n1hs/WPnAFhmp2Mk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837595; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=xQJ1NmcFNqmUL7WPpAiQ9a6VrBOzjQErSNRAx4ZQM9A=; b=eowu0jWcGU9jOWJSKi6KHVXXMtJk6coSYu+5TjjEwh0Rz+aHY/8qaXHuHM4sWzxdZJ9CqF0QWFHILZqRkEUOM+MZlrVdDZmyMtENrSofRLMNqbztiebHcJi0BHJr2BBzEEKn5qtzAwhhFRoXvuXxKaEQtcIvkM9+u/HpoB/pRy4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 174183759511688.91928364262264; Wed, 12 Mar 2025 20:46:35 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWX-0004oC-2L; Wed, 12 Mar 2025 23:46:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZWF-0004hX-KR for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:07 -0400 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZW1-0007ow-9f for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:03 -0400 Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-22349bb8605so10299505ad.0 for ; Wed, 12 Mar 2025 20:45:48 -0700 (PDT) Received: from stoup.. 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837548; x=1742442348; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xQJ1NmcFNqmUL7WPpAiQ9a6VrBOzjQErSNRAx4ZQM9A=; b=QCtYKGWczThnrVO6Jz2Fjz5HqfLHBwTuDUKuPzm/tZgtHx8aeSkFy8XpH9DS3dGjuU VyUSrV939lOErNV1IhyWmUyH5GxbMyC8oEJ6EOB7Z/LeaClKyk8A8J8WdyYF2AMBgn9B YxTUU0kJpv8/enNHqyB9aArIaxXa7rGtGTt3rjc0mivLMrX2iD42EB1HFfIJ44gn/jtg xkqaVWYKxKcc0/spQjETceG1xdTfdAQIfIY5lIOpfKWnFbqaT3ymJLosxHpeq0FPlfd3 3Grto63RJCoLwSZ7Q8Mdcg13cUsa7sbeYBqBQbvHO9EPDjT02hJv7UyrKzDYdu7Nyc47 2HRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837548; x=1742442348; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xQJ1NmcFNqmUL7WPpAiQ9a6VrBOzjQErSNRAx4ZQM9A=; b=FDriu+K5LvQPOO/3Qmq4yTYI+cOjRY9DsKGx7fHjmyEkW+w6tkQPZw1BvclAZvU79P Mlibhe9C9nC/FYAAo5E47YSI8dd1mj7tkxbQWjYnLN4GHXctTPwiLPNtSx+tvP25kH2J dI5kBt+QBgByFbDp2xSf2HKc5jlbXKGmVV9chKfZAkdfRHMAqtz2RS8epoN/lVmThFB9 GdGsxXwk/cQv2kz/QIpvsiOyPD9KrQyyHcdg8Qz+OUTN/otsJjT9jB2koEhXVuQtMn88 wEiWyK245E39ThdX4TPaNbYdhMnG7lMo6KcSml40JCaSHbiRB/f2sXjrbwUF7Qm0irln gYpA== X-Gm-Message-State: AOJu0YwVr6eAaOZXI7aa/COZyNA7C6iAcDHSF+gqCBbeFiXnq5p9oN3W KsNLz+FveDTSSYi/GQNdOEGVte9LfgPSm3fq+Ytj9JZRJuoR82kQRxu61Hx95FNdCRuhTpAdfqX b X-Gm-Gg: ASbGncuhDeJhtXS/VOf4keeDxe7qfeYucr399Y49U8IDBYaWk8+5QdUSG4OtfJ48gZH B6Ifigb5qjexJakiIBomEGgWUJ8ZAYa1Pt2Vf1ep+UtMOpZUYgjB6Bu34HQpf+wRHWCbCIcxbGy /vx1pESM0JbuTvPCS8Ks9g6gkifJqJkvv7B9DTVq32p4qGirSyca7rVFtTA4hPA14DYnz//+oqZ /vdtooIfNIjoe+045t5JgyicT6NaUPXeVdS2FhfYi+iATAQH/Z11zLfw0Qk5wZVSTyi+ff5S6W8 lKLTE0oJnfKCntUYZAag5Ak8FgVszveTuHvjAaCVJY3Z+AfICNdldOeWCyiGt3xk84wTKpQIZB6 TdUQiiF4DZKA= X-Google-Smtp-Source: AGHT+IFBTo9LdUOvx8q3TirVVDC7lCv/1sL0FL0peEQV2cGLkNmIjS7ER51dep0rNIwMSreSkJoRJA== X-Received: by 2002:a05:6a00:b84:b0:736:3c2f:acdd with SMTP id d2e1a72fcca58-736aaa1d9fbmr26021206b3a.14.1741837547927; Wed, 12 Mar 2025 20:45:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 27/37] system: Move watchpoint.c to libsystem_ss Date: Wed, 12 Mar 2025 20:45:07 -0700 Message-ID: <20250313034524.3069690-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837596265019000 Content-Type: text/plain; charset="utf-8" Some of the headers used require CONFIG_USER_ONLY. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- system/meson.build | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/system/meson.build b/system/meson.build index c83d80fa24..2aab3e97f4 100644 --- a/system/meson.build +++ b/system/meson.build @@ -23,9 +23,12 @@ system_ss.add(files( 'runstate.c', 'tpm-hmp-cmds.c', 'vl.c', - 'watchpoint.c', ), sdl, libpmem, libdaxctl) =20 +libsystem_ss.add(files( + 'watchpoint.c', +)) + if have_tpm system_ss.add(files('tpm.c')) endif --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837722; cv=none; d=zohomail.com; s=zohoarc; b=ZG4nGBSJqw4U+rL1gEd4+vYG+W4g68ZfKz8QOQglswEwfa+eeRnrZYKKqOWoWBVuvSdnoQjrwj2GCBI0ymKjNNdDMSvL1DJCdniewxe6ZkBVMY0dldH9CEdeDknw4UX77Qhuy1w0/gI7XIn19vJswe22bkbxp/M4eGZConQwLks= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837722; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=bgy7Frrje2t1MTErBx2JzRotfnpwAVUP1jY7+Gvqxiw=; b=cEx+qJ1s39T9JOGSzEXBuF2dyFPH0B9Nn6gE+E6dyaPaeuqHcYX3ZHE9xt75qhErkyddmj91RYXzWLWXtrqGpwW4soEsMxPTu0TKow/xXhcANsDoCueC+GJR+Wpcd5uLd79G6vAfQUjK+aZKntakprQp8Q521sJDMDLCtSuA1Pg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741837722584372.96580587642256; Wed, 12 Mar 2025 20:48:42 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWo-0004to-64; Wed, 12 Mar 2025 23:46:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZWE-0004hQ-Jr for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:07 -0400 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZW2-0007pB-BH for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:01 -0400 Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-22398e09e39so9293745ad.3 for ; Wed, 12 Mar 2025 20:45:49 -0700 (PDT) Received: from stoup.. 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837548; x=1742442348; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bgy7Frrje2t1MTErBx2JzRotfnpwAVUP1jY7+Gvqxiw=; b=jCg6m6flM9FYKu1hX3MRvqtOOCaIMS1q2b7l0IZPt/Qm47DqJLxhp95pSetYl7rvDm HRA+0myEtPVmtJp0M3bP1GECq7iIg5frFjKcP4ANIIvIzR+VRkvCI3neg3dtRoQARoDC OeUl3WqyUE4dyZzwRHchrINEn/nKib3pP6KqVtgmjkbx1HwTSts1lUdyNJQr3NsT4RaA wSrkYDxi9IhlWCCfzg6BIpKGhD9ORFTL68xNBVJlKIqwPcSy3hCwiVr9xZhw4yjZFChK YVli/0J3bZZ7TVJj7eO5D0+CLmo9XNEsJzdodTmEOqcCxd2ofrNftvVQAo/YXKW7LCns qI4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837548; x=1742442348; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bgy7Frrje2t1MTErBx2JzRotfnpwAVUP1jY7+Gvqxiw=; b=LxGoaw8woNSkCRCS/glaiRCA+G9H+wMgv8RHqjr9NbVUFRDj0OWOWMsrljbesQs6Kv aTGasNdUQ0gUxTqylzyGH5izr9ZuPKFJql9cmBAMq9D1Zb81voJj4TkoC+f2rAxQMKsi v3DZXeaAgzjVVcjRIsh351tS0FYLDCoAUumzGlkfYKjUe/VlF85luszTS6sYrr7/ga1y ssyKDhzrXxO3MjO/2rKkswasmokchA4c+FlY6Xj2bRdtEMW93ScQu6qyKL6knLmKyQy3 toGqphCW6tBrf1YiiM3YT6PtbGAqxyezKd3B2XJzPQ7CeYHwE0B2LLpgl2G+87QxNWL0 iZGA== X-Gm-Message-State: AOJu0Yy/YzNUTUB0tnIEGjDOxw8WBeM6JPLpgIHsuMUOpTmuru8pX117 erL26ryQCJY1t0GkeXAGCR1B5SDA97+x+rcytUWfhft009C8nTRaHDSVCil1r8PMLjqQaTj/f2N f X-Gm-Gg: ASbGncu61vR7Qr0XzQHx+WQIzrf/H2/ZEECCGHHTaNuLgqJNAIzt0snDSy6SFAM6eIs ODYRPD/U1Ohr8aqaxRSPdwEHS5CcpcgVEsLkpHnXER7GgdYaYTWix8w0apxhfk0DXhIm0RzmzxL hFmGhEfVb/WtESv4wmzvV7Rg+lB/G2dD5lGT7Enhjd07tS8Lo7/t6809wVyeExObBYRvysFcL41 D/Aotgd3Uz1L3fN0MPvtxAAHB5M1LoNbp5yKeqkhqD7nVe3NPV2ZmsrEG3CvUFrkGQsQ98zcHLN jS9FgGFxGWHi0+/1W0xHM2XrkqmVzW0y0qPadIbJmB3MF+Q7lVmVJLm+cs7KikkU2wLA2rTnQe7 A X-Google-Smtp-Source: AGHT+IHiXKlN17uQTvsHX6yMUNllNykEMLFbCw0PovuReYEiFhq08y4QESZDyTvYHe/YYUjDUtcgTg== X-Received: by 2002:a05:6a00:987:b0:736:6151:c6ca with SMTP id d2e1a72fcca58-736aa9e7350mr34966098b3a.4.1741837548653; Wed, 12 Mar 2025 20:45:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 28/37] plugins: Move api.c, core.c to libuser_ss, libsystem_ss Date: Wed, 12 Mar 2025 20:45:08 -0700 Message-ID: <20250313034524.3069690-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837724795019000 Content-Type: text/plain; charset="utf-8" Headers used by these files require CONFIG_USER_ONLY. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- plugins/meson.build | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/plugins/meson.build b/plugins/meson.build index 3be8245a69..5383c7b88b 100644 --- a/plugins/meson.build +++ b/plugins/meson.build @@ -61,5 +61,8 @@ endif user_ss.add(files('user.c', 'api-user.c')) system_ss.add(files('system.c', 'api-system.c')) =20 -common_ss.add(files('loader.c', 'api.c', 'core.c')) +libuser_ss.add(files('api.c', 'core.c')) +libsystem_ss.add(files('api.c', 'core.c')) + +common_ss.add(files('loader.c')) =20 --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837640; cv=none; d=zohomail.com; s=zohoarc; b=N8sZFZuP0cf1K8B9tu4QJVgUro3dcOk3IRWVVVd0MaB9D+887WCEEsaHZKeJki+v7uuowYPNf7fqr/odR9PMSMtKMP/p1Af6J3LUndfYVjcfONCT8Yd7wrkLnCVTBwuum3yayLBJ8sT14miKOaWN8C43JJlNfbwE/Y7hd9F4N0Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837640; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=QTt4vjLt/C2qmMFaq+LOi+kwmn6cbUcfjTifWM1urG0=; b=JHAhQmVN56wHy0hQleSxpHGkHRpk3ZRnjssW6x/PUv0wJ34idVW+GW7nC9CmwNNhAyNy2MxOLqVzbT/h5dkWYpdXQl7L68wNnwP6PuvxW5GwkwClasJ3ohgGMMZUVtu70azoMQQJxu0MRrrLFF1vF2Z0HDuITpJ5j+DHoZx6elc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741837640164183.04128258390313; Wed, 12 Mar 2025 20:47:20 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWU-0004mo-BQ; Wed, 12 Mar 2025 23:46:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZWL-0004iN-Ih for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:13 -0400 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZW4-0007pM-78 for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:08 -0400 Received: by mail-pl1-x62c.google.com with SMTP id d9443c01a7336-22580c9ee0aso8854985ad.2 for ; Wed, 12 Mar 2025 20:45:51 -0700 (PDT) Received: from stoup.. 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837549; x=1742442349; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QTt4vjLt/C2qmMFaq+LOi+kwmn6cbUcfjTifWM1urG0=; b=ecRdwd86+fAx8zjzXjK+TJ3BIv6H2Ue3WxSY7+cHeb2sdrdnIoBPDtvzCIZT9nPt8r mfu7RiT7dNJBC/B29lr5221OFv6BvOIcjabye3M+MB+7XADcpUUfCWTnQcaHzz9r2jBp y7oIWMWzpCnJyeFj3dXxPOsNMzuxjDVERr6zwMjgiRmsK37bRY22/SNVLXJ/wWLHep96 sp9jnFv7vefJRKvYWiVdhJ7980Wf+WyO0a/45l34S5p+uyLqyyVEQCpj8U9Pi2go4smR ImsOr7ovuinPLTCu2qptwTX61O8zlX0zoPDRTRXsB16lxzx29jQ3pfP/SgrbraOxwqQD HoWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837549; x=1742442349; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QTt4vjLt/C2qmMFaq+LOi+kwmn6cbUcfjTifWM1urG0=; b=AGxmSu6+l/rLJ9rA0qdV6f+CJhKe5+phW1LR3Tp4gy2wG6VP95VhwHMHpEDlJ1jYFU zJaBWmk9VFLLRfLF02cQq/crohaCs4q73/+L41/+64u+clJJyaQ0cmQAT4PmTdi2IR6A 0hdR98/n1e+bG6R1efss/5C41HBxtKQDCAZA8cbnPAldfnajMKjzb00dJKA3TEVHVe8h hmGNpgydtKAkdQjotGiaSxYPLiPqvciHU6eKgtd5cOdZhuyAAF49WsY6dUHr59ZH2FpY IJ6RBWUvtBF/CXTWee4VfumUoNSEJLSPQcNYNCuD+5k0/YbreVt+DIH9/CUWyQVSLugH 3cQg== X-Gm-Message-State: AOJu0YxG5k8i2RwegrXXL5MgM6TynJydInCcwJ8/TD4Ik8ysWp1YOeVk kPVc0aMjl2+VUxYiVM9tNMQME7SknnnjhVTnM6LkRahr3wRuco/OCm3X7GiOlrm07klQ+h+9tvs R X-Gm-Gg: ASbGnct6/p2qNK3hBdQqd2PM7Q18fipdbEW4cZCHRw9ketEPCk5t9BNiLYVYi7jauNc ez6SAnSD5UdxzlhiSQWCdvcdO3zmmgiRwsmshXH0R5mmVij4jVfJrSxzeYJ8WGHW97nA24LUWHu 6QMFv4M23OjbZX5Vt8BxvHSTYeDd2LDC+LDYnP5HvWL/Dzc0vcF8D71TYNP2W9e6Wg0DyxzALq0 nujou51x3q5XlrB1cVbZyXOP488zPVhcVIeKwPysfybeM95HifaqhksnF80gJ2QVbZbwhMjTdya vbJqCUhxWkGcoNLJpv01CWstrJ1GiD9g+iln9L0xOiFF+kPkqETQU3+xwnpHtJqS9NHmqwQLZTd t X-Google-Smtp-Source: AGHT+IGqO9TQaRQQED6hz0w4hgRYkqlyHz+6H3640bd8dUYOF6PJBf5dPLsxcf3nt/TDVauVdiPzJQ== X-Received: by 2002:a17:902:d488:b0:215:b9a6:5cb9 with SMTP id d9443c01a7336-2242887eb5cmr373976785ad.5.1741837549460; Wed, 12 Mar 2025 20:45:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 29/37] include/exec: Split out cpu-mmu-index.h Date: Wed, 12 Mar 2025 20:45:09 -0700 Message-ID: <20250313034524.3069690-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837640531019000 Content-Type: text/plain; charset="utf-8" The implementation of cpu_mmu_index was split between cpu-common.h and cpu-all.h, depending on CONFIG_USER_ONLY. Unify within a new header and include only where needed. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/exec/cpu-all.h | 6 ------ include/exec/cpu-common.h | 20 -------------------- include/exec/cpu-mmu-index.h | 33 +++++++++++++++++++++++++++++++++ include/exec/cpu_ldst.h | 1 + accel/tcg/translator.c | 1 + semihosting/uaccess.c | 1 + target/arm/gdbstub64.c | 3 +++ target/hppa/mem_helper.c | 1 + target/i386/tcg/translate.c | 1 + target/loongarch/cpu_helper.c | 1 + target/microblaze/helper.c | 1 + target/microblaze/mmu.c | 1 + target/openrisc/translate.c | 1 + target/sparc/cpu.c | 1 + target/sparc/mmu_helper.c | 1 + target/tricore/helper.c | 1 + target/xtensa/mmu_helper.c | 1 + 17 files changed, 49 insertions(+), 26 deletions(-) create mode 100644 include/exec/cpu-mmu-index.h diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index d72c28a5d2..e62a9a4c79 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -113,8 +113,6 @@ CPUArchState *cpu_copy(CPUArchState *env); =20 #ifdef CONFIG_USER_ONLY =20 -static inline int cpu_mmu_index(CPUState *cs, bool ifetch); - /* * Allow some level of source compatibility with softmmu. We do not * support any of the more exotic features, so only invalid pages may @@ -124,10 +122,6 @@ static inline int cpu_mmu_index(CPUState *cs, bool ife= tch); #define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 2)) #define TLB_WATCHPOINT 0 =20 -static inline int cpu_mmu_index(CPUState *cs, bool ifetch) -{ - return MMU_USER_IDX; -} #else =20 /* diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 3771b2130c..be032e1a49 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -272,24 +272,4 @@ static inline CPUState *env_cpu(CPUArchState *env) return (CPUState *)env_cpu_const(env); } =20 -#ifndef CONFIG_USER_ONLY -/** - * cpu_mmu_index: - * @env: The cpu environment - * @ifetch: True for code access, false for data access. - * - * Return the core mmu index for the current translation regime. - * This function is used by generic TCG code paths. - * - * The user-only version of this function is inline in cpu-all.h, - * where it always returns MMU_USER_IDX. - */ -static inline int cpu_mmu_index(CPUState *cs, bool ifetch) -{ - int ret =3D cs->cc->mmu_index(cs, ifetch); - tcg_debug_assert(ret >=3D 0 && ret < NB_MMU_MODES); - return ret; -} -#endif /* !CONFIG_USER_ONLY */ - #endif /* CPU_COMMON_H */ diff --git a/include/exec/cpu-mmu-index.h b/include/exec/cpu-mmu-index.h new file mode 100644 index 0000000000..8a8dc4b162 --- /dev/null +++ b/include/exec/cpu-mmu-index.h @@ -0,0 +1,33 @@ +/* + * cpu_mmu_index() + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1+ + */ + +#ifndef EXEC_CPU_MMU_INDEX_H +#define EXEC_CPU_MMU_INDEX_H + +#include "hw/core/cpu.h" + +/** + * cpu_mmu_index: + * @env: The cpu environment + * @ifetch: True for code access, false for data access. + * + * Return the core mmu index for the current translation regime. + * This function is used by generic TCG code paths. + */ +static inline int cpu_mmu_index(CPUState *cs, bool ifetch) +{ +#ifdef CONFIG_USER_ONLY + return MMU_USER_IDX; +#else + int ret =3D cs->cc->mmu_index(cs, ifetch); + tcg_debug_assert(ret >=3D 0 && ret < NB_MMU_MODES); + return ret; +#endif +} + +#endif /* EXEC_CPU_MMU_INDEX_H */ diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 92b4cf20fd..82e67eff68 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -67,6 +67,7 @@ #endif =20 #include "exec/cpu-ldst-common.h" +#include "exec/cpu-mmu-index.h" #include "exec/abi_ptr.h" =20 #if defined(CONFIG_USER_ONLY) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 405e0b44c4..49e1a64000 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -13,6 +13,7 @@ #include "qemu/error-report.h" #include "exec/exec-all.h" #include "exec/cpu-ldst-common.h" +#include "exec/cpu-mmu-index.h" #include "exec/translator.h" #include "exec/plugin-gen.h" #include "tcg/tcg-op-common.h" diff --git a/semihosting/uaccess.c b/semihosting/uaccess.c index 382a366ce3..a957891166 100644 --- a/semihosting/uaccess.c +++ b/semihosting/uaccess.c @@ -9,6 +9,7 @@ =20 #include "qemu/osdep.h" #include "exec/cpu-all.h" +#include "exec/cpu-mmu-index.h" #include "exec/exec-all.h" #include "semihosting/uaccess.h" =20 diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c index 1a4dbec567..a9d8352b76 100644 --- a/target/arm/gdbstub64.c +++ b/target/arm/gdbstub64.c @@ -27,6 +27,9 @@ #include #include "mte_user_helper.h" #endif +#ifdef CONFIG_TCG +#include "exec/cpu-mmu-index.h" +#endif =20 int aarch64_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index fb1d93ef1f..510786518d 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/exec-all.h" #include "exec/cputlb.h" +#include "exec/cpu-mmu-index.h" #include "exec/page-protection.h" #include "exec/helper-proto.h" #include "hw/core/cpu.h" diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index a8935f487a..20a5c69795 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -20,6 +20,7 @@ =20 #include "qemu/host-utils.h" #include "cpu.h" +#include "exec/cpu-mmu-index.h" #include "exec/exec-all.h" #include "exec/translation-block.h" #include "tcg/tcg-op.h" diff --git a/target/loongarch/cpu_helper.c b/target/loongarch/cpu_helper.c index 930466ca48..8662fb36ed 100644 --- a/target/loongarch/cpu_helper.c +++ b/target/loongarch/cpu_helper.c @@ -8,6 +8,7 @@ =20 #include "qemu/osdep.h" #include "cpu.h" +#include "exec/cpu-mmu-index.h" #include "internals.h" #include "cpu-csr.h" =20 diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index 27fc929bee..996514ffe8 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/cputlb.h" +#include "exec/cpu-mmu-index.h" #include "exec/page-protection.h" #include "qemu/host-utils.h" #include "exec/log.h" diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c index f8587d5ac4..987ac9e3a7 100644 --- a/target/microblaze/mmu.c +++ b/target/microblaze/mmu.c @@ -22,6 +22,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/cputlb.h" +#include "exec/cpu-mmu-index.h" #include "exec/page-protection.h" =20 static unsigned int tlb_decode_size(unsigned int f) diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index 7a6af183ae..5b437959ac 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -20,6 +20,7 @@ =20 #include "qemu/osdep.h" #include "cpu.h" +#include "exec/cpu-mmu-index.h" #include "exec/exec-all.h" #include "tcg/tcg-op.h" #include "qemu/log.h" diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 5716120117..1bf00407af 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "qemu/module.h" #include "qemu/qemu-print.h" +#include "exec/cpu-mmu-index.h" #include "exec/exec-all.h" #include "exec/translation-block.h" #include "hw/qdev-properties.h" diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index 7548d01777..4a0cedd9e2 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/cputlb.h" +#include "exec/cpu-mmu-index.h" #include "exec/page-protection.h" #include "qemu/qemu-print.h" #include "trace.h" diff --git a/target/tricore/helper.c b/target/tricore/helper.c index a64412e6bd..be3d97af78 100644 --- a/target/tricore/helper.c +++ b/target/tricore/helper.c @@ -20,6 +20,7 @@ #include "hw/registerfields.h" #include "cpu.h" #include "exec/cputlb.h" +#include "exec/cpu-mmu-index.h" #include "exec/page-protection.h" #include "fpu/softfloat-helpers.h" #include "qemu/qemu-print.h" diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c index 63be741a42..96140c89c7 100644 --- a/target/xtensa/mmu_helper.c +++ b/target/xtensa/mmu_helper.c @@ -33,6 +33,7 @@ #include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "exec/cputlb.h" +#include "exec/cpu-mmu-index.h" #include "exec/exec-all.h" #include "exec/page-protection.h" =20 --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837660; cv=none; d=zohomail.com; s=zohoarc; b=XKpdivRDs9XZw/MKlf3HT3ypDmTjBbF31ZY+y8YY0UfAU4NF2ERsjJ8YRifpkOIThfHcYyUfQvZ/u3v14Q0OsLLoMo1ECI9jZAp8AhOQF41u0YQXOIGvhzBW48eAS/H8C2DLFD0IOnVzLKWuxr+1a8lTqt3pKCgmTac6EsbdmGg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837660; 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Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/exec/cpu-common.h | 6 ------ 1 file changed, 6 deletions(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index be032e1a49..9b83fd7ac8 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -9,9 +9,7 @@ #define CPU_COMMON_H =20 #include "exec/vaddr.h" -#ifndef CONFIG_USER_ONLY #include "exec/hwaddr.h" -#endif #include "hw/core/cpu.h" #include "tcg/debug-assert.h" #include "exec/page-protection.h" @@ -40,8 +38,6 @@ int cpu_get_free_index(void); void tcg_iommu_init_notifier_list(CPUState *cpu); void tcg_iommu_free_notifier_list(CPUState *cpu); =20 -#if !defined(CONFIG_USER_ONLY) - enum device_endian { DEVICE_NATIVE_ENDIAN, DEVICE_BIG_ENDIAN, @@ -176,8 +172,6 @@ int ram_block_discard_range(RAMBlock *rb, uint64_t star= t, size_t length); int ram_block_discard_guest_memfd_range(RAMBlock *rb, uint64_t start, size_t length); =20 -#endif - /* Returns: 0 on success, -1 on error */ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, void *ptr, size_t len, bool is_write); --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741838015; cv=none; d=zohomail.com; s=zohoarc; b=DuI2sYnOdqYajzCOOgdnMQXgJuXBXqJw9pGsOB6GWNZyuirl3TmW20M5TMVmVRXtVG3hvS9xsBK+MynbUq4NQT2wl6FYCogz4Crnrh7b7xEZWPMI40Ghj/+TshDEwW4SgWTD0yrGceQisIyzsOaINvzHjBaRllQ6WlE9bPKHhWs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741838015; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=c0yH4U6h2oXBq+kGt0lALY89FbRQ4QUGXJxA7WeVWJA=; b=dnWLC1/49vsu9tCfOD5/Z2ggLautyjWOvj++vwKaO8Sf146zdcyTuxLUJ0dRCkX9dE2wW87CiNklm/4dlwLddRpkqpIesh2XmpbH52yKDvsr666tp1Gl23Vdj+dhr9PqRmufFhrqS2Oc83M6eYIKnQMnYtDg7edCirI1TxHM+lE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741838015503469.21781456139774; Wed, 12 Mar 2025 20:53:35 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWv-0005Hr-9m; Wed, 12 Mar 2025 23:46:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZWN-0004ia-DG for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:13 -0400 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZW9-0007pj-0V for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:09 -0400 Received: by mail-pl1-x62c.google.com with SMTP id d9443c01a7336-22438c356c8so9205865ad.1 for ; Wed, 12 Mar 2025 20:45:52 -0700 (PDT) Received: from stoup.. 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Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/hw/core/cpu.h | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 2fdb115b19..59394212fa 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -614,8 +614,6 @@ extern bool mttcg_enabled; */ bool cpu_paging_enabled(const CPUState *cpu); =20 -#if !defined(CONFIG_USER_ONLY) - /** * cpu_get_memory_mapping: * @cpu: The CPU whose memory mappings are to be obtained. @@ -676,8 +674,6 @@ int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, C= PUState *cpu, */ GuestPanicInformation *cpu_get_crash_info(CPUState *cpu); =20 -#endif /* !CONFIG_USER_ONLY */ - /** * CPUDumpFlags: * @CPU_DUMP_CODE: @@ -701,7 +697,6 @@ enum CPUDumpFlags { */ void cpu_dump_state(CPUState *cpu, FILE *f, int flags); =20 -#ifndef CONFIG_USER_ONLY /** * cpu_get_phys_page_attrs_debug: * @cpu: The CPU to obtain the physical page address for. @@ -758,8 +753,6 @@ bool cpu_virtio_is_big_endian(CPUState *cpu); */ bool cpu_has_work(CPUState *cpu); =20 -#endif /* CONFIG_USER_ONLY */ - /** * cpu_list_add: * @cpu: The CPU to be added to the list of CPUs. @@ -1143,8 +1136,6 @@ const char *target_name(void); =20 #ifdef COMPILING_PER_TARGET =20 -#ifndef CONFIG_USER_ONLY - extern const VMStateDescription vmstate_cpu_common; =20 #define VMSTATE_CPU() { = \ @@ -1154,7 +1145,6 @@ extern const VMStateDescription vmstate_cpu_common; .flags =3D VMS_STRUCT, = \ .offset =3D 0, = \ } -#endif /* !CONFIG_USER_ONLY */ =20 #endif /* COMPILING_PER_TARGET */ =20 --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741838099; cv=none; d=zohomail.com; s=zohoarc; b=IahFqvzrUbGSFOzvQVPqYPtCjadMS+sTBZeH7R9uQBXHd3RhL6lJWvdXKxd+SCkFRGCihN0/yntW2kfagdMPWX48O5jh95rgdccXd7xtHdno6rCk46zmPSXO1muX3zDeUa21eGQc3do2+zwPAdujB/AmLtsjY63WJSx/noQJeqU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741838099; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=IeHYr04W0m2zNJjTvbQgJtgjfEjOKbLo8D+48jtu/vU=; b=hmf/CcijP+/E363bFJhqMydUuLCT+BAwY/pvyAk+G4Y44u88d8+XMhSLfYJlaeUmG1gAl9mIQUnlqaXb7EXUv4xf/tlzUCWX4wW/RrlqgrWBDOy3r4ghzcS6WnumHtSOb9L4nEIWpgSEr/ySNu2mhcWEaj93U0DhZwSQWubUhjw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741838099337501.601211367788; Wed, 12 Mar 2025 20:54:59 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWb-0004pT-4L; Wed, 12 Mar 2025 23:46:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZWJ-0004hv-ES for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:07 -0400 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZW5-0007py-NP for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:06 -0400 Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-2254e0b4b79so13129375ad.2 for ; Wed, 12 Mar 2025 20:45:53 -0700 (PDT) Received: from stoup.. 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837552; x=1742442352; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IeHYr04W0m2zNJjTvbQgJtgjfEjOKbLo8D+48jtu/vU=; b=apgGhxNfz8l0nr98joZ5VjTQT3AouuNHfOdPKCGQEQp0PztX87IDlGUDbUrbkGenCe in+XCFdV4bYGkfFnPiplJ9+B2FIx1s5UNQwVhbJMgoGV4AvRIo4oX3gVjufMEPU3v30g 4LUdlmuYaeVFDMIpvKnT9xfPNfaqEG5v4KgCsJMOo+kHCYfgOv+pGO6d7kT/ijAmkrfo G9Ux3vODhWJed2kTMbV5cAA4QU8Ainub+WR1ssWXMdxdXJv9kLr4dmkatJxQlnA+B/NY y+2iDz/+WkeCU+DLr/92jL/iy4JNuyxFDZLyioue+wRVKH+q+ye5HFp9TlIE4U0Rudyg aUTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837552; x=1742442352; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IeHYr04W0m2zNJjTvbQgJtgjfEjOKbLo8D+48jtu/vU=; b=b+T3N/WwFgxc9biiPySWiD6ue8WrvKUdz3GTulWo2h1ysWs3sZwoxGyBEeDYHLet2M EsQQClMF28h7M80z5bfbl5s1ZAgYkJooC8iJAOzDcBlE6JI0e6FDAPtbpt9aFTDCSNJy 8JHNdInHHil1Jy4ppHReM8gk+uaFrXlSzcMWSemJSMGGwOPcuAaAuedBZJBm5LGjuA4h witOEWNssXHUbbQiPVz14u4NsMT9X2WYfRMs8YINQTPos5Nft6zgfBqz0Gwvq1yA5H5w i6vuGTfzd4aWLr3roF/skTGGZLS+5jY/+2trF4vCMdVD/zISaC0TPd4m+H/8UTTUSGZ7 aBIQ== X-Gm-Message-State: AOJu0YxwvBs8tkME0jzep27EznkKbYzpQhf5OaSkYUrPdigHmUehEp0z lPhyuPP8itwP6drJNtBsLfNbHHpRt3YUDqlxXLuv0/cYsk5fQju+z1TvZnYNSOotjGfIUPu4aLZ y X-Gm-Gg: ASbGncusUp9LukTEMoLpRjEkkn++xPV+0lV97Z6IqDDh20u7ak6sRq7AfDa++sBpkB5 xHcFmRe4kj2M22jrBagCtYLY6k5lY0Cp6YNmUufH+bfxhCgAw7s+HautK3MOErFylqtj9thtiVM MxQPUyK+bgpJ4YwEJQsIr6xxtmJPtR1BvR5JnfPDVKWeMdFbUwqLLEXkuywIUaBVrCnXcoFe2K2 F/n+ZUaG4B2d09ZzBUEqS5X/KGQockS1sEjjMtK4WmW8mBU10fL/1ZfwloZYvS4JgjOcp4QZFHD kvFd0ttmNaJMTavTYfJb610IcjD63W5p+7GJX8RvdEVvUBmSi3ZTw3mg4SnIt4lYX64+CnArui1 b X-Google-Smtp-Source: AGHT+IH6KzYNJgqrsntWeMdEJX1DYVpdy8lU6buYMBc6gn2XxSDo9sKCkeDP1f2clV0x1CWNQgqcoQ== X-Received: by 2002:a05:6a20:160c:b0:1f5:8c86:5e2f with SMTP id adf61e73a8af0-1f58c8660a5mr17897201637.37.1741837552327; Wed, 12 Mar 2025 20:45:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 32/37] include/hw/intc: Remove ifndef CONFIG_USER_ONLY from armv7m_nvic.h Date: Wed, 12 Mar 2025 20:45:12 -0700 Message-ID: <20250313034524.3069690-33-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741838100710019100 Content-Type: text/plain; charset="utf-8" We were hiding a number of declarations from user-only, although it hurts nothing to allow them. The inlines for user-only are unused. Signed-off-by: Richard Henderson --- include/hw/intc/armv7m_nvic.h | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/include/hw/intc/armv7m_nvic.h b/include/hw/intc/armv7m_nvic.h index 89fe8aedaa..7b9964fe7e 100644 --- a/include/hw/intc/armv7m_nvic.h +++ b/include/hw/intc/armv7m_nvic.h @@ -189,21 +189,7 @@ int armv7m_nvic_raw_execution_priority(NVICState *s); * @secure: the security state to test * This corresponds to the pseudocode IsReqExecPriNeg(). */ -#ifndef CONFIG_USER_ONLY bool armv7m_nvic_neg_prio_requested(NVICState *s, bool secure); -#else -static inline bool armv7m_nvic_neg_prio_requested(NVICState *s, bool secur= e) -{ - return false; -} -#endif -#ifndef CONFIG_USER_ONLY bool armv7m_nvic_can_take_pending_exception(NVICState *s); -#else -static inline bool armv7m_nvic_can_take_pending_exception(NVICState *s) -{ - return true; -} -#endif =20 #endif --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837672; cv=none; d=zohomail.com; s=zohoarc; b=Yz13rnbmYjEwMrjTsB0571cqwhgsYfL/o3srv4n8XSOl2OYGTtgxfZoGvnRYmFKieBuZlIxTs7TRsg96wLAoMrAkjFEPFpQLBabSC09nCoQdAwdNSd9fQV3MOokMqzoTFpabn9JVv1zxX85Arc8jhVeHIR0/5+mF38ELZY5/F7U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837672; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=cK/VzX5+27up7sPHovhu1C3y4s6cAm//kFke6QWtfCA=; b=i2lFV3kdRDgtgZD3JW8TzKnD5t3c/BNyy3tYjKxzqgNieAwRimpLYg+1O0wOXdxZBNSS4t8iz96JzeTlzydWCyCeL8ktawQnwBYSWdeY8FdRtqUDrY7zdoEy+yNmTx3fSWPlQpWJS78L2CMKT4h7EZTRFAEDzTy6x6UluIr4sX8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741837672417726.7530726864964; Wed, 12 Mar 2025 20:47:52 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWT-0004mD-Eb; Wed, 12 Mar 2025 23:46:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZWL-0004iL-Fy for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:13 -0400 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZW7-0007qB-0x for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:08 -0400 Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-219f8263ae0so9608395ad.0 for ; Wed, 12 Mar 2025 20:45:54 -0700 (PDT) Received: from stoup.. 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837553; x=1742442353; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cK/VzX5+27up7sPHovhu1C3y4s6cAm//kFke6QWtfCA=; b=umdgWDlRG+qrrszkBxR/iUUadNR6oX3XdoojGmN+376NTqf4QhnI1vBrv1nXKSS2Q2 uf5ttV+qUiQVrJle82NVvBLz/GKjuuWHbRE2zGMtjC2gdF2P5DuRn0tiavCkJNgi75ps 0eKAKDJWtUedFU2DevfBrJmIqCE+gfU6asxNrh5A2n+uImLXyPWy2nO4B/+S6ajBb15O mnMRDY/ZDHrSA0x8bXYKDVsATcWcL4LVsA5ETInEm+3kIf9dD9l0hNgyvljZ6Tya9hiH M+KBWED2nyZRAtdhPRfAEUzcw3ecIc8qe4Uw9bi8EsMx0V2sk1JiAIDab8Bi0dM5gPy5 ooSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837553; x=1742442353; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cK/VzX5+27up7sPHovhu1C3y4s6cAm//kFke6QWtfCA=; b=FIr8J7H8hq5PTvfdKpmV8nvW44Tw96tO9BJz+nKvmnr7v6daEco9k253671lGoTsYx s4N4GC0UNoxDzOlsOSOYLNldB7WzOhKo3lPV3jKEKngKbr85Hd7kt6AW4oDzmSqnt+R5 EjjyjilfjaE1SbliH0juesV81DolhWDF/GIyVdaNFXDKaUaY2eWEqOKvgvgfw8Nez81m AhCWVTO2kzFLUmgXp0LLrRJItLysZr6r6aUsx0vl6FenYE9frrHYhU7O++Rsuj8MJdPQ /0rKCNhP005f8mxGlOyNK6mpjMkYD/a0IA3el6Lxw1tooqBN7JRMYuNzo9y1tAZkOmFB 4s9A== X-Gm-Message-State: AOJu0Ywwt8zJD4at5O1cdhlg2zqYtVNQlSDIJwiqG1hvdspcbyrhWO+8 dp6RdTqv+LGxjERoztQznS3yRKiSWS38CswktmULPP7kskHFj3IkE/41FGsw7zfmjzqSwrLzck8 U X-Gm-Gg: ASbGncu8G059ZnKgQ3whovfo0B7wKXCBvsbi0gemN3t8REpFxjPKO+BLkoAiO8N8W+Y u/lpXHtU1e4pVH5YRQIPaTFeGSWCHMBh0xm7EY0WePARmEczKHYAGVxKNgF/Ae5caCuBKjyZU6l 4IsuNgq8/Dg4XX6+hFQ3fzjlaAognp6IvPQINEuAiGv3rood5/1wnw5k1WEvACy1GlJlUGe184k RIVnZ3RRuKolNL5tI6BnSEuwzH2XcjJD37pe11ztGONiiA7g0nbMBLR22s/SIvlagZA6dnBY/7H AYvUzoz/XzT91FsTinSq2lILsVybgP4Qn9jRLiHNnqUykF5HjwmUoJD9jIx+Rt5TmpUl6wEldTI FPc8Ii968OsQ= X-Google-Smtp-Source: AGHT+IEAQCW3BsFe8Fe/PRPzRrUTmeY5wtBpG7UqN4EVl16KzHyc9gOfWxUG1oJT8L1XeCpIr58V3g== X-Received: by 2002:a05:6a20:c6c1:b0:1f5:59e5:8ad2 with SMTP id adf61e73a8af0-1f58cb40fa8mr15841909637.24.1741837552982; Wed, 12 Mar 2025 20:45:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 33/37] include/hw/s390x: Remove ifndef CONFIG_USER_ONLY in css.h Date: Wed, 12 Mar 2025 20:45:13 -0700 Message-ID: <20250313034524.3069690-34-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837673984019100 Content-Type: text/plain; charset="utf-8" We were hiding a number of declarations from user-only, although it hurts nothing to allow them. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/hw/s390x/css.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/hw/s390x/css.h b/include/hw/s390x/css.h index cd97e2b707..965545ce73 100644 --- a/include/hw/s390x/css.h +++ b/include/hw/s390x/css.h @@ -238,7 +238,6 @@ uint32_t css_get_adapter_id(CssIoAdapterType type, uint= 8_t isc); void css_register_io_adapters(CssIoAdapterType type, bool swap, bool maska= ble, uint8_t flags, Error **errp); =20 -#ifndef CONFIG_USER_ONLY SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, uint16_t schid); bool css_subch_visible(SubchDev *sch); @@ -262,7 +261,6 @@ int css_enable_mss(void); IOInstEnding css_do_rsch(SubchDev *sch); int css_do_rchp(uint8_t cssid, uint8_t chpid); bool css_present(uint8_t cssid); -#endif =20 extern const PropertyInfo css_devid_ro_propinfo; =20 --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837803; cv=none; d=zohomail.com; s=zohoarc; b=j95GK4bksPW3QPnY7PcmWnp6UczIrC8PKhmMfQ7Rto+q/xSyB6S6kee+D1BKrQo4260MfQHRQfCKQAVXbnCqMEMZ59Fsez/Q8iDr3ecBky62J1yZ2z+HhDpsM+C7qW0GieXofN5VTY02ThcaNe/wTGj2JAkBWS2KF2Bw+9SJtk0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837803; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=NlesW0T0yCTWXBKRDt6pLfqvUeDW1NYxkb6NRcPiDCQ=; b=eRbeZn1YzyNFe0N2CMW/NpFHUx/bGur6/e+a6j4bUQBCPSVYnC/sT/TWw0p35tUXf+pAkTg7S98+A0Ad/B0j5YPl6NtqhSXoXP/1SZfC7lSiGqkKwsi9oZY1ksG4Cj/d4yDgFZ/h7Z72QUfom+RKVW/uKs+V5nZ3DjAcfGR+XbM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741837803448492.9659402775892; Wed, 12 Mar 2025 20:50:03 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWa-0004oE-Qw; Wed, 12 Mar 2025 23:46:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZWQ-0004kX-8q for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:14 -0400 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZW8-0007qG-Aa for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:13 -0400 Received: by mail-pl1-x62a.google.com with SMTP id d9443c01a7336-22409077c06so13185645ad.1 for ; Wed, 12 Mar 2025 20:45:54 -0700 (PDT) Received: from stoup.. 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Signed-off-by: Richard Henderson --- include/system/cpu-timers.h | 2 +- include/system/qtest.h | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/include/system/cpu-timers.h b/include/system/cpu-timers.h index 64ae54f6d6..f10cb5e7d4 100644 --- a/include/system/cpu-timers.h +++ b/include/system/cpu-timers.h @@ -30,7 +30,7 @@ typedef enum { ICOUNT_ADAPTATIVE, } ICountMode; =20 -#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) +#ifdef CONFIG_TCG extern ICountMode use_icount; #define icount_enabled() (use_icount) #else diff --git a/include/system/qtest.h b/include/system/qtest.h index 6ddddc501b..84b1f8c6ee 100644 --- a/include/system/qtest.h +++ b/include/system/qtest.h @@ -23,7 +23,6 @@ static inline bool qtest_enabled(void) return qtest_allowed; } =20 -#ifndef CONFIG_USER_ONLY void G_GNUC_PRINTF(2, 3) qtest_sendf(CharBackend *chr, const char *fmt, ..= .); void qtest_set_command_cb(bool (*pc_cb)(CharBackend *chr, gchar **words)); bool qtest_driver(void); @@ -33,6 +32,5 @@ void qtest_server_init(const char *qtest_chrdev, const ch= ar *qtest_log, Error ** void qtest_server_set_send_handler(void (*send)(void *, const char *), void *opaque); void qtest_server_inproc_recv(void *opaque, const char *buf); -#endif =20 #endif --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837660; cv=none; d=zohomail.com; s=zohoarc; b=RXxZPVxgt2Z4iu9e7nkEQWrm7V21K/dV0V8etvO50FU/1emY1gz3wREAkqdM5wZf2LTwY7KUWaQQQp7dTFCTxpe5FkCzMuCqJlPj9WzyZDDjoqWFzADBWcvwBlaxgsFUEf9wPxmd+VqAWJiSl5KZEqfGRxSwTJDPTQMvOVKPICo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837660; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=dDxtX6D4zsMFCwMH3zB+SYS9h1ncZfk00z3dcZ1T9dQ=; b=j076Rcnrz3Gs6zxuKonmMDGiYOSOh73k+5NJ0sb1A9RrQPZ05fDfdHMnrEftNtXDntyGKwm/42GKQJT2nEcvYYsgniUtoNW1TvVsEGo/krw2A1sz3lSy1AVr1+CVIJ6kMy1qT1tSlxCJRdlPnD8mBfiYnLbIcywLffosgheK6V8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741837660060680.7006021753502; Wed, 12 Mar 2025 20:47:40 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWZ-0004p8-W5; Wed, 12 Mar 2025 23:46:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZWN-0004iX-Co for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:13 -0400 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZW8-0007qM-E5 for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:09 -0400 Received: by mail-pl1-x633.google.com with SMTP id d9443c01a7336-225a28a511eso8806875ad.1 for ; Wed, 12 Mar 2025 20:45:55 -0700 (PDT) Received: from stoup.. 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837554; x=1742442354; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dDxtX6D4zsMFCwMH3zB+SYS9h1ncZfk00z3dcZ1T9dQ=; b=J+wv6ejLlOf5Fk8NhxhKC7XLzg1SCXUHgvaJSgiOOz/VSN9kWlAr5UuW8hTXyG11o7 ueXUSJeP52JR2ux5loY/Vw9MBRPuyfgxBdUPIAs67i8Kd1VDIHlBk4wN6jDOlEqQbc/F +L7hRaHux9v8web0XuxkojhM9m2tlxAzxqCPH/rmA1s8VO3ObhV+q7X2yAUuo7AXvRMO S1ECFmLnJuEqHYSzE7ZM8/VePAbEQEs/HS1nZFt6ncMVhars4DmT6W8G3wtypSWJ1INt zG5dGvdfDEbPK1u9Kg1sd2eyucJIscWiZb5c5o1nWWs7frXaHlh9idLW2JUlRjmHXHdT R4rA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837554; x=1742442354; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dDxtX6D4zsMFCwMH3zB+SYS9h1ncZfk00z3dcZ1T9dQ=; b=JlSQfWtYzdVFSKAFgPJYli/Pb5iWQhYb+D+eBR2BHK28dBgK9sAid+R5G8+o1ZOEOW vvhuq7H4HqsSDaZPc5NuV26MSwf6H21/Qfixc+GYX5M4062dqBIaM9h6zdMEMAqJNUay cHcqIkAfJa4NGZ/6uorvanxh5RuzVi8dNsUU6VvzECpXJ5YUP9b9cYEh/PM640Z7xxk4 uHz7Ame7/dP2rSZKl8Cqy/eGf/PKbBkkL43GJjquWBo0OjpSViEh26pKaOtQmTtops5q WYKg/ErjPnJ1j68AzWQjHUa7aAVdxxeDa3BoI9j/yXCPA+saItWYqPVh6nvXxsSfhQSg jmMw== X-Gm-Message-State: AOJu0YwB83MAW3Z40/p8wVoID5v/VTy0pESirvgnAbwAnPXLm/S1DEXq RPE5kJBaFK6+RnqVJ+7ERMPL2UlUB8Xw5r4XMTmU0SqV2ezEEQKDWxk2nE9wo32/KKgr2qPfwnT r X-Gm-Gg: ASbGnctnjeGJZLkxXaPOqodm9R/qqoIxV4uD7PEX7FqjOUnhXOAxyLgwzsr1Kyz1Shu nZOrINPzRTA6rpEHFR1V3JiGSP99qFaI8KVQXoRTWr7cE0qHGXoilcJooafyCQ8qIPNHIhRgQmF z6MboK/vgShgPbce5fgNiCzsFGF1Xu64P/zZ+oIRG2rcRBNu6tYZ5K5hWDoQP5Df7OBeSEdWYUJ fvZNO6+flNwc2GO1zkMp7pnlgg7aVIYNSNchKVKi/M+VKV9T4NM0jcv2wphcvjS/ZaWDgU2Qcad j+0+FBKR/7DAg1cyIIfNNFfY9XBG6QDBQ9nSVT2aqu96HGo1pQXSZqsGtOKyER2HMFrCf+kZ/yI 8 X-Google-Smtp-Source: AGHT+IEG6AuTp0wFUuWhNBmR0l5NwLvL7paNWoTWt/RiPzt6aYdPCUo0/c91D/HeJ7MLxwDgbDPV5Q== X-Received: by 2002:a05:6a00:2351:b0:736:491b:536d with SMTP id d2e1a72fcca58-736aab02cbdmr35333772b3a.20.1741837554485; Wed, 12 Mar 2025 20:45:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 35/37] include/qemu: Remove ifndef CONFIG_USER_ONLY from accel.h Date: Wed, 12 Mar 2025 20:45:15 -0700 Message-ID: <20250313034524.3069690-36-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837661749019100 Content-Type: text/plain; charset="utf-8" While setup_post and has_memory will not be used for CONFIG_USER_ONLY, let the struct have constant layout. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/qemu/accel.h | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/include/qemu/accel.h b/include/qemu/accel.h index 972a849a2b..fbd3d897fe 100644 --- a/include/qemu/accel.h +++ b/include/qemu/accel.h @@ -38,13 +38,13 @@ typedef struct AccelClass { =20 const char *name; int (*init_machine)(MachineState *ms); -#ifndef CONFIG_USER_ONLY + bool (*cpu_common_realize)(CPUState *cpu, Error **errp); + void (*cpu_common_unrealize)(CPUState *cpu); + + /* system related hooks */ void (*setup_post)(MachineState *ms, AccelState *accel); bool (*has_memory)(MachineState *ms, AddressSpace *as, hwaddr start_addr, hwaddr size); -#endif - bool (*cpu_common_realize)(CPUState *cpu, Error **errp); - void (*cpu_common_unrealize)(CPUState *cpu); =20 /* gdbstub related hooks */ int (*gdbstub_supported_sstep_flags)(void); @@ -78,12 +78,10 @@ const char *current_accel_name(void); =20 void accel_init_interfaces(AccelClass *ac); =20 -#ifndef CONFIG_USER_ONLY int accel_init_machine(AccelState *accel, MachineState *ms); =20 /* Called just before os_setup_post (ie just before drop OS privs) */ void accel_setup_post(MachineState *ms); -#endif /* !CONFIG_USER_ONLY */ =20 /** * accel_cpu_instance_init: --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741837650; cv=none; d=zohomail.com; s=zohoarc; b=KzPCkN8/JzycN8Is8W1YQup08w/gtTTyfHYo8J5HDFLfeSzB6G8KS4gB4lOtamGwOL6cKgonkHZKKXYAtaThS5DDZpBtR3dwc2G/FGMkgaMAHCjZXnPb0ncbI6sUFreYrWLj2A+w5NppeiwvUpNQvFmOFlA52Im0OCgD/0j1JYU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741837650; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=lvUlsYrMynQ2g+Bt+yO0Pn1F4tS1wPQ/SJ1FqTEbcVc=; b=el037F+0uLHvlMneMV3ORd6O0sbwWhNO5L/zxvdzr0gI1qeet38SkDmxhLOnFfMDfBuWbAoWTqQr+unKsfJ40gKxFPNL4+Kg9sNyWjHD/8Z9J54x42tNM5L8yZg8XT/1zCbHszu4AvxZVouFnx80oSXNIFVL/btWEv8O6abGq58= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741837650672597.2589193377977; Wed, 12 Mar 2025 20:47:30 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWx-0005RK-U1; Wed, 12 Mar 2025 23:46:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZWR-0004lX-IW for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:15 -0400 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZW9-0007qZ-4z for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:15 -0400 Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-22337bc9ac3so9041265ad.1 for ; Wed, 12 Mar 2025 20:45:56 -0700 (PDT) Received: from stoup.. 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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7371167def8sm316781b3a.90.2025.03.12.20.45.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 20:45:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741837555; x=1742442355; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lvUlsYrMynQ2g+Bt+yO0Pn1F4tS1wPQ/SJ1FqTEbcVc=; b=pb8CpaJiT+9ovFWBzxM+5BctyWNkz+5DsecF3NzCXc7bZ5xNMrbnLbK6N0S+2RP1N5 XWVYCoSj4TB0O3YyIdBNM14yFLBnB85LlcQdFMrrcUqJSeQju6Ncykv7k7iCHBdBjqSN 7GQ4y+sEhcnpzTjg4CjAZn83dPk6Myqs2Bilsu/9KZCvJnaDsn8Dodb2xOES7w623uJc mvcoOwgeJS7sYVL0HNmPcuA7hqcBY1nwymU/CmXM+9NsinpNnIn9h826C8Z00EBDPopa Kz3v6qAHwo7NCcOcdmoA1opOm6EYM0MtajfoCeuTH4WVtZtw4WfDncjAZ/K00ZORWAZI IAEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741837555; x=1742442355; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lvUlsYrMynQ2g+Bt+yO0Pn1F4tS1wPQ/SJ1FqTEbcVc=; b=eRG4aHDiK8EZa8FOC6BguQ9QMNaxNTnX6orgG0QCT9YSDXPbfuYbfAEQHf/SI7eBqj hF7vEQRAcGR82QpMslH6gX4eQcO8VOUos0PAi2ktdQeuvBD20N8SIVTC3pC7b55RV+2/ YB/gY8oAoyafZ8boTwBNPcQoG2NmLFN16qaw43WycMlfi2dpUvixDDD6PrXv4Q2mUsHU lp2GUzDuoA0fOKmu20Q/5M3ns0Ifc5GTjXkbHZ1ShCkPGSkvekgCVEO0X+PWUvNMTs6B TcAo/IAlKw033AiHIJObgX/nZ3+4cazDXNRoDz8iSlhYPEUcolarmpc7d8o5iCGt6fXD i5UA== X-Gm-Message-State: AOJu0Yyun2OOM2kCeEp1mbJEL/XLuPp02iCjj9QNQVSw/tdS3Pvsaka9 RnUnQ9AyR8PkPQcH6mqaXLoBMm6WetVWJeHeRlKnKDrFchLFPHkZrJnMeITcXtQyIO8gFa+X+N9 f X-Gm-Gg: ASbGncsHZQW6MPeIpvgMwVzm/Z/puyN7jn1rIReqGXaF0429uTe+KYtBqufPlC1+2cz aNYd4e+coWvJAp6OjYa3Ym3AkhgqlbpVvQXfFU+1Tbnk5PmIy5t93lCdTscDbvI4yPJs1J3n5tn Ua3q+1OykNAIZG7q+n0bzpCxq23HQ6xqOd0UJMr7cWkk0xycG5qpSQHHLpa7soS5dhPUGQOWLeY EBLU4lu/MxdiJdR9RTgxRX06Wh8EBISigJ6q7VKqC9GHKHKjakbRzA6V8Ywo2jO/U4fKgjBSkKQ LnIo9a6iASyVcrNtXtoDclUTNS0+Om8Y3P/GcNAbXqWZhreHVBa5f19YyAn1DGGIQCl3Svsss7r t X-Google-Smtp-Source: AGHT+IEUOr7lE/liiSBrqlLH/HFTj+SnLFmDbzwg7rIq6W7N5fjzpc7345QM1rW6z8uMmsszJBiBpw== X-Received: by 2002:a05:6a00:244e:b0:730:9801:d3e2 with SMTP id d2e1a72fcca58-736eb7d87f5mr16179174b3a.8.1741837555218; Wed, 12 Mar 2025 20:45:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, pbonzini@redhat.com, philmd@linaro.org Subject: [PATCH 36/37] target/riscv: Remove ifndef CONFIG_USER_ONLY from cpu_cfg.h Date: Wed, 12 Mar 2025 20:45:16 -0700 Message-ID: <20250313034524.3069690-37-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313034524.3069690-1-richard.henderson@linaro.org> References: <20250313034524.3069690-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741837652366019000 Content-Type: text/plain; charset="utf-8" While RISCVCPUConfig.satp_mode is unused for user-only, this header is used from disas/riscv.h, whose users are only built once. The savings of 4 bytes isn't worth it. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- target/riscv/cpu_cfg.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h index 8a843482cc..cfe371b829 100644 --- a/target/riscv/cpu_cfg.h +++ b/target/riscv/cpu_cfg.h @@ -196,9 +196,7 @@ struct RISCVCPUConfig { =20 bool short_isa_string; =20 -#ifndef CONFIG_USER_ONLY RISCVSATPMap satp_mode; -#endif }; =20 typedef struct RISCVCPUConfig RISCVCPUConfig; --=20 2.43.0 From nobody Sun Nov 16 07:44:21 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741838236; cv=none; d=zohomail.com; s=zohoarc; b=YKyhJoNSoK2DLPYtyhmv588OStNcP6hgUeBqDymXr9gAIgkZZ5acUTHcN1ogVnZVNqQ3JdBRkNbAY5CjgIzO/tyzVNJzcUYDDobgaZZUnTFdp7EZYXwBofrCGpozUYVU7ZoELXJX7xz1pH0WJVROXBKcba4flKAooB4GDz0wjyE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741838236; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=n/DByL3ihQv9gjcrJmCBUjllouYG+4z7Wwry9cL7B6M=; b=kZVbmxZ9co/LvvONkx7dIugXthv9eumXA33ah5bcGx3teNuejycl7w/I0M/kkuWnb41tk17C1b4nzayQ9MBqeDc5KRkOIqWAzr8xfbxQCLi+3FT7FRoC21AC2Urpv9Am9p//+4chWA4QuD8eVILmdLeq/+HBCUhyr8Fs9koEtwU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741838236629468.782179241647; Wed, 12 Mar 2025 20:57:16 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tsZWv-0005Jo-MH; Wed, 12 Mar 2025 23:46:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tsZWP-0004jm-Dl for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:13 -0400 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tsZW9-0007ql-O3 for qemu-devel@nongnu.org; Wed, 12 Mar 2025 23:46:12 -0400 Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-224191d92e4so9432275ad.3 for ; Wed, 12 Mar 2025 20:45:57 -0700 (PDT) Received: from stoup.. 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This is intended to prevent files being incorrectly added to common_ss. Remove #ifndef CONFIG_USER_ONLY / #error / #endif blocks. All they do is trigger the poison error. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/exec/poison.h | 5 +++++ include/hw/hw.h | 4 ---- include/system/confidential-guest-support.h | 4 ---- include/system/replay.h | 4 ---- include/system/xen.h | 4 ---- meson.build | 6 ++++-- 6 files changed, 9 insertions(+), 18 deletions(-) diff --git a/include/exec/poison.h b/include/exec/poison.h index 8ed04b3108..a6ffe4577f 100644 --- a/include/exec/poison.h +++ b/include/exec/poison.h @@ -67,4 +67,9 @@ #pragma GCC poison CONFIG_WHPX #pragma GCC poison CONFIG_XEN =20 +#ifndef COMPILING_SYSTEM_VS_USER +#pragma GCC poison CONFIG_USER_ONLY +#pragma GCC poison CONFIG_SOFTMMU +#endif + #endif diff --git a/include/hw/hw.h b/include/hw/hw.h index 045c1c8b09..1b33d12b7f 100644 --- a/include/hw/hw.h +++ b/include/hw/hw.h @@ -1,10 +1,6 @@ #ifndef QEMU_HW_H #define QEMU_HW_H =20 -#ifdef CONFIG_USER_ONLY -#error Cannot include hw/hw.h from user emulation -#endif - G_NORETURN void hw_error(const char *fmt, ...) G_GNUC_PRINTF(1, 2); =20 #endif diff --git a/include/system/confidential-guest-support.h b/include/system/c= onfidential-guest-support.h index b68c4bebbc..ea46b50c56 100644 --- a/include/system/confidential-guest-support.h +++ b/include/system/confidential-guest-support.h @@ -18,10 +18,6 @@ #ifndef QEMU_CONFIDENTIAL_GUEST_SUPPORT_H #define QEMU_CONFIDENTIAL_GUEST_SUPPORT_H =20 -#ifdef CONFIG_USER_ONLY -#error Cannot include system/confidential-guest-support.h from user emulat= ion -#endif - #include "qom/object.h" =20 #define TYPE_CONFIDENTIAL_GUEST_SUPPORT "confidential-guest-support" diff --git a/include/system/replay.h b/include/system/replay.h index 8926d8cf4b..1c87c97fdd 100644 --- a/include/system/replay.h +++ b/include/system/replay.h @@ -11,10 +11,6 @@ #ifndef SYSTEM_REPLAY_H #define SYSTEM_REPLAY_H =20 -#ifdef CONFIG_USER_ONLY -#error Cannot include this header from user emulation -#endif - #include "exec/replay-core.h" #include "qapi/qapi-types-misc.h" #include "qapi/qapi-types-run-state.h" diff --git a/include/system/xen.h b/include/system/xen.h index 990c19a8ef..4ca384c409 100644 --- a/include/system/xen.h +++ b/include/system/xen.h @@ -10,10 +10,6 @@ #ifndef SYSTEM_XEN_H #define SYSTEM_XEN_H =20 -#ifdef CONFIG_USER_ONLY -#error Cannot include system/xen.h from user emulation -#endif - #include "exec/cpu-common.h" =20 #ifdef COMPILING_PER_TARGET diff --git a/meson.build b/meson.build index 3869e5bfbc..c2c71b6f8a 100644 --- a/meson.build +++ b/meson.build @@ -4043,7 +4043,8 @@ common_ss.add_all(when: 'CONFIG_USER_ONLY', if_true: = user_ss) libuser_ss =3D libuser_ss.apply({}) libuser =3D static_library('user', libuser_ss.sources() + genh, - c_args: '-DCONFIG_USER_ONLY', + c_args: ['-DCONFIG_USER_ONLY', + '-DCOMPILING_SYSTEM_VS_USER'], dependencies: libuser_ss.dependencies(), build_by_default: false) libuser =3D declare_dependency(objects: libuser.extract_all_objects(recurs= ive: false), @@ -4053,7 +4054,8 @@ common_ss.add(when: 'CONFIG_USER_ONLY', if_true: libu= ser) libsystem_ss =3D libsystem_ss.apply({}) libsystem =3D static_library('system', libsystem_ss.sources() + genh, - c_args: '-DCONFIG_SOFTMMU', + c_args: ['-DCONFIG_SOFTMMU', + '-DCOMPILING_SYSTEM_VS_USER'], dependencies: libsystem_ss.dependencies(), build_by_default: false) libsystem =3D declare_dependency(objects: libsystem.extract_all_objects(re= cursive: false), --=20 2.43.0