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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1741528350; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ftknb9FJMNHkx3koiZkzj8w2opVTkDQe6gI/VYF/NCk=; b=SFokB4owF4Wcng11FqzTLqYrhEWRr8gdfNpupbbBfySeXillaqEvExo3a8Bl8ZKlOOEd4R wEToVmLUcrceZe4gujtvUhZ5km5BIcgRm8P+w9BpAB7ARb+tcqyuaarnnh0r27zSD6OmV/ HcjcWQVqKGV+6/3QMpRio1KEF7lN6Xc= X-MC-Unique: SH6rXYLINpO32awgYDBvWg-1 X-Mimecast-MFC-AGG-ID: SH6rXYLINpO32awgYDBvWg_1741528346 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Jamin Lin , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PULL 20/46] hw/intc/aspeed: Introduce dynamic allocation for regs array Date: Sun, 9 Mar 2025 14:51:04 +0100 Message-ID: <20250309135130.545764-21-clg@redhat.com> In-Reply-To: <20250309135130.545764-1-clg@redhat.com> References: <20250309135130.545764-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.15 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1741528404893019100 From: Jamin Lin Currently, the size of the "regs" array is 0x2000, which is too large. To s= ave code size and avoid mapping large unused gaps, will update it to only map t= he useful set of registers. This update will support multiple sub-regions with different sizes. To address the redundant size issue, replace the static "regs" array with a dynamically allocated "regs" memory. Introduce a new "aspeed_intc_unrealize" function to free the allocated "reg= s" memory. Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater Link: https://lore.kernel.org/qemu-devel/20250307035945.3698802-4-jamin_lin= @aspeedtech.com Signed-off-by: C=C3=A9dric Le Goater --- include/hw/intc/aspeed_intc.h | 2 +- hw/intc/aspeed_intc.c | 12 +++++++++++- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/include/hw/intc/aspeed_intc.h b/include/hw/intc/aspeed_intc.h index 03324f05ab58..47ea0520b5d8 100644 --- a/include/hw/intc/aspeed_intc.h +++ b/include/hw/intc/aspeed_intc.h @@ -27,7 +27,7 @@ struct AspeedINTCState { MemoryRegion iomem; MemoryRegion iomem_container; =20 - uint32_t regs[ASPEED_INTC_NR_REGS]; + uint32_t *regs; OrIRQState orgates[ASPEED_INTC_NR_INTS]; qemu_irq output_pins[ASPEED_INTC_NR_INTS]; =20 diff --git a/hw/intc/aspeed_intc.c b/hw/intc/aspeed_intc.c index 465f41e4fd35..558901570f82 100644 --- a/hw/intc/aspeed_intc.c +++ b/hw/intc/aspeed_intc.c @@ -289,7 +289,7 @@ static void aspeed_intc_reset(DeviceState *dev) { AspeedINTCState *s =3D ASPEED_INTC(dev); =20 - memset(s->regs, 0, sizeof(s->regs)); + memset(s->regs, 0, ASPEED_INTC_NR_REGS << 2); memset(s->enable, 0, sizeof(s->enable)); memset(s->mask, 0, sizeof(s->mask)); memset(s->pending, 0, sizeof(s->pending)); @@ -307,6 +307,7 @@ static void aspeed_intc_realize(DeviceState *dev, Error= **errp) =20 sysbus_init_mmio(sbd, &s->iomem_container); =20 + s->regs =3D g_new(uint32_t, ASPEED_INTC_NR_REGS); memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_intc_ops, s, TYPE_ASPEED_INTC ".regs", ASPEED_INTC_NR_REGS <<= 2); =20 @@ -322,12 +323,21 @@ static void aspeed_intc_realize(DeviceState *dev, Err= or **errp) } } =20 +static void aspeed_intc_unrealize(DeviceState *dev) +{ + AspeedINTCState *s =3D ASPEED_INTC(dev); + + g_free(s->regs); + s->regs =3D NULL; +} + static void aspeed_intc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); =20 dc->desc =3D "ASPEED INTC Controller"; dc->realize =3D aspeed_intc_realize; + dc->unrealize =3D aspeed_intc_unrealize; device_class_set_legacy_reset(dc, aspeed_intc_reset); dc->vmsd =3D NULL; } --=20 2.48.1