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[174.21.74.48]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-22410a908a0sm51831175ad.162.2025.03.08.14.59.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Mar 2025 14:59:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741474744; x=1742079544; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nAl4pf8E8sE2qLvyFwJ/6sczfmHaPGMTc7HMlUw0GYQ=; b=fdEOrYX0MYKLV5FGoNZXuwV5wzSAa1Y66tiHo8WeHruYGj1B8h1twH1JzoncPfVaF7 zNKrDaRibmLnvrN8D8dv6LpiESCuWP//FZNC2edvKwtT/DGYFfgnzoXW5dAXSphx9/la DVTBrsvnZFu3dvNsVxeWHwlBKSBpGygGz+rTkNkUxt6A/MAr/EktbthxEifa/Yyv+V9M wklk5a9vwMFWWx/oUbYK4yqP8Hd9bNwLbM+Q5ruvyxpdeeQ/fn8tAgMJ7AeyrJhyql+/ AYXz/WMV9gj532LgUPwZsbVXZ+GlBPBHEl+Z7FPbFz0DBpZ6Ay6XMRM4GHGhXhy1c0rc zhgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741474744; x=1742079544; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nAl4pf8E8sE2qLvyFwJ/6sczfmHaPGMTc7HMlUw0GYQ=; b=A3xlfwyB52ZKMJVA1ajEX9uDfoj5Jclkg6OccDz/fg1gmIhYR7dfcnE/2ujfxB8207 N/jLvAOzkunx6O1i1jPjohMWWxKX04J8hPoHuQ92egQwv/6kd1p3FeLaTJO9etkFJ+iM XjD1bLZXsKn948ot+luZWH2VR/u3FNWEXYWYccfbRPMC0tX07v0IYX5vPeiDERAJGtsY dP7pVfLEGQdojAXuLaBkdv9/91DqPhItDCawxGOxVz8HaHUUEMloyvAMiEVWbczQKbY9 iRyEUNdJKMI4k8YX5ck2D7/SasbiZT29HBabT1wGaNSVMqJ02glF8FTSBJeGB/kcIMIj jpmg== X-Gm-Message-State: AOJu0YzX/V7kApHdH0OaG+xKXLLp57tb43wf/n7j7pMRanCRjjE205kr qa9M+oB9+5FNO0l/h8p1DmIq//BX5JfCpHnDtKnmhH1Pp8ZX4P5wOO9f2DT3q5Pi1uZTy6pTnvU j X-Gm-Gg: ASbGncsC+m2+aoanjebb4k/iVfQhbam3OzX/wldD1VdECOjWshJUA/+AznrJjYYGYuf Eldz2gP64O8dIyqOH3Lyp67v1TiZgTbfUHQkdlliAF1lUNnV6lBUPQKc97KPeqKjlxd5EnOxkNa uRG3ksMdDOGSb3oTqaW5QIpLVH4jW6PQMcGakgaHFjIF6xa3c38Ldkk2Dm9STlVa9C287M/yRol Dbs0ZAwANqrZSlxmTyicpjcHpbkRfCOKeYbtNo9uGrqJW4hVzuYey0wb3sqC74Ijp7w9dqadKp4 eTE9NIJlgdiXdOR0z95mNGvfF0SrAUtiC1/Sv3nEXbTCr+TYNrOcy9+piVKJTN5I6MjuWqGU7Ub 5 X-Google-Smtp-Source: AGHT+IGHDGDYT3NF9yTRC8JoEqRr1rOChRHdnPjv3txaRDlpIyKyTQkhIBJ/WJdxE4xorS8TI4fhpg== X-Received: by 2002:a17:902:f708:b0:223:4d5e:76a6 with SMTP id d9443c01a7336-2244f057623mr79708035ad.1.1741474744602; Sat, 08 Mar 2025 14:59:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Andreas Schwab Subject: [PATCH v2] linux-user/riscv: Fix handling of cpu mask in riscv_hwprobe syscall Date: Sat, 8 Mar 2025 14:58:40 -0800 Message-ID: <20250308225902.1208237-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250308225902.1208237-1-richard.henderson@linaro.org> References: <20250308225902.1208237-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741474793279019000 Content-Type: text/plain; charset="utf-8" The third argument of the syscall contains the size of the cpu mask in bytes, not bits. Nor is the size rounded up to a multiple of sizeof(abi_ulong). Cc: qemu-stable@nongnu.org Reported-by: Andreas Schwab Fixes: 9e1c7d982d7 ("linux-user/riscv: Add syscall riscv_hwprobe") Signed-off-by: Richard Henderson Reviewed-by: Alistair Francis --- linux-user/syscall.c | 55 +++++++++++++++++++++++--------------------- 1 file changed, 29 insertions(+), 26 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 02ea4221c9..fcc77c094d 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -9118,35 +9118,38 @@ static void risc_hwprobe_fill_pairs(CPURISCVState *= env, } } =20 -static int cpu_set_valid(abi_long arg3, abi_long arg4) +/* + * If the cpumask_t of (target_cpus, cpusetsize) cannot be read: -EFAULT. + * If the cpumast_t has no bits set: -EINVAL. + * Otherwise the cpumask_t contains some bit set: 0. + * Unlike the kernel, we do not mask cpumask_t by the set of online cpus, + * nor bound the search by cpumask_size(). + */ +static int nonempty_cpu_set(abi_ulong cpusetsize, abi_ptr target_cpus) { - int ret, i, tmp; - size_t host_mask_size, target_mask_size; - unsigned long *host_mask; + unsigned char *p =3D lock_user(VERIFY_READ, target_cpus, cpusetsize, 1= ); + int ret =3D -TARGET_EFAULT; =20 - /* - * cpu_set_t represent CPU masks as bit masks of type unsigned long *. - * arg3 contains the cpu count. - */ - tmp =3D (8 * sizeof(abi_ulong)); - target_mask_size =3D ((arg3 + tmp - 1) / tmp) * sizeof(abi_ulong); - host_mask_size =3D (target_mask_size + (sizeof(*host_mask) - 1)) & - ~(sizeof(*host_mask) - 1); - - host_mask =3D alloca(host_mask_size); - - ret =3D target_to_host_cpu_mask(host_mask, host_mask_size, - arg4, target_mask_size); - if (ret !=3D 0) { - return ret; - } - - for (i =3D 0 ; i < host_mask_size / sizeof(*host_mask); i++) { - if (host_mask[i] !=3D 0) { - return 0; + if (p) { + ret =3D -TARGET_EINVAL; + /* + * Since we only care about the empty/non-empty state of the cpuma= sk_t + * not the individual bits, we do not need to repartition the bits + * from target abi_ulong to host unsigned long. + * + * Note that the kernel does not round up cpusetsize to a multiple= of + * sizeof(abi_ulong). After bounding cpusetsize by cpumask_size(), + * it copies exactly cpusetsize bytes into a zeroed buffer. + */ + for (abi_ulong i =3D 0; i < cpusetsize; ++i) { + if (p[i]) { + ret =3D 0; + break; + } } + unlock_user(p, target_cpus, 0); } - return -TARGET_EINVAL; + return ret; } =20 static abi_long do_riscv_hwprobe(CPUArchState *cpu_env, abi_long arg1, @@ -9163,7 +9166,7 @@ static abi_long do_riscv_hwprobe(CPUArchState *cpu_en= v, abi_long arg1, =20 /* check cpu_set */ if (arg3 !=3D 0) { - ret =3D cpu_set_valid(arg3, arg4); + ret =3D nonempty_cpu_set(arg3, arg4); if (ret !=3D 0) { return ret; } --=20 2.43.0