From nobody Fri Apr 4 14:05:55 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1741320122; cv=none; d=zohomail.com; s=zohoarc; b=CRBaXuHXlxy3dwIN9I1mhAtk4I6Zpu4EOodhbfjQWXB7h86XCY+g3kzIHXp0UgdaWRWyiba0GVHO+kusNkujxOEWhANINHOao04VH6j/qGps1GIko+1HlRdssrXuBCXL+aFy9GbREJ6qEgU6upq59bPwsC3kQvpj7uzVgfHlEls= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741320122; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=rkA766Xmse0lnC8mVBT/8x+SIREd9uVk5CyXdfkcExo=; b=BOY8lWoKY0PlFkZfk/yr4zHjb5eh3ACYRPMhxIIjsDmpp1A8CAW7ORbhi/EiGfnB0bl40cLLFTa9OWOKz+rmMRWkjWii8RGm8NqosSP0JPYmega5Ch9Z7OdOP5S7IHZpY72w1kIFhyWjA6xyWmBZb9hNimGzHlES7551nqs186w= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from=<qemu-devel@nongnu.org> (p=none dis=none) Return-Path: <qemu-devel-bounces+importer=patchew.org@nongnu.org> Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741320122231371.3264984131215; Thu, 6 Mar 2025 20:02:02 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from <qemu-devel-bounces@nongnu.org>) id 1tqOsg-0007nH-SN; Thu, 06 Mar 2025 23:00:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from <jamin_lin@aspeedtech.com>) id 1tqOsb-0007iN-6c; Thu, 06 Mar 2025 23:00:09 -0500 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from <jamin_lin@aspeedtech.com>) id 1tqOsY-0004jN-SY; Thu, 06 Mar 2025 23:00:08 -0500 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Fri, 7 Mar 2025 11:59:48 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Fri, 7 Mar 2025 11:59:48 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= <clg@kaod.org>, Peter Maydell <peter.maydell@linaro.org>, Steven Lee <steven_lee@aspeedtech.com>, Troy Lee <leetroy@gmail.com>, Andrew Jeffery <andrew@codeconstruct.com.au>, "Joel Stanley" <joel@jms.id.au>, "open list:All patches CC here" <qemu-devel@nongnu.org>, "open list:ASPEED BMCs" <qemu-arm@nongnu.org> CC: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= <clg@redhat.com> Subject: [PATCH v6 08/29] hw/arm/aspeed: Rename IRQ table and machine name for AST2700 A0 Date: Fri, 7 Mar 2025 11:59:17 +0800 Message-ID: <20250307035945.3698802-9-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250307035945.3698802-1-jamin_lin@aspeedtech.com> References: <20250307035945.3698802-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Reply-to: Jamin Lin <jamin_lin@aspeedtech.com> From: Jamin Lin via <qemu-devel@nongnu.org> Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1741320125521019100 Currently, AST2700 SoC only supports A0. To support AST2700 A1, rename its = IRQ table and machine name. To follow the machine deprecation rule, the initial machine "ast2700-evb" is aliased to "ast2700a0-evb." In the future, we will alias "ast2700-evb" to n= ew SoCs, such as "ast2700a1-evb." Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: C=C3=A9dric Le Goater <clg@redhat.com> --- hw/arm/aspeed.c | 9 +++++---- hw/arm/aspeed_ast27x0.c | 8 ++++---- 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index c6c18596d6..18f7c450da 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -1673,12 +1673,13 @@ static void ast2700_evb_i2c_init(AspeedMachineState= *bmc) TYPE_TMP105, 0x4d); } =20 -static void aspeed_machine_ast2700_evb_class_init(ObjectClass *oc, void *d= ata) +static void aspeed_machine_ast2700a0_evb_class_init(ObjectClass *oc, void = *data) { MachineClass *mc =3D MACHINE_CLASS(oc); AspeedMachineClass *amc =3D ASPEED_MACHINE_CLASS(oc); =20 - mc->desc =3D "Aspeed AST2700 EVB (Cortex-A35)"; + mc->alias =3D "ast2700-evb"; + mc->desc =3D "Aspeed AST2700 A0 EVB (Cortex-A35)"; amc->soc_name =3D "ast2700-a0"; amc->hw_strap1 =3D AST2700_EVB_HW_STRAP1; amc->hw_strap2 =3D AST2700_EVB_HW_STRAP2; @@ -1817,9 +1818,9 @@ static const TypeInfo aspeed_machine_types[] =3D { .class_init =3D aspeed_minibmc_machine_ast1030_evb_class_init, #ifdef TARGET_AARCH64 }, { - .name =3D MACHINE_TYPE_NAME("ast2700-evb"), + .name =3D MACHINE_TYPE_NAME("ast2700a0-evb"), .parent =3D TYPE_ASPEED_MACHINE, - .class_init =3D aspeed_machine_ast2700_evb_class_init, + .class_init =3D aspeed_machine_ast2700a0_evb_class_init, #endif }, { .name =3D TYPE_ASPEED_MACHINE, diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index 10e1358166..de79724446 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -73,7 +73,7 @@ static const hwaddr aspeed_soc_ast2700_memmap[] =3D { #define AST2700_MAX_IRQ 256 =20 /* Shared Peripheral Interrupt values below are offset by -32 from datashe= et */ -static const int aspeed_soc_ast2700_irqmap[] =3D { +static const int aspeed_soc_ast2700a0_irqmap[] =3D { [ASPEED_DEV_UART0] =3D 132, [ASPEED_DEV_UART1] =3D 132, [ASPEED_DEV_UART2] =3D 132, @@ -762,7 +762,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev= , Error **errp) create_unimplemented_device("ast2700.io", 0x0, 0x4000000); } =20 -static void aspeed_soc_ast2700_class_init(ObjectClass *oc, void *data) +static void aspeed_soc_ast2700a0_class_init(ObjectClass *oc, void *data) { static const char * const valid_cpu_types[] =3D { ARM_CPU_TYPE_NAME("cortex-a35"), @@ -785,7 +785,7 @@ static void aspeed_soc_ast2700_class_init(ObjectClass *= oc, void *data) sc->uarts_num =3D 13; sc->num_cpus =3D 4; sc->uarts_base =3D ASPEED_DEV_UART0; - sc->irqmap =3D aspeed_soc_ast2700_irqmap; + sc->irqmap =3D aspeed_soc_ast2700a0_irqmap; sc->memmap =3D aspeed_soc_ast2700_memmap; sc->get_irq =3D aspeed_soc_ast2700_get_irq; } @@ -800,7 +800,7 @@ static const TypeInfo aspeed_soc_ast27x0_types[] =3D { .name =3D "ast2700-a0", .parent =3D TYPE_ASPEED27X0_SOC, .instance_init =3D aspeed_soc_ast2700_init, - .class_init =3D aspeed_soc_ast2700_class_init, + .class_init =3D aspeed_soc_ast2700a0_class_init, }, }; =20 --=20 2.43.0