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Thu, 06 Mar 2025 23:00:09 -0500 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Fri, 7 Mar 2025 11:59:48 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Fri, 7 Mar 2025 11:59:48 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= <clg@kaod.org>, Peter Maydell <peter.maydell@linaro.org>, Steven Lee <steven_lee@aspeedtech.com>, Troy Lee <leetroy@gmail.com>, Andrew Jeffery <andrew@codeconstruct.com.au>, "Joel Stanley" <joel@jms.id.au>, "open list:All patches CC here" <qemu-devel@nongnu.org>, "open list:ASPEED BMCs" <qemu-arm@nongnu.org> CC: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= <clg@redhat.com> Subject: [PATCH v6 09/29] hw/arm/aspeed_ast27x0: Sort the IRQ table by IRQ number Date: Fri, 7 Mar 2025 11:59:18 +0800 Message-ID: <20250307035945.3698802-10-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250307035945.3698802-1-jamin_lin@aspeedtech.com> References: <20250307035945.3698802-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001, UPPERCASE_50_75=0.008 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Reply-to: Jamin Lin <jamin_lin@aspeedtech.com> From: Jamin Lin via <qemu-devel@nongnu.org> Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1741320049796019100 To improve readability, sort the IRQ table by IRQ number. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: C=C3=A9dric Le Goater <clg@redhat.com> --- hw/arm/aspeed_ast27x0.c | 50 ++++++++++++++++++++--------------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index de79724446..abd1f6b741 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -74,27 +74,13 @@ static const hwaddr aspeed_soc_ast2700_memmap[] =3D { =20 /* Shared Peripheral Interrupt values below are offset by -32 from datashe= et */ static const int aspeed_soc_ast2700a0_irqmap[] =3D { - [ASPEED_DEV_UART0] =3D 132, - [ASPEED_DEV_UART1] =3D 132, - [ASPEED_DEV_UART2] =3D 132, - [ASPEED_DEV_UART3] =3D 132, - [ASPEED_DEV_UART4] =3D 8, - [ASPEED_DEV_UART5] =3D 132, - [ASPEED_DEV_UART6] =3D 132, - [ASPEED_DEV_UART7] =3D 132, - [ASPEED_DEV_UART8] =3D 132, - [ASPEED_DEV_UART9] =3D 132, - [ASPEED_DEV_UART10] =3D 132, - [ASPEED_DEV_UART11] =3D 132, - [ASPEED_DEV_UART12] =3D 132, - [ASPEED_DEV_FMC] =3D 131, [ASPEED_DEV_SDMC] =3D 0, - [ASPEED_DEV_SCU] =3D 12, - [ASPEED_DEV_ADC] =3D 130, + [ASPEED_DEV_HACE] =3D 4, [ASPEED_DEV_XDMA] =3D 5, - [ASPEED_DEV_EMMC] =3D 15, - [ASPEED_DEV_GPIO] =3D 130, + [ASPEED_DEV_UART4] =3D 8, + [ASPEED_DEV_SCU] =3D 12, [ASPEED_DEV_RTC] =3D 13, + [ASPEED_DEV_EMMC] =3D 15, [ASPEED_DEV_TIMER1] =3D 16, [ASPEED_DEV_TIMER2] =3D 17, [ASPEED_DEV_TIMER3] =3D 18, @@ -103,19 +89,33 @@ static const int aspeed_soc_ast2700a0_irqmap[] =3D { [ASPEED_DEV_TIMER6] =3D 21, [ASPEED_DEV_TIMER7] =3D 22, [ASPEED_DEV_TIMER8] =3D 23, - [ASPEED_DEV_WDT] =3D 131, - [ASPEED_DEV_PWM] =3D 131, + [ASPEED_DEV_DP] =3D 28, [ASPEED_DEV_LPC] =3D 128, [ASPEED_DEV_IBT] =3D 128, + [ASPEED_DEV_KCS] =3D 128, + [ASPEED_DEV_ADC] =3D 130, + [ASPEED_DEV_GPIO] =3D 130, [ASPEED_DEV_I2C] =3D 130, - [ASPEED_DEV_PECI] =3D 133, + [ASPEED_DEV_FMC] =3D 131, + [ASPEED_DEV_WDT] =3D 131, + [ASPEED_DEV_PWM] =3D 131, + [ASPEED_DEV_I3C] =3D 131, + [ASPEED_DEV_UART0] =3D 132, + [ASPEED_DEV_UART1] =3D 132, + [ASPEED_DEV_UART2] =3D 132, + [ASPEED_DEV_UART3] =3D 132, + [ASPEED_DEV_UART5] =3D 132, + [ASPEED_DEV_UART6] =3D 132, + [ASPEED_DEV_UART7] =3D 132, + [ASPEED_DEV_UART8] =3D 132, + [ASPEED_DEV_UART9] =3D 132, + [ASPEED_DEV_UART10] =3D 132, + [ASPEED_DEV_UART11] =3D 132, + [ASPEED_DEV_UART12] =3D 132, [ASPEED_DEV_ETH1] =3D 132, [ASPEED_DEV_ETH2] =3D 132, [ASPEED_DEV_ETH3] =3D 132, - [ASPEED_DEV_HACE] =3D 4, - [ASPEED_DEV_KCS] =3D 128, - [ASPEED_DEV_DP] =3D 28, - [ASPEED_DEV_I3C] =3D 131, + [ASPEED_DEV_PECI] =3D 133, [ASPEED_DEV_SDHCI] =3D 133, }; =20 --=20 2.43.0