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Thu, 06 Mar 2025 10:01:44 -0800 (PST) From: Tomita Moeko To: Alex Williamson , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Cc: qemu-devel@nongnu.org, =?UTF-8?q?Corvin=20K=C3=B6hne?= , Tomita Moeko Subject: [PATCH v3 03/10] vfio/igd: Consolidate OpRegion initialization into a single function Date: Fri, 7 Mar 2025 02:01:23 +0800 Message-ID: <20250306180131.32970-4-tomitamoeko@gmail.com> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250306180131.32970-1-tomitamoeko@gmail.com> References: <20250306180131.32970-1-tomitamoeko@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::644; envelope-from=tomitamoeko@gmail.com; helo=mail-pl1-x644.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1741284203932019000 Content-Type: text/plain; charset="utf-8" Both x-igd-opregion option and legacy mode require identical steps to set up OpRegion for IGD devices. Consolidate these steps into a single vfio_pci_igd_setup_opregion function. The function call in pci.c is wrapped with ifdef temporarily to prevent build error for non-x86 archs, it will be removed after we decouple it from legacy mode. Additionally, move vfio_pci_igd_opregion_init to igd.c to prevent it from being compiled in non-x86 builds. Signed-off-by: Tomita Moeko --- hw/vfio/igd.c | 101 +++++++++++++++++++++++++++++++++++-------- hw/vfio/pci-quirks.c | 50 --------------------- hw/vfio/pci.c | 22 ++-------- hw/vfio/pci.h | 4 +- 4 files changed, 88 insertions(+), 89 deletions(-) diff --git a/hw/vfio/igd.c b/hw/vfio/igd.c index dda4c7bb5d..50e4007abe 100644 --- a/hw/vfio/igd.c +++ b/hw/vfio/igd.c @@ -106,6 +106,7 @@ static int igd_gen(VFIOPCIDevice *vdev) return -1; } =20 +#define IGD_ASLS 0xfc /* ASL Storage Register */ #define IGD_GMCH 0x50 /* Graphics Control Register */ #define IGD_BDSM 0x5c /* Base Data of Stolen Memory */ #define IGD_BDSM_GEN11 0xc0 /* Base Data of Stolen Memory of gen 11 and la= ter */ @@ -138,6 +139,82 @@ static uint64_t igd_stolen_memory_size(int gen, uint32= _t gmch) return 0; } =20 +/* + * The OpRegion includes the Video BIOS Table, which seems important for + * telling the driver what sort of outputs it has. Without this, the devi= ce + * may work in the guest, but we may not get output. This also requires B= IOS + * support to reserve and populate a section of guest memory sufficient for + * the table and to write the base address of that memory to the ASLS regi= ster + * of the IGD device. + */ +static bool vfio_pci_igd_opregion_init(VFIOPCIDevice *vdev, + struct vfio_region_info *info, + Error **errp) +{ + int ret; + + vdev->igd_opregion =3D g_malloc0(info->size); + ret =3D pread(vdev->vbasedev.fd, vdev->igd_opregion, + info->size, info->offset); + if (ret !=3D info->size) { + error_setg(errp, "failed to read IGD OpRegion"); + g_free(vdev->igd_opregion); + vdev->igd_opregion =3D NULL; + return false; + } + + /* + * Provide fw_cfg with a copy of the OpRegion which the VM firmware is= to + * allocate 32bit reserved memory for, copy these contents into, and w= rite + * the reserved memory base address to the device ASLS register at 0xF= C. + * Alignment of this reserved region seems flexible, but using a 4k pa= ge + * alignment seems to work well. This interface assumes a single IGD + * device, which may be at VM address 00:02.0 in legacy mode or another + * address in UPT mode. + * + * NB, there may be future use cases discovered where the VM should ha= ve + * direct interaction with the host OpRegion, in which case the write = to + * the ASLS register would trigger MemoryRegion setup to enable that. + */ + fw_cfg_add_file(fw_cfg_find(), "etc/igd-opregion", + vdev->igd_opregion, info->size); + + trace_vfio_pci_igd_opregion_enabled(vdev->vbasedev.name); + + pci_set_long(vdev->pdev.config + IGD_ASLS, 0); + pci_set_long(vdev->pdev.wmask + IGD_ASLS, ~0); + pci_set_long(vdev->emulated_config_bits + IGD_ASLS, ~0); + + return true; +} + +bool vfio_pci_igd_setup_opregion(VFIOPCIDevice *vdev, Error **errp) +{ + g_autofree struct vfio_region_info *opregion =3D NULL; + int ret; + + /* Hotplugging is not supprted for opregion access */ + if (vdev->pdev.qdev.hotplugged) { + error_setg(errp, "IGD OpRegion is not supported on hotplugged devi= ce"); + return false; + } + + ret =3D vfio_get_dev_region_info(&vdev->vbasedev, + VFIO_REGION_TYPE_PCI_VENDOR_TYPE | PCI_VENDOR_ID_INTEL, + VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION, &opregion); + if (ret) { + error_setg_errno(errp, -ret, + "Device does not supports IGD OpRegion feature"); + return false; + } + + if (!vfio_pci_igd_opregion_init(vdev, opregion, errp)) { + return false; + } + + return true; +} + /* * The rather short list of registers that we copy from the host devices. * The LPC/ISA bridge values are definitely needed to support the vBIOS, t= he @@ -342,7 +419,6 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int= nr) void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr) { g_autofree struct vfio_region_info *rom =3D NULL; - g_autofree struct vfio_region_info *opregion =3D NULL; g_autofree struct vfio_region_info *host =3D NULL; g_autofree struct vfio_region_info *lpc =3D NULL; PCIDevice *lpc_bridge; @@ -418,15 +494,6 @@ void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, in= t nr) * Check whether we have all the vfio device specific regions to * support legacy mode (added in Linux v4.6). If not, bail. */ - ret =3D vfio_get_dev_region_info(&vdev->vbasedev, - VFIO_REGION_TYPE_PCI_VENDOR_TYPE | PCI_VENDOR_ID_I= NTEL, - VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION, &opregion); - if (ret) { - error_report("IGD device %s does not support OpRegion access," - "legacy mode disabled", vdev->vbasedev.name); - return; - } - ret =3D vfio_get_dev_region_info(&vdev->vbasedev, VFIO_REGION_TYPE_PCI_VENDOR_TYPE | PCI_VENDOR_ID_I= NTEL, VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG, &host); @@ -459,6 +526,13 @@ void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, in= t nr) return; } =20 + /* Setup OpRegion access */ + if (!vfio_pci_igd_setup_opregion(vdev, &err)) { + error_append_hint(&err, "IGD legacy mode disabled\n"); + error_report_err(err); + return; + } + /* Create our LPC/ISA bridge */ ret =3D vfio_pci_igd_lpc_init(vdev, lpc); if (ret) { @@ -475,13 +549,6 @@ void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, in= t nr) return; } =20 - /* Setup OpRegion access */ - if (!vfio_pci_igd_opregion_init(vdev, opregion, &err)) { - error_append_hint(&err, "IGD legacy mode disabled\n"); - error_reportf_err(err, VFIO_MSG_PREFIX, vdev->vbasedev.name); - return; - } - /* * Allow user to override dsm size using x-igd-gms option, in multiple= s of * 32MiB. This option should only be used when the desired size cannot= be diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c index fbe43b0a79..cac0aa1910 100644 --- a/hw/vfio/pci-quirks.c +++ b/hw/vfio/pci-quirks.c @@ -1114,56 +1114,6 @@ static void vfio_probe_rtl8168_bar2_quirk(VFIOPCIDev= ice *vdev, int nr) trace_vfio_quirk_rtl8168_probe(vdev->vbasedev.name); } =20 -#define IGD_ASLS 0xfc /* ASL Storage Register */ - -/* - * The OpRegion includes the Video BIOS Table, which seems important for - * telling the driver what sort of outputs it has. Without this, the devi= ce - * may work in the guest, but we may not get output. This also requires B= IOS - * support to reserve and populate a section of guest memory sufficient for - * the table and to write the base address of that memory to the ASLS regi= ster - * of the IGD device. - */ -bool vfio_pci_igd_opregion_init(VFIOPCIDevice *vdev, - struct vfio_region_info *info, Error **err= p) -{ - int ret; - - vdev->igd_opregion =3D g_malloc0(info->size); - ret =3D pread(vdev->vbasedev.fd, vdev->igd_opregion, - info->size, info->offset); - if (ret !=3D info->size) { - error_setg(errp, "failed to read IGD OpRegion"); - g_free(vdev->igd_opregion); - vdev->igd_opregion =3D NULL; - return false; - } - - /* - * Provide fw_cfg with a copy of the OpRegion which the VM firmware is= to - * allocate 32bit reserved memory for, copy these contents into, and w= rite - * the reserved memory base address to the device ASLS register at 0xF= C. - * Alignment of this reserved region seems flexible, but using a 4k pa= ge - * alignment seems to work well. This interface assumes a single IGD - * device, which may be at VM address 00:02.0 in legacy mode or another - * address in UPT mode. - * - * NB, there may be future use cases discovered where the VM should ha= ve - * direct interaction with the host OpRegion, in which case the write = to - * the ASLS register would trigger MemoryRegion setup to enable that. - */ - fw_cfg_add_file(fw_cfg_find(), "etc/igd-opregion", - vdev->igd_opregion, info->size); - - trace_vfio_pci_igd_opregion_enabled(vdev->vbasedev.name); - - pci_set_long(vdev->pdev.config + IGD_ASLS, 0); - pci_set_long(vdev->pdev.wmask + IGD_ASLS, ~0); - pci_set_long(vdev->emulated_config_bits + IGD_ASLS, ~0); - - return true; -} - /* * Common quirk probe entry points. */ diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 89d900e9cf..098d17b866 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -3132,30 +3132,14 @@ static void vfio_realize(PCIDevice *pdev, Error **e= rrp) vfio_bar_quirk_setup(vdev, i); } =20 +#ifdef CONFIG_VFIO_IGD if (!vdev->igd_opregion && vdev->features & VFIO_FEATURE_ENABLE_IGD_OPREGION) { - g_autofree struct vfio_region_info *opregion =3D NULL; - - if (vdev->pdev.qdev.hotplugged) { - error_setg(errp, - "cannot support IGD OpRegion feature on hotplugged " - "device"); - goto out_unset_idev; - } - - ret =3D vfio_get_dev_region_info(vbasedev, - VFIO_REGION_TYPE_PCI_VENDOR_TYPE | PCI_VENDOR_ID_I= NTEL, - VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION, &opregion); - if (ret) { - error_setg_errno(errp, -ret, - "does not support requested IGD OpRegion feat= ure"); - goto out_unset_idev; - } - - if (!vfio_pci_igd_opregion_init(vdev, opregion, errp)) { + if (!vfio_pci_igd_setup_opregion(vdev, errp)) { goto out_unset_idev; } } +#endif =20 /* QEMU emulates all of MSI & MSIX */ if (pdev->cap_present & QEMU_PCI_CAP_MSIX) { diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h index 43c166680a..4763f14415 100644 --- a/hw/vfio/pci.h +++ b/hw/vfio/pci.h @@ -228,9 +228,7 @@ int vfio_pci_get_pci_hot_reset_info(VFIOPCIDevice *vdev, =20 bool vfio_populate_vga(VFIOPCIDevice *vdev, Error **errp); =20 -bool vfio_pci_igd_opregion_init(VFIOPCIDevice *vdev, - struct vfio_region_info *info, - Error **errp); +bool vfio_pci_igd_setup_opregion(VFIOPCIDevice *vdev, Error **errp); =20 void vfio_display_reset(VFIOPCIDevice *vdev); bool vfio_display_probe(VFIOPCIDevice *vdev, Error **errp); --=20 2.47.2