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Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20250211162604.83446-1-philmd@linaro.org> --- target/alpha/fpu_helper.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/target/alpha/fpu_helper.c b/target/alpha/fpu_helper.c index f810a9b6a47..6aefb9b851a 100644 --- a/target/alpha/fpu_helper.c +++ b/target/alpha/fpu_helper.c @@ -455,29 +455,28 @@ static uint64_t do_cvttq(CPUAlphaState *env, uint64_t= a, int roundmode) { float64 fa; int64_t ret; - uint32_t exc; + uint32_t exc =3D 0; + int flags; =20 fa =3D t_to_float64(a); ret =3D float64_to_int64_modulo(fa, roundmode, &FP_STATUS); =20 - exc =3D get_float_exception_flags(&FP_STATUS); - if (unlikely(exc)) { + flags =3D get_float_exception_flags(&FP_STATUS); + if (unlikely(flags)) { set_float_exception_flags(0, &FP_STATUS); =20 /* We need to massage the resulting exceptions. */ - if (exc & float_flag_invalid_cvti) { + if (flags & float_flag_invalid_cvti) { /* Overflow, either normal or infinity. */ if (float64_is_infinity(fa)) { exc =3D FPCR_INV; } else { exc =3D FPCR_IOV | FPCR_INE; } - } else if (exc & float_flag_invalid) { + } else if (flags & float_flag_invalid) { exc =3D FPCR_INV; - } else if (exc & float_flag_inexact) { + } else if (flags & float_flag_inexact) { exc =3D FPCR_INE; - } else { - exc =3D 0; } } env->error_code =3D exc; --=20 2.47.1