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Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20241105130431.22564-17-philmd@linaro.org> --- target/microblaze/cpu.h | 7 +++++++ target/microblaze/translate.c | 5 +++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index f6879eee352..e44ddd53078 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -414,6 +414,13 @@ void mb_translate_code(CPUState *cs, TranslationBlock = *tb, /* Ensure there is no overlap between the two masks. */ QEMU_BUILD_BUG_ON(MSR_TB_MASK & IFLAGS_TB_MASK); =20 +static inline bool mb_cpu_is_big_endian(CPUState *cs) +{ + MicroBlazeCPU *cpu =3D MICROBLAZE_CPU(cs); + + return !cpu->cfg.endi; +} + static inline void cpu_get_tb_cpu_state(CPUMBState *env, vaddr *pc, uint64_t *cs_base, uint32_t *flags) { diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index b5389d65b2e..b54e5ac4b2f 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -710,7 +710,7 @@ static void record_unaligned_ess(DisasContext *dc, int = rd, =20 static inline MemOp mo_endian(DisasContext *dc) { - return MO_TE; + return dc->cfg->endi ? MO_LE : MO_BE; } =20 static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop, @@ -1647,7 +1647,8 @@ static void mb_tr_translate_insn(DisasContextBase *dc= b, CPUState *cs) =20 dc->tb_flags_to_set =3D 0; =20 - ir =3D translator_ldl(cpu_env(cs), &dc->base, dc->base.pc_next); + ir =3D translator_ldl_swap(cpu_env(cs), &dc->base, dc->base.pc_next, + mb_cpu_is_big_endian(cs) !=3D TARGET_BIG_ENDI= AN); if (!decode(dc, ir)) { trap_illegal(dc, true); } --=20 2.47.1