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Thu, 6 Mar 2025 18:38:55 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Thu, 6 Mar 2025 18:38:55 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:All patches CC here" , "open list:ASPEED BMCs" CC: , Subject: [PATCH v5 24/29] hw/arm/aspeed_ast27x0: Sort the memmap table by mapping address Date: Thu, 6 Mar 2025 18:38:32 +0800 Message-ID: <20250306103846.429221-25-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250306103846.429221-1-jamin_lin@aspeedtech.com> References: <20250306103846.429221-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1741257838468019000 Content-Type: text/plain; charset="utf-8" To improve readability, sort the memmap table by mapping address Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater --- hw/arm/aspeed_ast27x0.c | 54 ++++++++++++++++++++--------------------- 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index 7439512b83..3330484bf5 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -24,16 +24,40 @@ #include "qemu/log.h" =20 static const hwaddr aspeed_soc_ast2700_memmap[] =3D { - [ASPEED_DEV_SPI_BOOT] =3D 0x100000000, [ASPEED_DEV_SRAM] =3D 0x10000000, + [ASPEED_DEV_HACE] =3D 0x12070000, + [ASPEED_DEV_EMMC] =3D 0x12090000, + [ASPEED_DEV_INTC] =3D 0x12100000, + [ASPEED_GIC_DIST] =3D 0x12200000, + [ASPEED_GIC_REDIST] =3D 0x12280000, [ASPEED_DEV_SDMC] =3D 0x12C00000, [ASPEED_DEV_SCU] =3D 0x12C02000, + [ASPEED_DEV_RTC] =3D 0x12C0F000, + [ASPEED_DEV_TIMER1] =3D 0x12C10000, + [ASPEED_DEV_SLI] =3D 0x12C17000, + [ASPEED_DEV_UART4] =3D 0X12C1A000, + [ASPEED_DEV_FMC] =3D 0x14000000, + [ASPEED_DEV_SPI0] =3D 0x14010000, + [ASPEED_DEV_SPI1] =3D 0x14020000, + [ASPEED_DEV_SPI2] =3D 0x14030000, + [ASPEED_DEV_MII1] =3D 0x14040000, + [ASPEED_DEV_MII2] =3D 0x14040008, + [ASPEED_DEV_MII3] =3D 0x14040010, + [ASPEED_DEV_ETH1] =3D 0x14050000, + [ASPEED_DEV_ETH2] =3D 0x14060000, + [ASPEED_DEV_ETH3] =3D 0x14070000, + [ASPEED_DEV_SDHCI] =3D 0x14080000, + [ASPEED_DEV_ADC] =3D 0x14C00000, [ASPEED_DEV_SCUIO] =3D 0x14C02000, + [ASPEED_DEV_GPIO] =3D 0x14C0B000, + [ASPEED_DEV_I2C] =3D 0x14C0F000, + [ASPEED_DEV_INTCIO] =3D 0x14C18000, + [ASPEED_DEV_SLIIO] =3D 0x14C1E000, + [ASPEED_DEV_VUART] =3D 0X14C30000, [ASPEED_DEV_UART0] =3D 0X14C33000, [ASPEED_DEV_UART1] =3D 0X14C33100, [ASPEED_DEV_UART2] =3D 0X14C33200, [ASPEED_DEV_UART3] =3D 0X14C33300, - [ASPEED_DEV_UART4] =3D 0X12C1A000, [ASPEED_DEV_UART5] =3D 0X14C33400, [ASPEED_DEV_UART6] =3D 0X14C33500, [ASPEED_DEV_UART7] =3D 0X14C33600, @@ -43,32 +67,8 @@ static const hwaddr aspeed_soc_ast2700_memmap[] =3D { [ASPEED_DEV_UART11] =3D 0X14C33A00, [ASPEED_DEV_UART12] =3D 0X14C33B00, [ASPEED_DEV_WDT] =3D 0x14C37000, - [ASPEED_DEV_VUART] =3D 0X14C30000, - [ASPEED_DEV_FMC] =3D 0x14000000, - [ASPEED_DEV_SPI0] =3D 0x14010000, - [ASPEED_DEV_SPI1] =3D 0x14020000, - [ASPEED_DEV_SPI2] =3D 0x14030000, + [ASPEED_DEV_SPI_BOOT] =3D 0x100000000, [ASPEED_DEV_SDRAM] =3D 0x400000000, - [ASPEED_DEV_MII1] =3D 0x14040000, - [ASPEED_DEV_MII2] =3D 0x14040008, - [ASPEED_DEV_MII3] =3D 0x14040010, - [ASPEED_DEV_ETH1] =3D 0x14050000, - [ASPEED_DEV_ETH2] =3D 0x14060000, - [ASPEED_DEV_ETH3] =3D 0x14070000, - [ASPEED_DEV_EMMC] =3D 0x12090000, - [ASPEED_DEV_INTC] =3D 0x12100000, - [ASPEED_DEV_INTCIO] =3D 0x14C18000, - [ASPEED_DEV_SLI] =3D 0x12C17000, - [ASPEED_DEV_SLIIO] =3D 0x14C1E000, - [ASPEED_GIC_DIST] =3D 0x12200000, - [ASPEED_GIC_REDIST] =3D 0x12280000, - [ASPEED_DEV_ADC] =3D 0x14C00000, - [ASPEED_DEV_I2C] =3D 0x14C0F000, - [ASPEED_DEV_GPIO] =3D 0x14C0B000, - [ASPEED_DEV_RTC] =3D 0x12C0F000, - [ASPEED_DEV_SDHCI] =3D 0x14080000, - [ASPEED_DEV_TIMER1] =3D 0x12C10000, - [ASPEED_DEV_HACE] =3D 0x12070000, }; =20 #define AST2700_MAX_IRQ 256 --=20 2.43.0