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Tue, 04 Mar 2025 23:50:55 -0800 (PST) X-Google-Smtp-Source: AGHT+IEXU1B1JcGQTMlqXXan+JhbuUQpcbKd5VDvptLjdnXzUlMCc+I9+8T5jnWKgnhS6oWObYElUg== X-Received: by 2002:a17:903:8c5:b0:223:f7ec:f834 with SMTP id d9443c01a7336-223f7ecf8a5mr17739325ad.31.1741161055596; Tue, 04 Mar 2025 23:50:55 -0800 (PST) From: Ani Sinha To: Sergio Lopez , Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S. Tsirkin" , Marcel Apfelbaum , Zhao Liu Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org, Ani Sinha , imammedo@redhat.com Subject: [PULL 3/3] microvm: do not use the lastest cpu version Date: Wed, 5 Mar 2025 13:20:15 +0530 Message-ID: <20250305075015.26892-4-anisinha@redhat.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20250305075015.26892-1-anisinha@redhat.com> References: <20250305075015.26892-1-anisinha@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=anisinha@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1741161107613019000 Content-Type: text/plain; charset="utf-8" commit 0788a56bd1ae3 ("i386: Make unversioned CPU models be aliases") introduced 'default_cpu_version' for PCMachineClass. This created three categories of CPU models: - Most unversioned CPU models would use version 1 by default. - For machines 4.0.1 and older that do not support cpu model aliases, a special default_cpu_version value of CPU_VERSION_LEGACY is used. - It was thought that future machines would use the latest value of cpu versions corresponding to default_cpu_version value of CPU_VERSION_LATEST [1]. All pc machines still use the default cpu version of 1 for unversioned cpu models. CPU_VERSION_LATEST is a moving target and changes with time. Therefore, if machines use CPU_VERSION_LATEST, it would mean that over a period of time, for the same versioned machine type, the cpu version would be different depending on what the latest was at that time. This would break guests even when they use a constant specific versioned machine type. Additionally, microvm machines are not versioned anyway and therefore there is no requirement to use the latest cpu model by default. Let microvms use the non-versioned cpu model and remove all references to CPU_VERSION_LATEST as there are no other users (nor we anticipate future consumers of CPU_VERSION_LATEST). Those users who need spefific cpu versions can use explicit version in the QEMU command line to select the specific cpu version desired. CI pipline does not break with this change. 1) See commit dcafd1ef0af227 ("i386: Register versioned CPU models") CC: imammedo@redhat.com CC: zhao1.liu@intel.com Message-ID: <20250220065326.312596-1-anisinha@redhat.com> Reviewed-by: Igor Mammedov Reviewed-by: Sergio Lopez Signed-off-by: Ani Sinha Reviewed-by: Zhao Liu --- hw/i386/microvm.c | 2 +- target/i386/cpu.c | 15 --------------- target/i386/cpu.h | 4 ---- 3 files changed, 1 insertion(+), 20 deletions(-) diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c index d0a236c74f..a340a5fd39 100644 --- a/hw/i386/microvm.c +++ b/hw/i386/microvm.c @@ -491,7 +491,7 @@ static void microvm_machine_state_init(MachineState *ma= chine) =20 microvm_memory_init(mms); =20 - x86_cpus_init(x86ms, CPU_VERSION_LATEST); + x86_cpus_init(x86ms, 1); =20 microvm_devices_init(mms); } diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 0cd9b70938..2da2cf36fd 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5640,18 +5640,6 @@ void x86_cpu_set_default_version(X86CPUVersion versi= on) default_cpu_version =3D version; } =20 -static X86CPUVersion x86_cpu_model_last_version(const X86CPUModel *model) -{ - int v =3D 0; - const X86CPUVersionDefinition *vdef =3D - x86_cpu_def_get_versions(model->cpudef); - while (vdef->version) { - v =3D vdef->version; - vdef++; - } - return v; -} - /* Return the actual version being used for a specific CPU model */ static X86CPUVersion x86_cpu_model_resolve_version(const X86CPUModel *mode= l) { @@ -5659,9 +5647,6 @@ static X86CPUVersion x86_cpu_model_resolve_version(co= nst X86CPUModel *model) if (v =3D=3D CPU_VERSION_AUTO) { v =3D default_cpu_version; } - if (v =3D=3D CPU_VERSION_LATEST) { - return x86_cpu_model_last_version(model); - } return v; } =20 diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 10ce019e3f..113cf10aea 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2740,10 +2740,6 @@ void apic_handle_tpr_access_report(DeviceState *d, t= arget_ulong ip, TPRAccess access); =20 /* Special values for X86CPUVersion: */ - -/* Resolve to latest CPU version */ -#define CPU_VERSION_LATEST -1 - /* * Resolve to version defined by current machine type. * See x86_cpu_set_default_version() --=20 2.42.0