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[2403:580b:97e8:0:82ce:f179:8a79:69f4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-223501f9e04sm102583695ad.87.2025.03.04.17.55.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Mar 2025 17:55:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1741139708; x=1741744508; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=geC3U75yXm61oV1WPeiHQMiW6u0uu3Ls5xAzTiODQ6A=; b=ZXFQg7g7+V891TG94WnW6BqqpS56WxXCY077iY6Dld6qz3qrNRlEYd+ZIqSfr7z4+K h8K4vdUOv7nxYZqDbeVFDdmE0aDZsN659IiVz4dw0CPTKEIkDOnQDV8Ow16X9FvzdVI4 vv0g9B466GxfPqIevW3lmy+DHyhRFxVEJYowKPJCwByWmq56M43tpvwiruXeJbpXb8s4 nJLdvmAAbpfg4jBFGXr/5Mo8pIgD5HBgUC7efgLSFPrfyR7BfVwHgiozJ/9XPnFPHr8/ hDLFksSrd8vB8CM5vYhiN2vpX5vo2rR1UhuNAU7sP0BYm/5Uprks/nzAx+ov6ggYoRkQ TJtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741139708; x=1741744508; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=geC3U75yXm61oV1WPeiHQMiW6u0uu3Ls5xAzTiODQ6A=; b=nrU7gCzJpFwJ8O8X0XJ+gQmW0a0tsXe23/Eoy5p8uUpJCCbNWSMbdUyPhMkPSE7fvv RgF73qyKhyST3PXf7fu13LvGpBSc52mX16PWBpqJtudPOtoZz8w89G96ioYyOArmEh40 2xTR4GfU36CDGldR2A7EcNxT/s6YOVy4ZOn0UGJRIi6Qwm/py+dJIfDCKQWZ338Hj8KZ 9x3jLfKRCJzBtGSsvOnjlNc4HrSVlA7lCShBmK6Wicq6HOmhvXMr6Jv6gWbyBxb2SupA vrQNO1LVTNipOuZMLRlMFQlbAaJCgLg8SD2YiBlpHY34GJqqzpYgaflkkev+gbGMAq66 9tUQ== X-Gm-Message-State: AOJu0YyK/ABU007+kwuv2HAEXsmN06qYCCxmETprDQNgERsK55d24lbm kfURN5IQFNq9fk2A1ZEma+AL7MsSkNCj/w3E3M0Q/QaLmGX379KhASjQJCOdnL4= X-Gm-Gg: ASbGncufaHp3xDzR16IBJWsNhu8/lAMPuslLbxQKsXGMNCT3mlNkRj4MpGGuG6HX36b w6E4Nhxyrac5SFbvCjfCLrj4wUSqWiWgFZ08jOYF5CcShvqTpEqYoeG5RorspgY7uaduUCUIXf0 8v4kTBPx/dYqgrxt4FJJXpj7DtNab1fCN4HdGR2gZcxzX+J6WATHlyrhyp5oFsoF4NGUxkJSbSM SBOJKATukZ1kc1evaGF1lRMez9eMm9T4gPYLeg4xX5KkehoBSpnVJZGEtIv0yhUJWriWI4iEsxF 0MjKI68A7yW7QEBif76szmQbcy/ptM7QHQEtnnR4ewtK7DA2XQ0qA8nURfRGBnWj+X/ib8GVnpQ Zn98ry3VxQ+mmX1k2nqbL8QOooJEy+CDCs6u4hprU5MntI2+zrZQ= X-Google-Smtp-Source: AGHT+IEWTl1/CoGcnaeNYvn7fnYILo7umEFWSa9BsUKsMARmYD2c3QD/hr4QtlPEYg9J061thkjsbQ== X-Received: by 2002:a17:903:186:b0:21a:8300:b9d5 with SMTP id d9443c01a7336-223f1ca5aecmr17107215ad.23.1741139708455; Tue, 04 Mar 2025 17:55:08 -0800 (PST) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis Subject: [PULL 39/59] hw/riscv/riscv-iommu.h: add missing headers Date: Wed, 5 Mar 2025 11:52:47 +1000 Message-ID: <20250305015307.1463560-40-alistair.francis@wdc.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250305015307.1463560-1-alistair.francis@wdc.com> References: <20250305015307.1463560-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=alistair23@gmail.com; helo=mail-pl1-x631.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1741139942880019000 From: Daniel Henrique Barboza This header is incomplete, i.e. it is using definitions that are being supplied by the .c files that are including it. Adding this header into a fresh .c file will result in errors: /home/danielhb/work/qemu/hw/riscv/riscv-iommu.h:30:17: error: field =E2=80= =98parent_obj=E2=80=99 has incomplete type 30 | DeviceState parent_obj; | ^~~~~~~~~~ /home/danielhb/work/qemu/hw/riscv/riscv-iommu.h:50:5: error: unknown type n= ame =E2=80=98dma_addr_t=E2=80=99; did you mean =E2=80=98in_addr_t=E2=80=99? 50 | dma_addr_t cq_addr; /* Command queue base physical address */ | ^~~~~~~~~~ | in_addr_t (...) /home/danielhb/work/qemu/hw/riscv/riscv-iommu.h:62:5: error: unknown type n= ame =E2=80=98QemuThread=E2=80=99; did you mean =E2=80=98GThread=E2=80=99? 62 | QemuThread core_proc; /* Background processing thread */ | ^~~~~~~~~~ | GThread /home/danielhb/work/qemu/hw/riscv/riscv-iommu.h:63:5: error: unknown type n= ame =E2=80=98QemuCond=E2=80=99 63 | QemuCond core_cond; /* Background processing wake up signal */ | ^~~~~~~~ /home/danielhb/work/qemu/hw/riscv/riscv-iommu.h:71:18: error: field =E2=80= =98trap_as=E2=80=99 has incomplete type 71 | AddressSpace trap_as; | ^~~~~~~ /home/danielhb/work/qemu/hw/riscv/riscv-iommu.h:72:18: error: field =E2=80= =98trap_mr=E2=80=99 has incomplete type 72 | MemoryRegion trap_mr; | ^~~~~~~ /home/danielhb/work/qemu/hw/riscv/riscv-iommu.h:80:18: error: field =E2=80= =98regs_mr=E2=80=99 has incomplete type 80 | MemoryRegion regs_mr; | ^~~~~~~ Fix it by adding the missing headers for these definitions. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20250224190826.1858473-2-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis --- hw/riscv/riscv-iommu.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/riscv/riscv-iommu.h b/hw/riscv/riscv-iommu.h index fa8a50fa24..d2608d2f9b 100644 --- a/hw/riscv/riscv-iommu.h +++ b/hw/riscv/riscv-iommu.h @@ -20,6 +20,8 @@ #define HW_RISCV_IOMMU_STATE_H =20 #include "qom/object.h" +#include "hw/qdev-properties.h" +#include "system/dma.h" #include "hw/riscv/iommu.h" #include "hw/riscv/riscv-iommu-bits.h" =20 --=20 2.48.1