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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43bd4292af0sm2020075e9.12.2025.03.04.17.24.10 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:24:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137851; x=1741742651; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=H0YNIJlxmbjMyr4LODgtrAg0p6qQTSAHOFsEzvnJxFk=; b=nS4DNtB4pnJCHZSbvX5cy1fNttUxfSwS1EUQ3gRI0GemZkRrIDf5Wwmf6mTW4+T9LD EIBBZxU3ALVsKPgBp/aA85+KE/d4wtEYp/YIZux6Nsf2E8j2zddhrnqUQBLgkbQkCgt7 Q914r8u4zG49i1rMsaYN6hOrQqlcecyQuVys8PXP3biJhgg9vxHP+t2cpwjWak0N+jlw 3TAnxLivCyCsV304FuOyICeGISsOsSDPjQ2/bk+J5VkBD+wxoY8FrnN8iFv6Ana5dkRK Pje1yooy5aGwm2RClJZItP3FX71J46X+0+dFPn2iQsqbcuBI/G0vycj+W1jktp7KLyLp T4vw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137851; x=1741742651; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=H0YNIJlxmbjMyr4LODgtrAg0p6qQTSAHOFsEzvnJxFk=; b=R3nEM87/tpD4cZarAfz1t/g2n469U/d9MpvGTvbdL4htpok5gDa0Z+/Ic5K9SntkFM lqokEZyQSjwIarL3u//pWlyfg60jG6WwVOQR9j7o/xU3M+6wt/NfzfQecPZ8fTjEvT+9 zq1bP8nHN/eh7R+sQiaa9WC4qHPEoScebCIBDlFPNjiP3OSSe6NyADes6fH+Hz45k64n kkjeSMYyQE7KGnYqBLLXncEO4ugrvszYw8rVlajS2eYK8kSs6tU6CY+83tLxiG3/KnzI j2a5umQOknCsb65/GL73RM1QQhy145rkJCVWRNRfzzBvqiE/seWaj10QeW3RpCdmaZNu n1dQ== X-Gm-Message-State: AOJu0YwNuxN3sui59bJN2/6c6pMlOgVp4k64Ps61JpyanPgxJcJQ75hQ fixPvFV/gx3HggsmxO037g6KSGGEHnMXpyfUwR125/l2zEBThMz+dd4v0UEw7QznM2A7+xWHNu2 VSTQ= X-Gm-Gg: ASbGncs+Q5qTBGQppdZlBitPuAtN0kWP0TaS8sCvoTFWSStd6zgmZ4ieccMs6tNf++Z SeU7v/VJFb6e9/efvdfSF++B+z4Sqr5x0a8uDVBrWzbbhcoY0ZyZgQMBd8PmHyduytgusqTWP1i KJ9abVMfo0GJFbrsggnjCjMETwGVyjopRbK14LgHrlJ0EzovnzWAVaDPLTCYM8o068rR5Vz+wKy KX3VCdCKEu8ZOc/z2+7wyiiYaI6H7le007mTQNcjG8x9pyWorOfOKd5tkr4+cr2tYP2KlrGq/oM GC5BZ0UwulTKVgzpq2wj58jn/6yR0aTVeeNt1KyU7a2dM9moAT+i1mE+SnqQ6TbP59wnnOwDjvr lZw1BmLWfLYWm8/L+qB4= X-Google-Smtp-Source: AGHT+IG4zPitGzF0AHLIpsN2Kc8zjT27A7xrp5GOLGyiAmj00b3x1ZF7XE+m9Mfre38Qbbbmw8fHyA== X-Received: by 2002:a05:600c:1d0f:b0:43b:d203:da18 with SMTP id 5b1f17b1804b1-43bd295494bmr6488485e9.13.1741137850946; Tue, 04 Mar 2025 17:24:10 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Luc Michel , Richard Henderson Subject: [PULL 27/41] hw/char/sh_serial: Return correct number of empty RX FIFO elements Date: Wed, 5 Mar 2025 02:21:42 +0100 Message-ID: <20250305012157.96463-28-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741138370233019000 In the IOCanReadHandler sh_serial_can_receive(), if the Serial Control Register 'Receive Enable' bit is set (bit 4), then we return a size of (1 << 4) which happens to be equal to 16, so effectively SH_RX_FIFO_LENGTH. The IOReadHandler, sh_serial_receive1() takes care to receive multiple chars, but if the FIFO is partly filled, we only process the number of free slots in the FIFO, discarding the other chars! Fix by returning how many elements the FIFO can queue in the IOCanReadHandler, so we don't have to process more than that in the IOReadHandler, thus not discarding anything. Remove the now unnecessary check on 's->rx_cnt < SH_RX_FIFO_LENGTH' in IOReadHandler, reducing the block indentation. Fixes: 63242a007a1 ("SH4: Serial controller improvement") Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Reviewed-by: Richard Henderson Message-Id: <20250220092903.3726-10-philmd@linaro.org> --- hw/char/sh_serial.c | 30 ++++++++++++++---------------- 1 file changed, 14 insertions(+), 16 deletions(-) diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c index 247aeb071ac..41c8175a638 100644 --- a/hw/char/sh_serial.c +++ b/hw/char/sh_serial.c @@ -320,7 +320,7 @@ static uint64_t sh_serial_read(void *opaque, hwaddr off= s, =20 static int sh_serial_can_receive(SHSerialState *s) { - return s->scr & (1 << 4); + return s->scr & (1 << 4) ? SH_RX_FIFO_LENGTH - s->rx_head : 0; } =20 static void sh_serial_receive_break(SHSerialState *s) @@ -353,22 +353,20 @@ static void sh_serial_receive1(void *opaque, const ui= nt8_t *buf, int size) if (s->feat & SH_SERIAL_FEAT_SCIF) { int i; for (i =3D 0; i < size; i++) { - if (s->rx_cnt < SH_RX_FIFO_LENGTH) { - s->rx_fifo[s->rx_head++] =3D buf[i]; - if (s->rx_head =3D=3D SH_RX_FIFO_LENGTH) { - s->rx_head =3D 0; - } - s->rx_cnt++; - if (s->rx_cnt >=3D s->rtrg) { - s->flags |=3D SH_SERIAL_FLAG_RDF; - if (s->scr & (1 << 6) && s->rxi) { - timer_del(&s->fifo_timeout_timer); - qemu_set_irq(s->rxi, 1); - } - } else { - timer_mod(&s->fifo_timeout_timer, - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 15 * s->et= u); + s->rx_fifo[s->rx_head++] =3D buf[i]; + if (s->rx_head =3D=3D SH_RX_FIFO_LENGTH) { + s->rx_head =3D 0; + } + s->rx_cnt++; + if (s->rx_cnt >=3D s->rtrg) { + s->flags |=3D SH_SERIAL_FLAG_RDF; + if (s->scr & (1 << 6) && s->rxi) { + timer_del(&s->fifo_timeout_timer); + qemu_set_irq(s->rxi, 1); } + } else { + timer_mod(&s->fifo_timeout_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 15 * s->etu); } } } else { --=20 2.47.1