From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741137745; cv=none; d=zohomail.com; s=zohoarc; b=hv4RxYWQrPZKjzXHdl7NfmoVOOLd3qwKWSOsTKIW8V8zqm8h8Os1q09M1X0dghm+ucyEc7xax7+0w59AsN8rEqRtGJQJORKrPpw4WgRwxsSugdMm3gIB/O6DMD7iLSlMJBd8PuSj2Xd12eQsl7ZAVgLNZH5w40GvgcwUs2uCW9o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741137745; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=hSEi0FhosgxuvGNlDjYLhuekfWSpIYsUVfwm4laOPdk=; b=kjssZ22VLPuFPR3bR01mGf6MZMbfp/bGGDAGptL7l03iasiLnSZQHch6Q0iX9TDzKzo7GAtVVH3u57TQDitAQFdhRvhfb7EDrMAdqBG5TCxmYC004szMYUJ3tKwly6E8WplyyLPA8NM+IdaM2srw/5RxEMffnpurUsG5tYLVjRA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741137745528933.3705657049841; Tue, 4 Mar 2025 17:22:25 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdSc-0007sr-So; Tue, 04 Mar 2025 20:22:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdSa-0007qr-Ej for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:22:08 -0500 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdSY-0006tb-Ha for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:22:08 -0500 Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-43bcf9612f4so6813285e9.3 for ; Tue, 04 Mar 2025 17:22:06 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e47a6a9fsm19525804f8f.36.2025.03.04.17.22.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:22:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137724; x=1741742524; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hSEi0FhosgxuvGNlDjYLhuekfWSpIYsUVfwm4laOPdk=; b=HAqTVITlFOIuP9xemVAFL5ccf2nSwLbJYIepQ1r81irpIczm6W1GC8cgmssWY0IpRp F9iKhQjDUD07XSBS+KLBHkKoiVRdo6L2+ggwxU6w6iDkKxVBr26iEMKvn4+8fY3uQroc zD3X3M8hlXXKE6t4xqQqYAkQH5/DCariNsq290iS/95Z3Zuz03KLGmLfny0mtELhQNvN VrzGscaiGkj6Ih1ICmOnSP+PhHJZ5MiR124vNawosuBlp6I+Pe954aZSv60rwXnnps+E Xx20T4wYlpxCXFrHyuSw1i6FYIFJmv655WCEf8TsRU6/3rre060tfN2dHP5yGmw0OYIH 6dow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137724; x=1741742524; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hSEi0FhosgxuvGNlDjYLhuekfWSpIYsUVfwm4laOPdk=; b=Rm1piNq0aAAVQhLcNtIh6V9XOFfEHnQt/b8LPbJDvuMn/oaz+WUvaZH8478rcnn2j7 WqFKmSeJVIa0RTQdOTF+BIsX4SxK7oELz/t1Z5hYJLpOMeAGaoBup9zIyn1DKTInoF5i ES0PhvIbCB7z8eQq+Q1xd1dz9gramDPmF9FHDHTXLnEIE8Bl+I7sz4HSzZ5i8yqwiVJc VvstULsreWIKWRGVgj5EOybqH4aY3hxlrqV0yfMMGWeW2ts9GGmUyYxr1cHFGuSDt4D4 BEmxa+yVtqE7p3sxBg4am6Kh79c8FJKdUEFI9YGzwVHLecB+wdtecs1SN1oy09A3Bxay 1cOg== X-Gm-Message-State: AOJu0YzpF5+14zN73PMjTme5tmEexhHizjebttng+1caqoLYFSR4+zIG 3lI6grX7s+A83U3SnCjtnMn8CTSkGrkk0+E4NYs+EB7ATShEyubOYs5oTBUd2pYovNDXPjYXypt xWsM= X-Gm-Gg: ASbGncs7+61BjTpNUfrC0oQV81NWiQ/jxjiE7meZ+EK9PF3Ok3IWIZFCQouJE4fBrRM jGy4Z7TW7vHoVhJK88XtSBmBTqHDdA1RMFBQfC+kJgzK9E/b/waFFWLNqFLbKjFzkPpchIixwRD tEuvJy6dP0OWeRz+wgmCZDiU8gEKW1uh2UjVp58SSkqVjIu4rLAN7QejYA1oNCRM22enG3jWS+x gqqWTiCPRuUYYcYbDCDZwFqEEzPXFXNquyhUT5UqSNVHbiRuYlObgi15QjaYJ4UivLI5GHVEj4q /v7X9ifqGsyGd1fjul6bb1oG/3SLqzkhwKdOUq6OXjR+8iSuJ4v/5y0Z8Aw+jfOAGcrMbvRkvAX P8ZE4/5Yjgi994BBVUr0= X-Google-Smtp-Source: AGHT+IGmPCj6OLKM48knjp6GAd5/ofkT7EJWI48/PBPO1fXViLa3Ar8sLEBHbk29lR506fRxz4tkWw== X-Received: by 2002:a05:600c:4ece:b0:439:5a37:815c with SMTP id 5b1f17b1804b1-43bd2ae5547mr5352495e9.20.1741137724121; Tue, 04 Mar 2025 17:22:04 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Phil Dennis-Jordan Subject: [PULL 01/41] hw/intc: Remove TCG dependency on ARM_GICV3 Date: Wed, 5 Mar 2025 02:21:16 +0100 Message-ID: <20250305012157.96463-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741137747640019100 The TYPE_ARM_GICV3 model doesn't have any particular dependency on TCG, remove it. Rename the Kconfig selector ARM_GICV3_TCG -> ARM_GICV3. Fixes: a8a5546798c ("hw/intc/arm_gicv3: Introduce CONFIG_ARM_GIC_TCG Kconfi= g selector") Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Phil Dennis-Jordan Tested-by: Phil Dennis-Jordan Message-Id: <20241227202435.48055-2-philmd@linaro.org> --- hw/intc/Kconfig | 6 +++--- hw/intc/meson.build | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig index dd405bdb5d2..7547528f2c2 100644 --- a/hw/intc/Kconfig +++ b/hw/intc/Kconfig @@ -23,13 +23,13 @@ config APIC =20 config ARM_GIC bool - select ARM_GICV3_TCG if TCG + select ARM_GICV3 if TCG select ARM_GIC_KVM if KVM select MSI_NONBROKEN =20 -config ARM_GICV3_TCG +config ARM_GICV3 bool - depends on ARM_GIC && TCG + depends on ARM_GIC =20 config ARM_GIC_KVM bool diff --git a/hw/intc/meson.build b/hw/intc/meson.build index 510fdfb6886..602da304b02 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -6,7 +6,7 @@ system_ss.add(when: 'CONFIG_ARM_GIC', if_true: files( 'arm_gicv3_common.c', 'arm_gicv3_its_common.c', )) -system_ss.add(when: 'CONFIG_ARM_GICV3_TCG', if_true: files( +system_ss.add(when: 'CONFIG_ARM_GICV3', if_true: files( 'arm_gicv3.c', 'arm_gicv3_dist.c', 'arm_gicv3_its.c', @@ -39,7 +39,7 @@ endif =20 specific_ss.add(when: 'CONFIG_APIC', if_true: files('apic.c', 'apic_common= .c')) specific_ss.add(when: 'CONFIG_ARM_GIC', if_true: files('arm_gicv3_cpuif_co= mmon.c')) -specific_ss.add(when: 'CONFIG_ARM_GICV3_TCG', if_true: files('arm_gicv3_cp= uif.c')) +specific_ss.add(when: 'CONFIG_ARM_GICV3', if_true: files('arm_gicv3_cpuif.= c')) specific_ss.add(when: 'CONFIG_ARM_GIC_KVM', if_true: files('arm_gic_kvm.c'= )) specific_ss.add(when: ['CONFIG_ARM_GIC_KVM', 'TARGET_AARCH64'], if_true: f= iles('arm_gicv3_kvm.c', 'arm_gicv3_its_kvm.c')) specific_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_nvic.c')) --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741137872; cv=none; d=zohomail.com; s=zohoarc; b=jNWMv5rqovp5u8ezROVf2lekzOdAB1aton0CTGhpts8fLczotdJomnJK0Qu/T5hJpGx0Rrnl4I2ZxkLABtY05FdsyphTT4ZoSW2kPoPW4GOJ1qCWhB6iUEYzSwfTH5IumVTm8HwL+LmPXOJZtQQQcOu97M52w5msVuISky8VaRM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741137872; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=UmR5ArYjxZGIeXGnw2haxlZWQ2j6JF05kRSnp+2VEoM=; b=nW4J6DOLCu8YypalDZrCQzqSoWDk+/ilwJBz0XLRvNfn9QFr5/q3gam0WIdlD6yFXUUyVJ0w6UQnXejuNOW6H0uWU7r+Q51vtsDwyFweDeHcVWtxQLtma/M1CWgMYNjHKgRxBgc5TpNiSBqELRmVmQW+dkBB+P1B14tRjsLsQ/E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741137872775280.7233275164805; Tue, 4 Mar 2025 17:24:32 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdSg-0007ta-7B; Tue, 04 Mar 2025 20:22:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdSe-0007tK-LC for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:22:12 -0500 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdSc-0006uK-RN for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:22:12 -0500 Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-43bcc02ca41so11953505e9.0 for ; Tue, 04 Mar 2025 17:22:10 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e4795da5sm19606063f8f.15.2025.03.04.17.22.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:22:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137729; x=1741742529; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UmR5ArYjxZGIeXGnw2haxlZWQ2j6JF05kRSnp+2VEoM=; b=weizFo6v4wnjRaEC0Grk/N/RBTcCg66kguq8IYTA7DYE/L6Nu8MjPqpfDiP15ZCvHz YtuScyd9TopoVqpu9WdjrfKaQGbFiX3BROFwzD40uOEEIf+Qh0OBL9N92R5vHdDqHdMv tvlk1STLE++ImPXO0K4yADfS3t2ZOPd6EWne8iVmSxN+1eHZDG5rSyRuqexkKqQamx2I VMwdofi/LBDCiODJZ7tRbT1PJNb2wbHu1i7JmH/118+RoR5vxBI5Z2VfyC5tu7BxZ8GE i6CoyArN62ruGDy7xoLdoxuXl+CLvU2EvXldGXkMFgKBF7TcU+ZiSa5rfZvDFqFLYxvo fUaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137729; x=1741742529; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UmR5ArYjxZGIeXGnw2haxlZWQ2j6JF05kRSnp+2VEoM=; b=KOW02BBazUUq/wqVyM/H4reFFL2NikcNxfsESuQgHHjRnvWj+yhH1hNFyGLt+73+PT tYcNtM6D0iDguHDhwlLc9Wphqc54rVgG7q8D8AVsDvks0aqFpEmTzjtYPtykSZlhumpe bGF4x8lsUJxD7k1GvSHwdqu5c+iGUhibse9Dm40Y9ATPLjfZ3UODWL0tGI4p/yKwLTni KbTT19d85THxCVNQRZfba0n5RH4nUV5pS429ALkIZKeF+bAfnQ2V5QwmatKUOpMqNuo2 8mEaL8V1HE9tFP2+DYq2ov4NTCy+qB+8sWQbL+rQiTejR2h9GLdCA3mysv3Pvrm69jDb PYHw== X-Gm-Message-State: AOJu0YyEMJrUYzi53F1oK7VWeZA00hUwqGrGL4UmeYf6/ZqEZxj1ZMRb odpj/8voKLrZyCB+BGJaSKv8MgFQ2qke7WVIMQdUncJeJk7x9LU2nLQ0z5w/NjCpRIDIZ5DllNd xVwI= X-Gm-Gg: ASbGncsCuHQq81jZpwUSl/wCFsv5hwtSP+P4Iv4jxDl1PkrtQskf7lCBEm3PAA1x3j9 B4OuuCwWV4dShJ4p8a/jrKdRCN2pMu7t+WczTUYdWMiESI0DYbfNpmjnodhhIi7P1PIf/l3+d5z WUdVxl7hoy4BlGeAv0Fn3mPm/YL9EZSA24Qpm2Ws350TesTrOWDneMT0deqKtWIF7xrSiEEvQW5 4N5282yHLF6hMph83Ds2XGGaE2tchK81wh7m2A3wTdMetViQyeDIKkADg3HEP62GIcsSeHvcxEV xwC8qlE1TgN1rGtiqcFjhTekuCB/QJUqHjTPUwxlGK/PraEMMi0KGWiLfutf67LHo7Rs0a/MHyt 4tqCX0+wb4tiEPksPnZ4= X-Google-Smtp-Source: AGHT+IFuCuvLOVyzRbu7oQrBKY9gHiTd9QO/uGfWj6sajSPfJVmrwXq1so2/nDfp81CSuVh5HiFMXw== X-Received: by 2002:a05:6000:188b:b0:38f:2bd4:4f83 with SMTP id ffacd0b85a97d-3911f728a05mr750808f8f.16.1741137728704; Tue, 04 Mar 2025 17:22:08 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alexander Graf , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Phil Dennis-Jordan , Akihiko Odaki Subject: [PULL 02/41] hw/misc/pvpanic: Add MMIO interface Date: Wed, 5 Mar 2025 02:21:17 +0100 Message-ID: <20250305012157.96463-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741137874546019000 From: Alexander Graf In addition to the ISA and PCI variants of pvpanic, let's add an MMIO platform device that we can use in embedded arm environments. Signed-off-by: Alexander Graf Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Phil Dennis-Jordan Reviewed-by: Akihiko Odaki Tested-by: Akihiko Odaki Message-ID: <20241223221645.29911-8-phil@philjordan.eu> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/misc/pvpanic.h | 1 + hw/misc/pvpanic-mmio.c | 60 +++++++++++++++++++++++++++++++++++++++ hw/misc/Kconfig | 4 +++ hw/misc/meson.build | 1 + 4 files changed, 66 insertions(+) create mode 100644 hw/misc/pvpanic-mmio.c diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h index 9a71a5ad0d7..049a94c1125 100644 --- a/include/hw/misc/pvpanic.h +++ b/include/hw/misc/pvpanic.h @@ -26,6 +26,7 @@ =20 #define TYPE_PVPANIC_ISA_DEVICE "pvpanic" #define TYPE_PVPANIC_PCI_DEVICE "pvpanic-pci" +#define TYPE_PVPANIC_MMIO_DEVICE "pvpanic-mmio" =20 #define PVPANIC_IOPORT_PROP "ioport" =20 diff --git a/hw/misc/pvpanic-mmio.c b/hw/misc/pvpanic-mmio.c new file mode 100644 index 00000000000..70097cecc74 --- /dev/null +++ b/hw/misc/pvpanic-mmio.c @@ -0,0 +1,60 @@ +/* + * QEMU simulated pvpanic device (MMIO frontend) + * + * Copyright =C2=A9 2023 Amazon.com, Inc. or its affiliates. All Rights Re= served. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" + +#include "hw/qdev-properties.h" +#include "hw/misc/pvpanic.h" +#include "hw/sysbus.h" +#include "standard-headers/misc/pvpanic.h" + +OBJECT_DECLARE_SIMPLE_TYPE(PVPanicMMIOState, PVPANIC_MMIO_DEVICE) + +#define PVPANIC_MMIO_SIZE 0x2 + +struct PVPanicMMIOState { + SysBusDevice parent_obj; + + PVPanicState pvpanic; +}; + +static void pvpanic_mmio_initfn(Object *obj) +{ + PVPanicMMIOState *s =3D PVPANIC_MMIO_DEVICE(obj); + + pvpanic_setup_io(&s->pvpanic, DEVICE(s), PVPANIC_MMIO_SIZE); + sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->pvpanic.mr); +} + +static const Property pvpanic_mmio_properties[] =3D { + DEFINE_PROP_UINT8("events", PVPanicMMIOState, pvpanic.events, + PVPANIC_PANICKED | PVPANIC_CRASH_LOADED), +}; + +static void pvpanic_mmio_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + device_class_set_props(dc, pvpanic_mmio_properties); + set_bit(DEVICE_CATEGORY_MISC, dc->categories); +} + +static const TypeInfo pvpanic_mmio_info =3D { + .name =3D TYPE_PVPANIC_MMIO_DEVICE, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(PVPanicMMIOState), + .instance_init =3D pvpanic_mmio_initfn, + .class_init =3D pvpanic_mmio_class_init, +}; + +static void pvpanic_register_types(void) +{ + type_register_static(&pvpanic_mmio_info); +} + +type_init(pvpanic_register_types) diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig index 82bd68b4bb8..ec0fa5aa9f8 100644 --- a/hw/misc/Kconfig +++ b/hw/misc/Kconfig @@ -148,6 +148,10 @@ config PVPANIC_ISA depends on ISA_BUS select PVPANIC_COMMON =20 +config PVPANIC_MMIO + bool + select PVPANIC_COMMON + config AUX bool select I2C diff --git a/hw/misc/meson.build b/hw/misc/meson.build index 0b5187a2f74..6d47de482c5 100644 --- a/hw/misc/meson.build +++ b/hw/misc/meson.build @@ -126,6 +126,7 @@ system_ss.add(when: 'CONFIG_ARMSSE_MHU', if_true: files= ('armsse-mhu.c')) =20 system_ss.add(when: 'CONFIG_PVPANIC_ISA', if_true: files('pvpanic-isa.c')) system_ss.add(when: 'CONFIG_PVPANIC_PCI', if_true: files('pvpanic-pci.c')) +system_ss.add(when: 'CONFIG_PVPANIC_MMIO', if_true: files('pvpanic-mmio.c'= )) system_ss.add(when: 'CONFIG_AUX', if_true: files('auxbus.c')) system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files( 'aspeed_hace.c', --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741137779; cv=none; d=zohomail.com; s=zohoarc; b=ksIHGHpayXVvdBtn+b4TFISDaJsiNiPmsTGVGnMxxYgaWzaoLUxKEQSrMOCe1xFucrt+TSsiDXLSELom+m+5IVF24UPZtqkdv0AKip78BHYON883jx217DTaaikzfWlOvVGuCurac2pNd5IcSZ6obG2jnfuldt/LJiKduR/Bcpo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741137779; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=iWTIGs3Go4pPr1LSJFmoU+Pe9bQjzTfRf/I5FzOXuf0=; b=FLhJtJgF3LVythvSfq3V4OAWqN2n137Sy3OOd1ttq+VPH97/BtQhgMwvazjamSjDlC4qP0dEUbP9QKFTsjPyisDKcBt24k/Z5eRSNSYFA4KmclI0tO+haM9iX6rd9hQTR7MqmbSxiCtqLsrU0jphmpiyhdL7Wz3r7KeIyRbAP70= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741137779507444.4956082533146; Tue, 4 Mar 2025 17:22:59 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdSu-000824-64; Tue, 04 Mar 2025 20:22:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdSl-0007wJ-F2 for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:22:20 -0500 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdSh-0006ux-3p for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:22:19 -0500 Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-4394a0c65fcso66888235e9.1 for ; Tue, 04 Mar 2025 17:22:14 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e47a66bcsm19090251f8f.21.2025.03.04.17.22.12 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:22:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137733; x=1741742533; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=iWTIGs3Go4pPr1LSJFmoU+Pe9bQjzTfRf/I5FzOXuf0=; b=yZuAppqB+n66CTZnuKDSWzLR+EXhHmPV9alGEhgWutXPeLcu0Z3V4iP+cqV0AMQtPG /CP0BX2UnlwyCziyc2/NggDChh35r1hFa6OODDePhpGCNslCFXYMXXFdk20e++qM/AOn BQiPWSpID+Wa/zjyA5HtEUk6OsY0H3PaybeO1lNJ6XOmv3u//YltPOH4AD2cm//YJKgm whB6EV7KWUMKTmmXOzrd0iwukMrSpC0HGbW07X4yYl/9Aq52qFOLkTo2uI+lDBeFygBK NA9zMCMA8zgcxpRCR0sw06VXBDZmRJ2ZMYtxq8gNpehjsUOcNE5UPwd9FxxGN1/0kjDa iRjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137733; x=1741742533; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=iWTIGs3Go4pPr1LSJFmoU+Pe9bQjzTfRf/I5FzOXuf0=; b=HTMTgAzmXyfkL5a0JqXza09IDd3jTnjZzt5cBsFhtFLmmJdPZbhFtFvTlVBcrAQIjX 2W7EtD+YPrFUh+CVNs7D49/hiY8koA9sujU/U6qtx9LSk/d3uGWgrnRifKDZf21CzFKF DRwL9rIDwOkb+j2+WbzLYO3b1EYhzRuZYBQfxd1IRZ8yekXHebPpcn//rrNU/kc00Pk7 2cnlF8lttEr88BAJYQVYzQ/eU6HuRZxWMS+Zyaq7WIE+JGs5ABD4bb2O/sieqRN2VIec aYFnNAWT8wOpY3bGwOGxcHbIHPSOW80OooOJq0qeMLs5+WR2GUhBOw1huJUaC6qt0pO5 LEfg== X-Gm-Message-State: AOJu0YxGm050LO5BPTmYbmDDG5q77YLHExRZEZjGCEOXgYhrvDUZv9gd ki+K7g/7SqiPl1L0A5QzyaTTAdBkiGJO/9Sf9ANLp3Cs+NgLTmzibiNSfv4lV7jqZ5Q0tyzo+r7 bZLk= X-Gm-Gg: ASbGncuRMdZQTwr0z9Wu+yvkSg2udVbIaX9bq0LKD1AhJ6GUmBSqAk7jZIDemoHtlA+ 9GiXidZa9IgKX+ghMw0Y6XdkGzt+Y7tYruQA60vEUlNLHF4SzwSLY3axQOtPBhu+g7vl2Rm2p7y 3H6vDuwtbVY6lhpFTUYjukZXFUpPPbcWVuB5Db0T0n9K1pT+ee9Zk3aetbd7MP2FrlsbfMUWuzG AoJXC42hwRfzl2Fk33OboaugSO3sLc7Apm8ILvgEGT7CUQSScXWIiJWMNRtgK/ICXQ1zcH5Bs2H rQCX2ro18iK4waajUHxop0MjmUs20a6tS7eh1HPpszEtJehdWgyO2cGOhqgdwAjQ1qjEurwKtZY sUR2DmHirDc8YiFkg2QQ= X-Google-Smtp-Source: AGHT+IEEbN4IJPm5dko6OQSea20MdgZaCQFjySCZ2Ek9yxffFeGO01eU1R7zKfaUwXJMA/6HJtS7ug== X-Received: by 2002:a5d:64e3:0:b0:391:888:f534 with SMTP id ffacd0b85a97d-3911f7403cfmr576579f8f.20.1741137733296; Tue, 04 Mar 2025 17:22:13 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alexander Graf , Phil Dennis-Jordan , Akihiko Odaki , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 03/41] hw: Add vmapple subdir Date: Wed, 5 Mar 2025 02:21:18 +0100 Message-ID: <20250305012157.96463-4-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741137780247019000 From: Alexander Graf We will introduce a number of devices that are specific to the vmapple target machine. To keep them all tidily together, let's put them into a single target directory. Signed-off-by: Alexander Graf Signed-off-by: Phil Dennis-Jordan Reviewed-by: Akihiko Odaki Tested-by: Akihiko Odaki Message-ID: <20241223221645.29911-7-phil@philjordan.eu> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- MAINTAINERS | 7 +++++++ meson.build | 1 + hw/vmapple/trace.h | 2 ++ hw/Kconfig | 1 + hw/meson.build | 1 + hw/vmapple/Kconfig | 1 + hw/vmapple/meson.build | 1 + hw/vmapple/trace-events | 2 ++ 8 files changed, 16 insertions(+) create mode 100644 hw/vmapple/trace.h create mode 100644 hw/vmapple/Kconfig create mode 100644 hw/vmapple/meson.build create mode 100644 hw/vmapple/trace-events diff --git a/MAINTAINERS b/MAINTAINERS index 2e7fc6fa912..0e160360918 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2820,6 +2820,13 @@ F: hw/misc/ivshmem-flat.c F: include/hw/misc/ivshmem-flat.h F: docs/system/devices/ivshmem-flat.rst =20 +VMapple +M: Alexander Graf +M: Phil Dennis-Jordan +S: Maintained +F: hw/vmapple/* +F: include/hw/vmapple/* + Subsystems ---------- Overall Audio backends diff --git a/meson.build b/meson.build index 0a2c61d2bfa..d1b807aa53f 100644 --- a/meson.build +++ b/meson.build @@ -3605,6 +3605,7 @@ if have_system 'hw/usb', 'hw/vfio', 'hw/virtio', + 'hw/vmapple', 'hw/watchdog', 'hw/xen', 'hw/gpio', diff --git a/hw/vmapple/trace.h b/hw/vmapple/trace.h new file mode 100644 index 00000000000..d099d5ecd9e --- /dev/null +++ b/hw/vmapple/trace.h @@ -0,0 +1,2 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include "trace/trace-hw_vmapple.h" diff --git a/hw/Kconfig b/hw/Kconfig index 1b4e9bb07f7..2871784cfdc 100644 --- a/hw/Kconfig +++ b/hw/Kconfig @@ -41,6 +41,7 @@ source ufs/Kconfig source usb/Kconfig source virtio/Kconfig source vfio/Kconfig +source vmapple/Kconfig source xen/Kconfig source watchdog/Kconfig =20 diff --git a/hw/meson.build b/hw/meson.build index b827c82c5d7..9c4f6d0d636 100644 --- a/hw/meson.build +++ b/hw/meson.build @@ -39,6 +39,7 @@ subdir('ufs') subdir('usb') subdir('vfio') subdir('virtio') +subdir('vmapple') subdir('watchdog') subdir('xen') subdir('xenpv') diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig new file mode 100644 index 00000000000..315c06b689c --- /dev/null +++ b/hw/vmapple/Kconfig @@ -0,0 +1 @@ +# SPDX-License-Identifier: GPL-2.0-or-later diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build new file mode 100644 index 00000000000..315c06b689c --- /dev/null +++ b/hw/vmapple/meson.build @@ -0,0 +1 @@ +# SPDX-License-Identifier: GPL-2.0-or-later diff --git a/hw/vmapple/trace-events b/hw/vmapple/trace-events new file mode 100644 index 00000000000..21125794121 --- /dev/null +++ b/hw/vmapple/trace-events @@ -0,0 +1,2 @@ +# See docs/devel/tracing.rst for syntax documentation. +# SPDX-License-Identifier: GPL-2.0-or-later --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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It has trivial hard coded keys it uses for that purpose. Add device emulation for this device model. Signed-off-by: Alexander Graf Signed-off-by: Phil Dennis-Jordan Reviewed-by: Akihiko Odaki Tested-by: Akihiko Odaki Message-ID: <20241223221645.29911-10-phil@philjordan.eu> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/vmapple/vmapple.h | 17 + include/qemu/cutils.h | 15 + hw/vmapple/aes.c | 581 +++++++++++++++++++++++++++++++++++ util/hexdump.c | 18 ++ hw/vmapple/Kconfig | 3 + hw/vmapple/meson.build | 2 + hw/vmapple/trace-events | 14 + 7 files changed, 650 insertions(+) create mode 100644 include/hw/vmapple/vmapple.h create mode 100644 hw/vmapple/aes.c diff --git a/include/hw/vmapple/vmapple.h b/include/hw/vmapple/vmapple.h new file mode 100644 index 00000000000..6762b6c869f --- /dev/null +++ b/include/hw/vmapple/vmapple.h @@ -0,0 +1,17 @@ +/* + * Devices specific to the VMApple machine type + * + * Copyright =C2=A9 2023 Amazon.com, Inc. or its affiliates. All Rights Re= served. + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef HW_VMAPPLE_VMAPPLE_H +#define HW_VMAPPLE_VMAPPLE_H + +#define TYPE_APPLE_AES "apple-aes" + +#endif /* HW_VMAPPLE_VMAPPLE_H */ diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h index 34a9b9b2204..36c68ce86c5 100644 --- a/include/qemu/cutils.h +++ b/include/qemu/cutils.h @@ -302,4 +302,19 @@ GString *qemu_hexdump_line(GString *str, const void *b= uf, size_t len, void qemu_hexdump(FILE *fp, const char *prefix, const void *bufptr, size_t size); =20 +/** + * qemu_hexdump_to_buffer: + * @buffer: output string buffer + * @buffer_size: amount of available space in buffer. Must be at least + * data_size*2+1. + * @data: input bytes + * @data_size: number of bytes in data + * + * Converts the @data_size bytes in @data into hex digit pairs, writing th= em to + * @buffer. Finally, a nul terminating character is written; @buffer there= fore + * needs space for (data_size*2+1) chars. + */ +void qemu_hexdump_to_buffer(char *restrict buffer, size_t buffer_size, + const uint8_t *restrict data, size_t data_size= ); + #endif diff --git a/hw/vmapple/aes.c b/hw/vmapple/aes.c new file mode 100644 index 00000000000..3a7641ab4b0 --- /dev/null +++ b/hw/vmapple/aes.c @@ -0,0 +1,581 @@ +/* + * QEMU Apple AES device emulation + * + * Copyright =C2=A9 2023 Amazon.com, Inc. or its affiliates. All Rights Re= served. + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "trace.h" +#include "crypto/hash.h" +#include "crypto/aes.h" +#include "crypto/cipher.h" +#include "hw/irq.h" +#include "hw/sysbus.h" +#include "hw/vmapple/vmapple.h" +#include "migration/vmstate.h" +#include "qemu/cutils.h" +#include "qemu/log.h" +#include "qemu/module.h" +#include "system/dma.h" + +OBJECT_DECLARE_SIMPLE_TYPE(AESState, APPLE_AES) + +#define MAX_FIFO_SIZE 9 + +#define CMD_KEY 0x1 +#define CMD_KEY_CONTEXT_SHIFT 27 +#define CMD_KEY_CONTEXT_MASK (0x1 << CMD_KEY_CONTEXT_SHIFT) +#define CMD_KEY_SELECT_MAX_IDX 0x7 +#define CMD_KEY_SELECT_SHIFT 24 +#define CMD_KEY_SELECT_MASK (CMD_KEY_SELECT_MAX_IDX << CMD_KEY_SELECT= _SHIFT) +#define CMD_KEY_KEY_LEN_NUM 4u +#define CMD_KEY_KEY_LEN_SHIFT 22 +#define CMD_KEY_KEY_LEN_MASK ((CMD_KEY_KEY_LEN_NUM - 1u) << CMD_KEY_KE= Y_LEN_SHIFT) +#define CMD_KEY_ENCRYPT_SHIFT 20 +#define CMD_KEY_ENCRYPT_MASK (0x1 << CMD_KEY_ENCRYPT_SHIFT) +#define CMD_KEY_BLOCK_MODE_SHIFT 16 +#define CMD_KEY_BLOCK_MODE_MASK (0x3 << CMD_KEY_BLOCK_MODE_SHIFT) +#define CMD_IV 0x2 +#define CMD_IV_CONTEXT_SHIFT 26 +#define CMD_IV_CONTEXT_MASK (0x3 << CMD_KEY_CONTEXT_SHIFT) +#define CMD_DSB 0x3 +#define CMD_SKG 0x4 +#define CMD_DATA 0x5 +#define CMD_DATA_KEY_CTX_SHIFT 27 +#define CMD_DATA_KEY_CTX_MASK (0x1 << CMD_DATA_KEY_CTX_SHIFT) +#define CMD_DATA_IV_CTX_SHIFT 25 +#define CMD_DATA_IV_CTX_MASK (0x3 << CMD_DATA_IV_CTX_SHIFT) +#define CMD_DATA_LEN_MASK 0xffffff +#define CMD_STORE_IV 0x6 +#define CMD_STORE_IV_ADDR_MASK 0xffffff +#define CMD_WRITE_REG 0x7 +#define CMD_FLAG 0x8 +#define CMD_FLAG_STOP_MASK BIT(26) +#define CMD_FLAG_RAISE_IRQ_MASK BIT(27) +#define CMD_FLAG_INFO_MASK 0xff +#define CMD_MAX 0x10 + +#define CMD_SHIFT 28 + +#define REG_STATUS 0xc +#define REG_STATUS_DMA_READ_RUNNING BIT(0) +#define REG_STATUS_DMA_READ_PENDING BIT(1) +#define REG_STATUS_DMA_WRITE_RUNNING BIT(2) +#define REG_STATUS_DMA_WRITE_PENDING BIT(3) +#define REG_STATUS_BUSY BIT(4) +#define REG_STATUS_EXECUTING BIT(5) +#define REG_STATUS_READY BIT(6) +#define REG_STATUS_TEXT_DPA_SEEDED BIT(7) +#define REG_STATUS_UNWRAP_DPA_SEEDED BIT(8) + +#define REG_IRQ_STATUS 0x18 +#define REG_IRQ_STATUS_INVALID_CMD BIT(2) +#define REG_IRQ_STATUS_FLAG BIT(5) +#define REG_IRQ_ENABLE 0x1c +#define REG_WATERMARK 0x20 +#define REG_Q_STATUS 0x24 +#define REG_FLAG_INFO 0x30 +#define REG_FIFO 0x200 + +static const uint32_t key_lens[CMD_KEY_KEY_LEN_NUM] =3D { + [0] =3D 16, + [1] =3D 24, + [2] =3D 32, + [3] =3D 64, +}; + +typedef struct Key { + uint32_t key_len; + uint8_t key[32]; +} Key; + +typedef struct IV { + uint32_t iv[4]; +} IV; + +static Key builtin_keys[CMD_KEY_SELECT_MAX_IDX + 1] =3D { + [1] =3D { + .key_len =3D 32, + .key =3D { 0x1 }, + }, + [2] =3D { + .key_len =3D 32, + .key =3D { 0x2 }, + }, + [3] =3D { + .key_len =3D 32, + .key =3D { 0x3 }, + } +}; + +struct AESState { + SysBusDevice parent_obj; + + qemu_irq irq; + MemoryRegion iomem1; + MemoryRegion iomem2; + AddressSpace *as; + + uint32_t status; + uint32_t q_status; + uint32_t irq_status; + uint32_t irq_enable; + uint32_t watermark; + uint32_t flag_info; + uint32_t fifo[MAX_FIFO_SIZE]; + uint32_t fifo_idx; + Key key[2]; + IV iv[4]; + bool is_encrypt; + QCryptoCipherMode block_mode; +}; + +static void aes_update_irq(AESState *s) +{ + qemu_set_irq(s->irq, !!(s->irq_status & s->irq_enable)); +} + +static uint64_t aes1_read(void *opaque, hwaddr offset, unsigned size) +{ + AESState *s =3D opaque; + uint64_t res =3D 0; + + switch (offset) { + case REG_STATUS: + res =3D s->status; + break; + case REG_IRQ_STATUS: + res =3D s->irq_status; + break; + case REG_IRQ_ENABLE: + res =3D s->irq_enable; + break; + case REG_WATERMARK: + res =3D s->watermark; + break; + case REG_Q_STATUS: + res =3D s->q_status; + break; + case REG_FLAG_INFO: + res =3D s->flag_info; + break; + + default: + qemu_log_mask(LOG_UNIMP, "%s: Unknown AES MMIO offset %" PRIx64 "\= n", + __func__, offset); + break; + } + + trace_aes_read(offset, res); + + return res; +} + +static void fifo_append(AESState *s, uint64_t val) +{ + if (s->fifo_idx =3D=3D MAX_FIFO_SIZE) { + /* Exceeded the FIFO. Bail out */ + return; + } + + s->fifo[s->fifo_idx++] =3D val; +} + +static bool has_payload(AESState *s, uint32_t elems) +{ + return s->fifo_idx >=3D elems + 1; +} + +static bool cmd_key(AESState *s) +{ + uint32_t cmd =3D s->fifo[0]; + uint32_t key_select =3D (cmd & CMD_KEY_SELECT_MASK) >> CMD_KEY_SELECT_= SHIFT; + uint32_t ctxt =3D (cmd & CMD_KEY_CONTEXT_MASK) >> CMD_KEY_CONTEXT_SHIF= T; + uint32_t key_len; + + switch ((cmd & CMD_KEY_BLOCK_MODE_MASK) >> CMD_KEY_BLOCK_MODE_SHIFT) { + case 0: + s->block_mode =3D QCRYPTO_CIPHER_MODE_ECB; + break; + case 1: + s->block_mode =3D QCRYPTO_CIPHER_MODE_CBC; + break; + default: + return false; + } + + s->is_encrypt =3D cmd & CMD_KEY_ENCRYPT_MASK; + key_len =3D key_lens[(cmd & CMD_KEY_KEY_LEN_MASK) >> CMD_KEY_KEY_LEN_S= HIFT]; + + if (key_select) { + trace_aes_cmd_key_select_builtin(ctxt, key_select, + s->is_encrypt ? "en" : "de", + QCryptoCipherMode_str(s->block_mo= de)); + s->key[ctxt] =3D builtin_keys[key_select]; + } else { + trace_aes_cmd_key_select_new(ctxt, key_len, + s->is_encrypt ? "en" : "de", + QCryptoCipherMode_str(s->block_mode)); + if (key_len > sizeof(s->key[ctxt].key)) { + return false; + } + if (!has_payload(s, key_len / sizeof(uint32_t))) { + /* wait for payload */ + qemu_log_mask(LOG_GUEST_ERROR, "%s: No payload\n", __func__); + return false; + } + memcpy(&s->key[ctxt].key, &s->fifo[1], key_len); + s->key[ctxt].key_len =3D key_len; + } + + return true; +} + +static bool cmd_iv(AESState *s) +{ + uint32_t cmd =3D s->fifo[0]; + uint32_t ctxt =3D (cmd & CMD_IV_CONTEXT_MASK) >> CMD_IV_CONTEXT_SHIFT; + + if (!has_payload(s, 4)) { + /* wait for payload */ + return false; + } + memcpy(&s->iv[ctxt].iv, &s->fifo[1], sizeof(s->iv[ctxt].iv)); + trace_aes_cmd_iv(ctxt, s->fifo[1], s->fifo[2], s->fifo[3], s->fifo[4]); + + return true; +} + +static void dump_data(const char *desc, const void *p, size_t len) +{ + static const size_t MAX_LEN =3D 0x1000; + char hex[MAX_LEN * 2 + 1] =3D ""; + + if (len > MAX_LEN) { + return; + } + + qemu_hexdump_to_buffer(hex, sizeof(hex), p, len); + trace_aes_dump_data(desc, hex); +} + +static bool cmd_data(AESState *s) +{ + uint32_t cmd =3D s->fifo[0]; + uint32_t ctxt_iv =3D 0; + uint32_t ctxt_key =3D (cmd & CMD_DATA_KEY_CTX_MASK) >> CMD_DATA_KEY_CT= X_SHIFT; + uint32_t len =3D cmd & CMD_DATA_LEN_MASK; + uint64_t src_addr =3D s->fifo[2]; + uint64_t dst_addr =3D s->fifo[3]; + QCryptoCipherAlgo alg; + g_autoptr(QCryptoCipher) cipher =3D NULL; + g_autoptr(GByteArray) src =3D NULL; + g_autoptr(GByteArray) dst =3D NULL; + MemTxResult r; + + src_addr |=3D ((uint64_t)s->fifo[1] << 16) & 0xffff00000000ULL; + dst_addr |=3D ((uint64_t)s->fifo[1] << 32) & 0xffff00000000ULL; + + trace_aes_cmd_data(ctxt_key, ctxt_iv, src_addr, dst_addr, len); + + if (!has_payload(s, 3)) { + /* wait for payload */ + qemu_log_mask(LOG_GUEST_ERROR, "%s: No payload\n", __func__); + return false; + } + + if (ctxt_key >=3D ARRAY_SIZE(s->key) || + ctxt_iv >=3D ARRAY_SIZE(s->iv)) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: Invalid key or iv\n", __func__= ); + return false; + } + + src =3D g_byte_array_sized_new(len); + g_byte_array_set_size(src, len); + dst =3D g_byte_array_sized_new(len); + g_byte_array_set_size(dst, len); + + r =3D dma_memory_read(s->as, src_addr, src->data, len, MEMTXATTRS_UNSP= ECIFIED); + if (r !=3D MEMTX_OK) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: DMA read of %"PRIu32" bytes " + "from 0x%"PRIx64" failed. (r=3D%d)\n", + __func__, len, src_addr, r); + return false; + } + + dump_data("cmd_data(): src_data=3D", src->data, len); + + switch (s->key[ctxt_key].key_len) { + case 128 / 8: + alg =3D QCRYPTO_CIPHER_ALGO_AES_128; + break; + case 192 / 8: + alg =3D QCRYPTO_CIPHER_ALGO_AES_192; + break; + case 256 / 8: + alg =3D QCRYPTO_CIPHER_ALGO_AES_256; + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, "%s: Invalid key length\n", __func_= _); + return false; + } + cipher =3D qcrypto_cipher_new(alg, s->block_mode, + s->key[ctxt_key].key, + s->key[ctxt_key].key_len, NULL); + if (!cipher) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: Failed to create cipher object= \n", + __func__); + return false; + } + if (s->block_mode !=3D QCRYPTO_CIPHER_MODE_ECB) { + if (qcrypto_cipher_setiv(cipher, (void *)s->iv[ctxt_iv].iv, + sizeof(s->iv[ctxt_iv].iv), NULL) !=3D 0) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: Failed to set IV\n", __fun= c__); + return false; + } + } + if (s->is_encrypt) { + if (qcrypto_cipher_encrypt(cipher, src->data, dst->data, len, NULL= ) !=3D 0) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: Encryption failed\n", __fu= nc__); + return false; + } + } else { + if (qcrypto_cipher_decrypt(cipher, src->data, dst->data, len, NULL= ) !=3D 0) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: Decryption failed\n", __fu= nc__); + return false; + } + } + + dump_data("cmd_data(): dst_data=3D", dst->data, len); + r =3D dma_memory_write(s->as, dst_addr, dst->data, len, MEMTXATTRS_UNS= PECIFIED); + if (r !=3D MEMTX_OK) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: DMA write of %"PRIu32" bytes " + "to 0x%"PRIx64" failed. (r=3D%d)\n", + __func__, len, src_addr, r); + return false; + } + + return true; +} + +static bool cmd_store_iv(AESState *s) +{ + uint32_t cmd =3D s->fifo[0]; + uint32_t ctxt =3D (cmd & CMD_IV_CONTEXT_MASK) >> CMD_IV_CONTEXT_SHIFT; + uint64_t addr =3D s->fifo[1]; + MemTxResult dma_result; + + if (!has_payload(s, 1)) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: No payload\n", __func__); + return false; + } + + if (ctxt >=3D ARRAY_SIZE(s->iv)) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Invalid context. ctxt =3D %u, allowed: 0..%zu\n= ", + __func__, ctxt, ARRAY_SIZE(s->iv) - 1); + return false; + } + + addr |=3D ((uint64_t)cmd << 32) & 0xff00000000ULL; + dma_result =3D dma_memory_write(&address_space_memory, addr, + &s->iv[ctxt].iv, sizeof(s->iv[ctxt].iv), + MEMTXATTRS_UNSPECIFIED); + + trace_aes_cmd_store_iv(ctxt, addr, s->iv[ctxt].iv[0], s->iv[ctxt].iv[1= ], + s->iv[ctxt].iv[2], s->iv[ctxt].iv[3]); + + return dma_result =3D=3D MEMTX_OK; +} + +static bool cmd_flag(AESState *s) +{ + uint32_t cmd =3D s->fifo[0]; + uint32_t raise_irq =3D cmd & CMD_FLAG_RAISE_IRQ_MASK; + + /* We always process data when it's coming in, so fire an IRQ immediat= ely */ + if (raise_irq) { + s->irq_status |=3D REG_IRQ_STATUS_FLAG; + } + + s->flag_info =3D cmd & CMD_FLAG_INFO_MASK; + + trace_aes_cmd_flag(!!raise_irq, s->flag_info); + + return true; +} + +static void fifo_process(AESState *s) +{ + uint32_t cmd =3D s->fifo[0] >> CMD_SHIFT; + bool success =3D false; + + if (!s->fifo_idx) { + return; + } + + switch (cmd) { + case CMD_KEY: + success =3D cmd_key(s); + break; + case CMD_IV: + success =3D cmd_iv(s); + break; + case CMD_DATA: + success =3D cmd_data(s); + break; + case CMD_STORE_IV: + success =3D cmd_store_iv(s); + break; + case CMD_FLAG: + success =3D cmd_flag(s); + break; + default: + s->irq_status |=3D REG_IRQ_STATUS_INVALID_CMD; + break; + } + + if (success) { + s->fifo_idx =3D 0; + } + + trace_aes_fifo_process(cmd, success); +} + +static void aes1_write(void *opaque, hwaddr offset, uint64_t val, unsigned= size) +{ + AESState *s =3D opaque; + + trace_aes_write(offset, val); + + switch (offset) { + case REG_IRQ_STATUS: + s->irq_status &=3D ~val; + break; + case REG_IRQ_ENABLE: + s->irq_enable =3D val; + break; + case REG_FIFO: + fifo_append(s, val); + fifo_process(s); + break; + default: + qemu_log_mask(LOG_UNIMP, + "%s: Unknown AES MMIO offset %"PRIx64", data %"PRIx6= 4"\n", + __func__, offset, val); + return; + } + + aes_update_irq(s); +} + +static const MemoryRegionOps aes1_ops =3D { + .read =3D aes1_read, + .write =3D aes1_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, + .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 8, + }, + .impl =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + }, +}; + +static uint64_t aes2_read(void *opaque, hwaddr offset, unsigned size) +{ + uint64_t res =3D 0; + + switch (offset) { + case 0: + res =3D 0; + break; + default: + qemu_log_mask(LOG_UNIMP, + "%s: Unknown AES MMIO 2 offset %"PRIx64"\n", + __func__, offset); + break; + } + + trace_aes_2_read(offset, res); + + return res; +} + +static void aes2_write(void *opaque, hwaddr offset, uint64_t val, unsigned= size) +{ + trace_aes_2_write(offset, val); + + switch (offset) { + default: + qemu_log_mask(LOG_UNIMP, + "%s: Unknown AES MMIO 2 offset %"PRIx64", data %"PRI= x64"\n", + __func__, offset, val); + return; + } +} + +static const MemoryRegionOps aes2_ops =3D { + .read =3D aes2_read, + .write =3D aes2_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, + .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 8, + }, + .impl =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + }, +}; + +static void aes_reset(Object *obj, ResetType type) +{ + AESState *s =3D APPLE_AES(obj); + + s->status =3D 0x3f80; + s->q_status =3D 2; + s->irq_status =3D 0; + s->irq_enable =3D 0; + s->watermark =3D 0; +} + +static void aes_init(Object *obj) +{ + AESState *s =3D APPLE_AES(obj); + + memory_region_init_io(&s->iomem1, obj, &aes1_ops, s, TYPE_APPLE_AES, 0= x4000); + memory_region_init_io(&s->iomem2, obj, &aes2_ops, s, TYPE_APPLE_AES, 0= x4000); + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem1); + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem2); + sysbus_init_irq(SYS_BUS_DEVICE(s), &s->irq); + s->as =3D &address_space_memory; +} + +static void aes_class_init(ObjectClass *klass, void *data) +{ + ResettableClass *rc =3D RESETTABLE_CLASS(klass); + + rc->phases.hold =3D aes_reset; +} + +static const TypeInfo aes_info =3D { + .name =3D TYPE_APPLE_AES, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(AESState), + .class_init =3D aes_class_init, + .instance_init =3D aes_init, +}; + +static void aes_register_types(void) +{ + type_register_static(&aes_info); +} + +type_init(aes_register_types) diff --git a/util/hexdump.c b/util/hexdump.c index ae0d4992dcf..f29ffceb746 100644 --- a/util/hexdump.c +++ b/util/hexdump.c @@ -15,6 +15,7 @@ =20 #include "qemu/osdep.h" #include "qemu/cutils.h" +#include "qemu/host-utils.h" =20 static inline char hexdump_nibble(unsigned x) { @@ -97,3 +98,20 @@ void qemu_hexdump(FILE *fp, const char *prefix, } =20 } + +void qemu_hexdump_to_buffer(char *restrict buffer, size_t buffer_size, + const uint8_t *restrict data, size_t data_size) +{ + size_t i; + uint64_t required_buffer_size; + bool overflow =3D umul64_overflow(data_size, 2, &required_buffer_size); + overflow |=3D uadd64_overflow(required_buffer_size, 1, &required_buffe= r_size); + assert(!overflow && buffer_size >=3D required_buffer_size); + + for (i =3D 0; i < data_size; i++) { + uint8_t val =3D data[i]; + *(buffer++) =3D hexdump_nibble(val >> 4); + *(buffer++) =3D hexdump_nibble(val & 0xf); + } + *buffer =3D '\0'; +} diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig index 315c06b689c..b1944d73129 100644 --- a/hw/vmapple/Kconfig +++ b/hw/vmapple/Kconfig @@ -1 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-or-later + +config VMAPPLE_AES + bool diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build index 315c06b689c..a701d06a39d 100644 --- a/hw/vmapple/meson.build +++ b/hw/vmapple/meson.build @@ -1 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-or-later + +system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('aes.c')) diff --git a/hw/vmapple/trace-events b/hw/vmapple/trace-events index 21125794121..188547a6ad8 100644 --- a/hw/vmapple/trace-events +++ b/hw/vmapple/trace-events @@ -1,2 +1,16 @@ # See docs/devel/tracing.rst for syntax documentation. # SPDX-License-Identifier: GPL-2.0-or-later + +# aes.c +aes_read(uint64_t offset, uint64_t res) "offset=3D0x%"PRIx64" res=3D0x%"PR= Ix64 +aes_cmd_key_select_builtin(uint32_t ctx, uint32_t key_id, const char *dire= ction, const char *cipher) "[%d] Selecting builtin key %d to %scrypt with %= s" +aes_cmd_key_select_new(uint32_t ctx, uint32_t key_len, const char *directi= on, const char *cipher) "[%d] Selecting new key size=3D%d to %scrypt with %= s" +aes_cmd_iv(uint32_t ctx, uint32_t iv0, uint32_t iv1, uint32_t iv2, uint32_= t iv3) "[%d] 0x%08x 0x%08x 0x%08x 0x%08x" +aes_cmd_data(uint32_t key, uint32_t iv, uint64_t src, uint64_t dst, uint32= _t len) "[key=3D%d iv=3D%d] src=3D0x%"PRIx64" dst=3D0x%"PRIx64" len=3D0x%x" +aes_cmd_store_iv(uint32_t ctx, uint64_t addr, uint32_t iv0, uint32_t iv1, = uint32_t iv2, uint32_t iv3) "[%d] addr=3D0x%"PRIx64"x -> 0x%08x 0x%08x 0x%0= 8x 0x%08x" +aes_cmd_flag(uint32_t raise, uint32_t flag_info) "raise=3D%d flag_info=3D0= x%x" +aes_fifo_process(uint32_t cmd, bool success) "cmd=3D%d success=3D%d" +aes_write(uint64_t offset, uint64_t val) "offset=3D0x%"PRIx64" val=3D0x%"P= RIx64 +aes_2_read(uint64_t offset, uint64_t res) "offset=3D0x%"PRIx64" res=3D0x%"= PRIx64 +aes_2_write(uint64_t offset, uint64_t val) "offset=3D0x%"PRIx64" val=3D0x%= "PRIx64 +aes_dump_data(const char *desc, const char *hex) "%s%s" --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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This patch implements this backdoor platform device to the best of my understanding. I left out any USB OTG parts; they're only needed for guest recovery and I don't understand the protocol yet. Signed-off-by: Alexander Graf Signed-off-by: Phil Dennis-Jordan Reviewed-by: Akihiko Odaki Tested-by: Akihiko Odaki Message-ID: <20241223221645.29911-11-phil@philjordan.eu> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/vmapple/vmapple.h | 2 + hw/vmapple/bdif.c | 274 +++++++++++++++++++++++++++++++++++ hw/vmapple/Kconfig | 3 + hw/vmapple/meson.build | 1 + hw/vmapple/trace-events | 5 + 5 files changed, 285 insertions(+) create mode 100644 hw/vmapple/bdif.c diff --git a/include/hw/vmapple/vmapple.h b/include/hw/vmapple/vmapple.h index 6762b6c869f..9090e9c5ac8 100644 --- a/include/hw/vmapple/vmapple.h +++ b/include/hw/vmapple/vmapple.h @@ -14,4 +14,6 @@ =20 #define TYPE_APPLE_AES "apple-aes" =20 +#define TYPE_VMAPPLE_BDIF "vmapple-bdif" + #endif /* HW_VMAPPLE_VMAPPLE_H */ diff --git a/hw/vmapple/bdif.c b/hw/vmapple/bdif.c new file mode 100644 index 00000000000..5827dd2aab8 --- /dev/null +++ b/hw/vmapple/bdif.c @@ -0,0 +1,274 @@ +/* + * VMApple Backdoor Interface + * + * Copyright =C2=A9 2023 Amazon.com, Inc. or its affiliates. All Rights Re= served. + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/units.h" +#include "qemu/log.h" +#include "qemu/module.h" +#include "trace.h" +#include "hw/vmapple/vmapple.h" +#include "hw/sysbus.h" +#include "hw/block/block.h" +#include "qapi/error.h" +#include "system/block-backend.h" +#include "system/dma.h" + +OBJECT_DECLARE_SIMPLE_TYPE(VMAppleBdifState, VMAPPLE_BDIF) + +struct VMAppleBdifState { + SysBusDevice parent_obj; + + BlockBackend *aux; + BlockBackend *root; + MemoryRegion mmio; +}; + +#define VMAPPLE_BDIF_SIZE 0x00200000 + +#define REG_DEVID_MASK 0xffff0000 +#define DEVID_ROOT 0x00000000 +#define DEVID_AUX 0x00010000 +#define DEVID_USB 0x00100000 + +#define REG_STATUS 0x0 +#define REG_STATUS_ACTIVE BIT(0) +#define REG_CFG 0x4 +#define REG_CFG_ACTIVE BIT(1) +#define REG_UNK1 0x8 +#define REG_BUSY 0x10 +#define REG_BUSY_READY BIT(0) +#define REG_UNK2 0x400 +#define REG_CMD 0x408 +#define REG_NEXT_DEVICE 0x420 +#define REG_UNK3 0x434 + +typedef struct VblkSector { + uint32_t pad; + uint32_t pad2; + uint32_t sector; + uint32_t pad3; +} VblkSector; + +typedef struct VblkReqCmd { + uint64_t addr; + uint32_t len; + uint32_t flags; +} VblkReqCmd; + +typedef struct VblkReq { + VblkReqCmd sector; + VblkReqCmd data; + VblkReqCmd retval; +} VblkReq; + +#define VBLK_DATA_FLAGS_READ 0x00030001 +#define VBLK_DATA_FLAGS_WRITE 0x00010001 + +#define VBLK_RET_SUCCESS 0 +#define VBLK_RET_FAILED 1 + +static uint64_t bdif_read(void *opaque, hwaddr offset, unsigned size) +{ + uint64_t ret =3D -1; + uint64_t devid =3D offset & REG_DEVID_MASK; + + switch (offset & ~REG_DEVID_MASK) { + case REG_STATUS: + ret =3D REG_STATUS_ACTIVE; + break; + case REG_CFG: + ret =3D REG_CFG_ACTIVE; + break; + case REG_UNK1: + ret =3D 0x420; + break; + case REG_BUSY: + ret =3D REG_BUSY_READY; + break; + case REG_UNK2: + ret =3D 0x1; + break; + case REG_UNK3: + ret =3D 0x0; + break; + case REG_NEXT_DEVICE: + switch (devid) { + case DEVID_ROOT: + ret =3D 0x8000000; + break; + case DEVID_AUX: + ret =3D 0x10000; + break; + } + break; + } + + trace_bdif_read(offset, size, ret); + return ret; +} + +static void le2cpu_sector(VblkSector *sector) +{ + sector->sector =3D le32_to_cpu(sector->sector); +} + +static void le2cpu_reqcmd(VblkReqCmd *cmd) +{ + cmd->addr =3D le64_to_cpu(cmd->addr); + cmd->len =3D le32_to_cpu(cmd->len); + cmd->flags =3D le32_to_cpu(cmd->flags); +} + +static void le2cpu_req(VblkReq *req) +{ + le2cpu_reqcmd(&req->sector); + le2cpu_reqcmd(&req->data); + le2cpu_reqcmd(&req->retval); +} + +static void vblk_cmd(uint64_t devid, BlockBackend *blk, uint64_t gp_addr, + uint64_t static_off) +{ + VblkReq req; + VblkSector sector; + uint64_t off =3D 0; + g_autofree char *buf =3D NULL; + uint8_t ret =3D VBLK_RET_FAILED; + int r; + MemTxResult dma_result; + + dma_result =3D dma_memory_read(&address_space_memory, gp_addr, + &req, sizeof(req), MEMTXATTRS_UNSPECIFIED= ); + if (dma_result !=3D MEMTX_OK) { + goto out; + } + + le2cpu_req(&req); + + if (req.sector.len !=3D sizeof(sector)) { + goto out; + } + + /* Read the vblk command */ + dma_result =3D dma_memory_read(&address_space_memory, req.sector.addr, + §or, sizeof(sector), + MEMTXATTRS_UNSPECIFIED); + if (dma_result !=3D MEMTX_OK) { + goto out; + } + le2cpu_sector(§or); + + off =3D sector.sector * 512ULL + static_off; + + /* Sanity check that we're not allocating bogus sizes */ + if (req.data.len > 128 * MiB) { + goto out; + } + + buf =3D g_malloc0(req.data.len); + switch (req.data.flags) { + case VBLK_DATA_FLAGS_READ: + r =3D blk_pread(blk, off, req.data.len, buf, 0); + trace_bdif_vblk_read(devid =3D=3D DEVID_AUX ? "aux" : "root", + req.data.addr, off, req.data.len, r); + if (r < 0) { + goto out; + } + dma_result =3D dma_memory_write(&address_space_memory, req.data.ad= dr, buf, + req.data.len, MEMTXATTRS_UNSPECIFIED= ); + if (dma_result =3D=3D MEMTX_OK) { + ret =3D VBLK_RET_SUCCESS; + } + break; + case VBLK_DATA_FLAGS_WRITE: + /* Not needed, iBoot only reads */ + break; + default: + break; + } + +out: + dma_memory_write(&address_space_memory, req.retval.addr, &ret, 1, + MEMTXATTRS_UNSPECIFIED); +} + +static void bdif_write(void *opaque, hwaddr offset, + uint64_t value, unsigned size) +{ + VMAppleBdifState *s =3D opaque; + uint64_t devid =3D (offset & REG_DEVID_MASK); + + trace_bdif_write(offset, size, value); + + switch (offset & ~REG_DEVID_MASK) { + case REG_CMD: + switch (devid) { + case DEVID_ROOT: + vblk_cmd(devid, s->root, value, 0x0); + break; + case DEVID_AUX: + vblk_cmd(devid, s->aux, value, 0x0); + break; + } + break; + } +} + +static const MemoryRegionOps bdif_ops =3D { + .read =3D bdif_read, + .write =3D bdif_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, + .valid =3D { + .min_access_size =3D 1, + .max_access_size =3D 8, + }, + .impl =3D { + .min_access_size =3D 1, + .max_access_size =3D 8, + }, +}; + +static void bdif_init(Object *obj) +{ + VMAppleBdifState *s =3D VMAPPLE_BDIF(obj); + + memory_region_init_io(&s->mmio, obj, &bdif_ops, obj, + "VMApple Backdoor Interface", VMAPPLE_BDIF_SIZE); + sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); +} + +static const Property bdif_properties[] =3D { + DEFINE_PROP_DRIVE("aux", VMAppleBdifState, aux), + DEFINE_PROP_DRIVE("root", VMAppleBdifState, root), +}; + +static void bdif_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->desc =3D "VMApple Backdoor Interface"; + device_class_set_props(dc, bdif_properties); +} + +static const TypeInfo bdif_info =3D { + .name =3D TYPE_VMAPPLE_BDIF, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(VMAppleBdifState), + .instance_init =3D bdif_init, + .class_init =3D bdif_class_init, +}; + +static void bdif_register_types(void) +{ + type_register_static(&bdif_info); +} + +type_init(bdif_register_types) diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig index b1944d73129..ff5f97c292e 100644 --- a/hw/vmapple/Kconfig +++ b/hw/vmapple/Kconfig @@ -2,3 +2,6 @@ =20 config VMAPPLE_AES bool + +config VMAPPLE_BDIF + bool diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build index a701d06a39d..e2aca6b7c2b 100644 --- a/hw/vmapple/meson.build +++ b/hw/vmapple/meson.build @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-or-later =20 system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('aes.c')) +system_ss.add(when: 'CONFIG_VMAPPLE_BDIF', if_true: files('bdif.c')) diff --git a/hw/vmapple/trace-events b/hw/vmapple/trace-events index 188547a6ad8..93380ede145 100644 --- a/hw/vmapple/trace-events +++ b/hw/vmapple/trace-events @@ -14,3 +14,8 @@ aes_write(uint64_t offset, uint64_t val) "offset=3D0x%"PR= Ix64" val=3D0x%"PRIx64 aes_2_read(uint64_t offset, uint64_t res) "offset=3D0x%"PRIx64" res=3D0x%"= PRIx64 aes_2_write(uint64_t offset, uint64_t val) "offset=3D0x%"PRIx64" val=3D0x%= "PRIx64 aes_dump_data(const char *desc, const char *hex) "%s%s" + +# bdif.c +bdif_read(uint64_t offset, uint32_t size, uint64_t value) "offset=3D0x%"PR= Ix64" size=3D0x%x value=3D0x%"PRIx64 +bdif_write(uint64_t offset, uint32_t size, uint64_t value) "offset=3D0x%"P= RIx64" size=3D0x%x value=3D0x%"PRIx64 +bdif_vblk_read(const char *dev, uint64_t addr, uint64_t offset, uint32_t l= en, int r) "dev=3D%s addr=3D0x%"PRIx64" off=3D0x%"PRIx64" size=3D0x%x r=3D%= d" --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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This patch models this configuration space as a qdev device which we can then map at the fixed location in the address space. That way, we can influence and annotate all configuration fields easily. Signed-off-by: Alexander Graf Signed-off-by: Phil Dennis-Jordan Reviewed-by: Akihiko Odaki Tested-by: Akihiko Odaki Message-ID: <20241223221645.29911-12-phil@philjordan.eu> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/vmapple/vmapple.h | 2 + hw/vmapple/cfg.c | 195 +++++++++++++++++++++++++++++++++++ hw/vmapple/Kconfig | 3 + hw/vmapple/meson.build | 1 + 4 files changed, 201 insertions(+) create mode 100644 hw/vmapple/cfg.c diff --git a/include/hw/vmapple/vmapple.h b/include/hw/vmapple/vmapple.h index 9090e9c5ac8..3bba59f5ec7 100644 --- a/include/hw/vmapple/vmapple.h +++ b/include/hw/vmapple/vmapple.h @@ -16,4 +16,6 @@ =20 #define TYPE_VMAPPLE_BDIF "vmapple-bdif" =20 +#define TYPE_VMAPPLE_CFG "vmapple-cfg" + #endif /* HW_VMAPPLE_VMAPPLE_H */ diff --git a/hw/vmapple/cfg.c b/hw/vmapple/cfg.c new file mode 100644 index 00000000000..63414d801fe --- /dev/null +++ b/hw/vmapple/cfg.c @@ -0,0 +1,195 @@ +/* + * VMApple Configuration Region + * + * Copyright =C2=A9 2023 Amazon.com, Inc. or its affiliates. All Rights Re= served. + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "hw/vmapple/vmapple.h" +#include "hw/sysbus.h" +#include "qemu/log.h" +#include "qemu/module.h" +#include "qapi/error.h" +#include "net/net.h" + +OBJECT_DECLARE_SIMPLE_TYPE(VMAppleCfgState, VMAPPLE_CFG) + +#define VMAPPLE_CFG_SIZE 0x00010000 + +typedef struct VMAppleCfg { + uint32_t version; /* 0x000 */ + uint32_t nr_cpus; /* 0x004 */ + uint32_t unk1; /* 0x008 */ + uint32_t unk2; /* 0x00c */ + uint32_t unk3; /* 0x010 */ + uint32_t unk4; /* 0x014 */ + uint64_t ecid; /* 0x018 */ + uint64_t ram_size; /* 0x020 */ + uint32_t run_installer1; /* 0x028 */ + uint32_t unk5; /* 0x02c */ + uint32_t unk6; /* 0x030 */ + uint32_t run_installer2; /* 0x034 */ + uint32_t rnd; /* 0x038 */ + uint32_t unk7; /* 0x03c */ + MACAddr mac_en0; /* 0x040 */ + uint8_t pad1[2]; + MACAddr mac_en1; /* 0x048 */ + uint8_t pad2[2]; + MACAddr mac_wifi0; /* 0x050 */ + uint8_t pad3[2]; + MACAddr mac_bt0; /* 0x058 */ + uint8_t pad4[2]; + uint8_t reserved[0xa0]; /* 0x060 */ + uint32_t cpu_ids[0x80]; /* 0x100 */ + uint8_t scratch[0x200]; /* 0x180 */ + char serial[32]; /* 0x380 */ + char unk8[32]; /* 0x3a0 */ + char model[32]; /* 0x3c0 */ + uint8_t unk9[32]; /* 0x3e0 */ + uint32_t unk10; /* 0x400 */ + char soc_name[32]; /* 0x404 */ +} VMAppleCfg; + +struct VMAppleCfgState { + SysBusDevice parent_obj; + VMAppleCfg cfg; + + MemoryRegion mem; + char *serial; + char *model; + char *soc_name; +}; + +static void vmapple_cfg_reset(Object *obj, ResetType type) +{ + VMAppleCfgState *s =3D VMAPPLE_CFG(obj); + VMAppleCfg *cfg; + + cfg =3D memory_region_get_ram_ptr(&s->mem); + memset(cfg, 0, VMAPPLE_CFG_SIZE); + *cfg =3D s->cfg; +} + +static bool set_fixlen_property_or_error(char *restrict dst, + const char *restrict src, + size_t dst_size, Error **errp, + const char *property_name) +{ + ERRP_GUARD(); + size_t len; + + len =3D g_strlcpy(dst, src, dst_size); + if (len < dst_size) { /* len does not count nul terminator */ + return true; + } + + error_setg(errp, "Provided value too long for property '%s'", property= _name); + error_append_hint(errp, "length (%zu) exceeds maximum of %zu\n", + len, dst_size - 1); + return false; +} + +#define set_fixlen_property_or_return(dst_array, src, errp, property_name)= \ + do { \ + if (!set_fixlen_property_or_error((dst_array), (src), \ + ARRAY_SIZE(dst_array), \ + (errp), (property_name))) { \ + return; \ + } \ + } while (0) + +static void vmapple_cfg_realize(DeviceState *dev, Error **errp) +{ + VMAppleCfgState *s =3D VMAPPLE_CFG(dev); + uint32_t i; + + if (!s->serial) { + s->serial =3D g_strdup("1234"); + } + if (!s->model) { + s->model =3D g_strdup("VM0001"); + } + if (!s->soc_name) { + s->soc_name =3D g_strdup("Apple M1 (Virtual)"); + } + + set_fixlen_property_or_return(s->cfg.serial, s->serial, errp, "serial"= ); + set_fixlen_property_or_return(s->cfg.model, s->model, errp, "model"); + set_fixlen_property_or_return(s->cfg.soc_name, s->soc_name, errp, "soc= _name"); + set_fixlen_property_or_return(s->cfg.unk8, "D/A", errp, "unk8"); + s->cfg.version =3D 2; + s->cfg.unk1 =3D 1; + s->cfg.unk2 =3D 1; + s->cfg.unk3 =3D 0x20; + s->cfg.unk4 =3D 0; + s->cfg.unk5 =3D 1; + s->cfg.unk6 =3D 1; + s->cfg.unk7 =3D 0; + s->cfg.unk10 =3D 1; + + if (s->cfg.nr_cpus > ARRAY_SIZE(s->cfg.cpu_ids)) { + error_setg(errp, + "Failed to create %u CPUs, vmapple machine supports %zu= max", + s->cfg.nr_cpus, ARRAY_SIZE(s->cfg.cpu_ids)); + return; + } + for (i =3D 0; i < s->cfg.nr_cpus; i++) { + s->cfg.cpu_ids[i] =3D i; + } +} + +static void vmapple_cfg_init(Object *obj) +{ + VMAppleCfgState *s =3D VMAPPLE_CFG(obj); + + memory_region_init_ram(&s->mem, obj, "VMApple Config", VMAPPLE_CFG_SIZ= E, + &error_fatal); + sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mem); +} + +static const Property vmapple_cfg_properties[] =3D { + DEFINE_PROP_UINT32("nr-cpus", VMAppleCfgState, cfg.nr_cpus, 1), + DEFINE_PROP_UINT64("ecid", VMAppleCfgState, cfg.ecid, 0), + DEFINE_PROP_UINT64("ram-size", VMAppleCfgState, cfg.ram_size, 0), + DEFINE_PROP_UINT32("run_installer1", VMAppleCfgState, cfg.run_installe= r1, 0), + DEFINE_PROP_UINT32("run_installer2", VMAppleCfgState, cfg.run_installe= r2, 0), + DEFINE_PROP_UINT32("rnd", VMAppleCfgState, cfg.rnd, 0), + DEFINE_PROP_MACADDR("mac-en0", VMAppleCfgState, cfg.mac_en0), + DEFINE_PROP_MACADDR("mac-en1", VMAppleCfgState, cfg.mac_en1), + DEFINE_PROP_MACADDR("mac-wifi0", VMAppleCfgState, cfg.mac_wifi0), + DEFINE_PROP_MACADDR("mac-bt0", VMAppleCfgState, cfg.mac_bt0), + DEFINE_PROP_STRING("serial", VMAppleCfgState, serial), + DEFINE_PROP_STRING("model", VMAppleCfgState, model), + DEFINE_PROP_STRING("soc_name", VMAppleCfgState, soc_name), +}; + +static void vmapple_cfg_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + ResettableClass *rc =3D RESETTABLE_CLASS(klass); + + dc->realize =3D vmapple_cfg_realize; + dc->desc =3D "VMApple Configuration Region"; + device_class_set_props(dc, vmapple_cfg_properties); + rc->phases.hold =3D vmapple_cfg_reset; +} + +static const TypeInfo vmapple_cfg_info =3D { + .name =3D TYPE_VMAPPLE_CFG, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(VMAppleCfgState), + .instance_init =3D vmapple_cfg_init, + .class_init =3D vmapple_cfg_class_init, +}; + +static void vmapple_cfg_register_types(void) +{ + type_register_static(&vmapple_cfg_info); +} + +type_init(vmapple_cfg_register_types) diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig index ff5f97c292e..f5898661a91 100644 --- a/hw/vmapple/Kconfig +++ b/hw/vmapple/Kconfig @@ -5,3 +5,6 @@ config VMAPPLE_AES =20 config VMAPPLE_BDIF bool + +config VMAPPLE_CFG + bool diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build index e2aca6b7c2b..9e881c7b555 100644 --- a/hw/vmapple/meson.build +++ b/hw/vmapple/meson.build @@ -2,3 +2,4 @@ =20 system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('aes.c')) system_ss.add(when: 'CONFIG_VMAPPLE_BDIF', if_true: files('bdif.c')) +system_ss.add(when: 'CONFIG_VMAPPLE_CFG', if_true: files('cfg.c')) --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 07/41] hw/vmapple/virtio-blk: Add support for apple virtio-blk Date: Wed, 5 Mar 2025 02:21:22 +0100 Message-ID: <20250305012157.96463-8-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741137884047019100 From: Alexander Graf Apple has its own virtio-blk PCI device ID where it deviates from the official virtio-pci spec slightly: It puts a new "apple type" field at a static offset in config space and introduces a new barrier command. This patch first creates a mechanism for virtio-blk downstream classes to handle unknown commands. It then creates such a downstream class and a new vmapple-virtio-blk-pci class which support the additional apple type config identifier as well as the barrier command. The 'aux' or 'root' device type are selected using the 'variant' property. Signed-off-by: Alexander Graf Signed-off-by: Phil Dennis-Jordan Reviewed-by: Akihiko Odaki Tested-by: Akihiko Odaki Reviewed-by: Michael S. Tsirkin Message-ID: <20241223221645.29911-13-phil@philjordan.eu> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- qapi/virtio.json | 14 ++ include/hw/pci/pci_ids.h | 1 + include/hw/qdev-properties-system.h | 6 + include/hw/virtio/virtio-blk.h | 11 +- include/hw/vmapple/vmapple.h | 2 + hw/block/virtio-blk.c | 17 ++- hw/core/qdev-properties-system.c | 9 ++ hw/vmapple/virtio-blk.c | 204 ++++++++++++++++++++++++++++ hw/vmapple/Kconfig | 3 + hw/vmapple/meson.build | 1 + 10 files changed, 264 insertions(+), 4 deletions(-) create mode 100644 hw/vmapple/virtio-blk.c diff --git a/qapi/virtio.json b/qapi/virtio.json index 2529c2d8b20..d351d2166ef 100644 --- a/qapi/virtio.json +++ b/qapi/virtio.json @@ -992,3 +992,17 @@ ## { 'enum': 'GranuleMode', 'data': [ '4k', '8k', '16k', '64k', 'host' ] } + +## +# @VMAppleVirtioBlkVariant: +# +# @unspecified: The default, not a valid setting. +# +# @root: Block device holding the root volume +# +# @aux: Block device holding auxiliary data required for boot +# +# Since: 9.2 +## +{ 'enum': 'VMAppleVirtioBlkVariant', + 'data': [ 'unspecified', 'root', 'aux' ] } diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h index f1a53fea8d6..33e2898be95 100644 --- a/include/hw/pci/pci_ids.h +++ b/include/hw/pci/pci_ids.h @@ -191,6 +191,7 @@ #define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020 #define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b #define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021 +#define PCI_DEVICE_ID_APPLE_VIRTIO_BLK 0x1a00 =20 #define PCI_VENDOR_ID_SUN 0x108e #define PCI_DEVICE_ID_SUN_EBUS 0x1000 diff --git a/include/hw/qdev-properties-system.h b/include/hw/qdev-properti= es-system.h index ead4dfc2f02..b921392c525 100644 --- a/include/hw/qdev-properties-system.h +++ b/include/hw/qdev-properties-system.h @@ -31,6 +31,7 @@ extern const PropertyInfo qdev_prop_pcie_link_width; extern const PropertyInfo qdev_prop_cpus390entitlement; extern const PropertyInfo qdev_prop_iothread_vq_mapping_list; extern const PropertyInfo qdev_prop_endian_mode; +extern const PropertyInfo qdev_prop_vmapple_virtio_blk_variant; =20 #define DEFINE_PROP_PCI_DEVFN(_n, _s, _f, _d) \ DEFINE_PROP_SIGNED(_n, _s, _f, _d, qdev_prop_pci_devfn, int32_t) @@ -104,4 +105,9 @@ extern const PropertyInfo qdev_prop_endian_mode; #define DEFINE_PROP_ENDIAN_NODEFAULT(_name, _state, _field) \ DEFINE_PROP_ENDIAN(_name, _state, _field, ENDIAN_MODE_UNSPECIFIED) =20 +#define DEFINE_PROP_VMAPPLE_VIRTIO_BLK_VARIANT(_name, _state, _fld, _defau= lt) \ + DEFINE_PROP_UNSIGNED(_name, _state, _fld, _default, \ + qdev_prop_vmapple_virtio_blk_variant, \ + VMAppleVirtioBlkVariant) + #endif diff --git a/include/hw/virtio/virtio-blk.h b/include/hw/virtio/virtio-blk.h index 8a16218c409..3d8dee7ec15 100644 --- a/include/hw/virtio/virtio-blk.h +++ b/include/hw/virtio/virtio-blk.h @@ -24,7 +24,7 @@ #include "qapi/qapi-types-virtio.h" =20 #define TYPE_VIRTIO_BLK "virtio-blk-device" -OBJECT_DECLARE_SIMPLE_TYPE(VirtIOBlock, VIRTIO_BLK) +OBJECT_DECLARE_TYPE(VirtIOBlock, VirtIOBlkClass, VIRTIO_BLK) =20 /* This is the last element of the write scatter-gather list */ struct virtio_blk_inhdr @@ -100,6 +100,15 @@ typedef struct MultiReqBuffer { bool is_write; } MultiReqBuffer; =20 +typedef struct VirtIOBlkClass { + /*< private >*/ + VirtioDeviceClass parent; + /*< public >*/ + bool (*handle_unknown_request)(VirtIOBlockReq *req, MultiReqBuffer *mr= b, + uint32_t type); +} VirtIOBlkClass; + void virtio_blk_handle_vq(VirtIOBlock *s, VirtQueue *vq); +void virtio_blk_req_complete(VirtIOBlockReq *req, unsigned char status); =20 #endif diff --git a/include/hw/vmapple/vmapple.h b/include/hw/vmapple/vmapple.h index 3bba59f5ec7..9c1ad1bd8c3 100644 --- a/include/hw/vmapple/vmapple.h +++ b/include/hw/vmapple/vmapple.h @@ -18,4 +18,6 @@ =20 #define TYPE_VMAPPLE_CFG "vmapple-cfg" =20 +#define TYPE_VMAPPLE_VIRTIO_BLK_PCI "vmapple-virtio-blk-pci" + #endif /* HW_VMAPPLE_VMAPPLE_H */ diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c index a1829e3abdf..5135b4d8f1e 100644 --- a/hw/block/virtio-blk.c +++ b/hw/block/virtio-blk.c @@ -50,7 +50,7 @@ static void virtio_blk_init_request(VirtIOBlock *s, VirtQ= ueue *vq, req->mr_next =3D NULL; } =20 -static void virtio_blk_req_complete(VirtIOBlockReq *req, unsigned char sta= tus) +void virtio_blk_req_complete(VirtIOBlockReq *req, unsigned char status) { VirtIOBlock *s =3D req->dev; VirtIODevice *vdev =3D VIRTIO_DEVICE(s); @@ -961,8 +961,18 @@ static int virtio_blk_handle_request(VirtIOBlockReq *r= eq, MultiReqBuffer *mrb) break; } default: - virtio_blk_req_complete(req, VIRTIO_BLK_S_UNSUPP); - g_free(req); + { + /* + * Give subclasses a chance to handle unknown requests. This way t= he + * class lookup is not in the hot path. + */ + VirtIOBlkClass *vbk =3D VIRTIO_BLK_GET_CLASS(s); + if (!vbk->handle_unknown_request || + !vbk->handle_unknown_request(req, mrb, type)) { + virtio_blk_req_complete(req, VIRTIO_BLK_S_UNSUPP); + g_free(req); + } + } } return 0; } @@ -2029,6 +2039,7 @@ static const TypeInfo virtio_blk_info =3D { .instance_size =3D sizeof(VirtIOBlock), .instance_init =3D virtio_blk_instance_init, .class_init =3D virtio_blk_class_init, + .class_size =3D sizeof(VirtIOBlkClass), }; =20 static void virtio_register_types(void) diff --git a/hw/core/qdev-properties-system.c b/hw/core/qdev-properties-sys= tem.c index 89f954f569e..a91551a5ee8 100644 --- a/hw/core/qdev-properties-system.c +++ b/hw/core/qdev-properties-system.c @@ -1294,3 +1294,12 @@ const PropertyInfo qdev_prop_endian_mode =3D { .set =3D qdev_propinfo_set_enum, .set_default_value =3D qdev_propinfo_set_default_value_enum, }; + +const PropertyInfo qdev_prop_vmapple_virtio_blk_variant =3D { + .name =3D "VMAppleVirtioBlkVariant", + .description =3D "unspecified/root/aux", + .enum_table =3D &VMAppleVirtioBlkVariant_lookup, + .get =3D qdev_propinfo_get_enum, + .set =3D qdev_propinfo_set_enum, + .set_default_value =3D qdev_propinfo_set_default_value_enum, +}; diff --git a/hw/vmapple/virtio-blk.c b/hw/vmapple/virtio-blk.c new file mode 100644 index 00000000000..aa3f18c47db --- /dev/null +++ b/hw/vmapple/virtio-blk.c @@ -0,0 +1,204 @@ +/* + * VMApple specific VirtIO Block implementation + * + * Copyright =C2=A9 2023 Amazon.com, Inc. or its affiliates. All Rights Re= served. + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * VMApple uses almost standard VirtIO Block, but with a few key differenc= es: + * + * - Different PCI device/vendor ID + * - An additional "type" identifier to differentiate AUX and Root volumes + * - An additional BARRIER command + */ + +#include "qemu/osdep.h" +#include "hw/vmapple/vmapple.h" +#include "hw/virtio/virtio-blk.h" +#include "hw/virtio/virtio-pci.h" +#include "qemu/bswap.h" +#include "qemu/log.h" +#include "qemu/module.h" +#include "qapi/error.h" + +#define TYPE_VMAPPLE_VIRTIO_BLK "vmapple-virtio-blk" +OBJECT_DECLARE_TYPE(VMAppleVirtIOBlk, VMAppleVirtIOBlkClass, VMAPPLE_VIRTI= O_BLK) + +typedef struct VMAppleVirtIOBlkClass { + VirtIOBlkClass parent; + + void (*get_config)(VirtIODevice *vdev, uint8_t *config); +} VMAppleVirtIOBlkClass; + +typedef struct VMAppleVirtIOBlk { + VirtIOBlock parent_obj; + + uint32_t apple_type; +} VMAppleVirtIOBlk; + +/* + * vmapple-virtio-blk-pci: This extends VirtioPCIProxy. + */ +OBJECT_DECLARE_SIMPLE_TYPE(VMAppleVirtIOBlkPCI, VMAPPLE_VIRTIO_BLK_PCI) + +#define VIRTIO_BLK_T_APPLE_BARRIER 0x10000 + +static bool vmapple_virtio_blk_handle_unknown_request(VirtIOBlockReq *req, + MultiReqBuffer *mrb, + uint32_t type) +{ + switch (type) { + case VIRTIO_BLK_T_APPLE_BARRIER: + qemu_log_mask(LOG_UNIMP, "%s: Barrier requests are currently no-op= s\n", + __func__); + virtio_blk_req_complete(req, VIRTIO_BLK_S_OK); + g_free(req); + return true; + default: + return false; + } +} + +/* + * VMApple virtio-blk uses the same config format as normal virtio, with o= ne + * exception: It adds an "apple type" specififer at the same location that + * the spec reserves for max_secure_erase_sectors. Let's hook into the + * get_config code path here, run it as usual and then patch in the apple = type. + */ +static void vmapple_virtio_blk_get_config(VirtIODevice *vdev, uint8_t *con= fig) +{ + VMAppleVirtIOBlk *dev =3D VMAPPLE_VIRTIO_BLK(vdev); + VMAppleVirtIOBlkClass *vvbk =3D VMAPPLE_VIRTIO_BLK_GET_CLASS(dev); + struct virtio_blk_config *blkcfg =3D (struct virtio_blk_config *)confi= g; + + vvbk->get_config(vdev, config); + + g_assert(dev->parent_obj.config_size >=3D endof(struct virtio_blk_conf= ig, zoned)); + + /* Apple abuses the field for max_secure_erase_sectors as type id */ + stl_he_p(&blkcfg->max_secure_erase_sectors, dev->apple_type); +} + +static void vmapple_virtio_blk_class_init(ObjectClass *klass, void *data) +{ + VirtIOBlkClass *vbk =3D VIRTIO_BLK_CLASS(klass); + VirtioDeviceClass *vdc =3D VIRTIO_DEVICE_CLASS(klass); + VMAppleVirtIOBlkClass *vvbk =3D VMAPPLE_VIRTIO_BLK_CLASS(klass); + + vbk->handle_unknown_request =3D vmapple_virtio_blk_handle_unknown_requ= est; + vvbk->get_config =3D vdc->get_config; + vdc->get_config =3D vmapple_virtio_blk_get_config; +} + +static const TypeInfo vmapple_virtio_blk_info =3D { + .name =3D TYPE_VMAPPLE_VIRTIO_BLK, + .parent =3D TYPE_VIRTIO_BLK, + .instance_size =3D sizeof(VMAppleVirtIOBlk), + .class_size =3D sizeof(VMAppleVirtIOBlkClass), + .class_init =3D vmapple_virtio_blk_class_init, +}; + +/* PCI Devices */ + +struct VMAppleVirtIOBlkPCI { + VirtIOPCIProxy parent_obj; + + VMAppleVirtIOBlk vdev; + VMAppleVirtioBlkVariant variant; +}; + +static const Property vmapple_virtio_blk_pci_properties[] =3D { + DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), + DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, + VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), + DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, + DEV_NVECTORS_UNSPECIFIED), + DEFINE_PROP_VMAPPLE_VIRTIO_BLK_VARIANT("variant", VMAppleVirtIOBlkPCI,= variant, + VM_APPLE_VIRTIO_BLK_VARIANT_UNS= PECIFIED), +}; + +static void vmapple_virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error= **errp) +{ + ERRP_GUARD(); + VMAppleVirtIOBlkPCI *dev =3D VMAPPLE_VIRTIO_BLK_PCI(vpci_dev); + DeviceState *vdev =3D DEVICE(&dev->vdev); + VirtIOBlkConf *conf =3D &dev->vdev.parent_obj.conf; + + if (dev->variant =3D=3D VM_APPLE_VIRTIO_BLK_VARIANT_UNSPECIFIED) { + error_setg(errp, "vmapple virtio block device variant unspecified"= ); + error_append_hint(errp, + "Variant property must be set to 'aux' or 'root'= .\n" + "Use a regular virtio-blk-pci device instead whe= n " + "neither is applicaple.\n"); + return; + } + + if (conf->num_queues =3D=3D VIRTIO_BLK_AUTO_NUM_QUEUES) { + conf->num_queues =3D virtio_pci_optimal_num_queues(0); + } + + if (vpci_dev->nvectors =3D=3D DEV_NVECTORS_UNSPECIFIED) { + vpci_dev->nvectors =3D conf->num_queues + 1; + } + + /* + * We don't support zones, but we need the additional config space siz= e. + * Let's just expose the feature so the rest of the virtio-blk logic + * allocates enough space for us. The guest will ignore zones anyway. + */ + virtio_add_feature(&dev->vdev.parent_obj.host_features, VIRTIO_BLK_F_Z= ONED); + /* Propagate the apple type down to the virtio-blk device */ + dev->vdev.apple_type =3D dev->variant; + /* and spawn the virtio-blk device */ + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); + + /* + * The virtio-pci machinery adjusts its vendor/device ID based on whet= her + * we support modern or legacy virtio. Let's patch it back to the Apple + * identifiers here. + */ + pci_config_set_vendor_id(vpci_dev->pci_dev.config, PCI_VENDOR_ID_APPLE= ); + pci_config_set_device_id(vpci_dev->pci_dev.config, + PCI_DEVICE_ID_APPLE_VIRTIO_BLK); +} + +static void vmapple_virtio_blk_pci_class_init(ObjectClass *klass, void *da= ta) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + VirtioPCIClass *k =3D VIRTIO_PCI_CLASS(klass); + PCIDeviceClass *pcidev_k =3D PCI_DEVICE_CLASS(klass); + + set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); + device_class_set_props(dc, vmapple_virtio_blk_pci_properties); + k->realize =3D vmapple_virtio_blk_pci_realize; + pcidev_k->vendor_id =3D PCI_VENDOR_ID_APPLE; + pcidev_k->device_id =3D PCI_DEVICE_ID_APPLE_VIRTIO_BLK; + pcidev_k->revision =3D VIRTIO_PCI_ABI_VERSION; + pcidev_k->class_id =3D PCI_CLASS_STORAGE_SCSI; +} + +static void vmapple_virtio_blk_pci_instance_init(Object *obj) +{ + VMAppleVirtIOBlkPCI *dev =3D VMAPPLE_VIRTIO_BLK_PCI(obj); + + virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), + TYPE_VMAPPLE_VIRTIO_BLK); +} + +static const VirtioPCIDeviceTypeInfo vmapple_virtio_blk_pci_info =3D { + .generic_name =3D TYPE_VMAPPLE_VIRTIO_BLK_PCI, + .instance_size =3D sizeof(VMAppleVirtIOBlkPCI), + .instance_init =3D vmapple_virtio_blk_pci_instance_init, + .class_init =3D vmapple_virtio_blk_pci_class_init, +}; + +static void vmapple_virtio_blk_register_types(void) +{ + type_register_static(&vmapple_virtio_blk_info); + virtio_pci_types_register(&vmapple_virtio_blk_pci_info); +} + +type_init(vmapple_virtio_blk_register_types) diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig index f5898661a91..5586fd460b7 100644 --- a/hw/vmapple/Kconfig +++ b/hw/vmapple/Kconfig @@ -8,3 +8,6 @@ config VMAPPLE_BDIF =20 config VMAPPLE_CFG bool + +config VMAPPLE_VIRTIO_BLK + bool diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build index 9e881c7b555..3553ec61518 100644 --- a/hw/vmapple/meson.build +++ b/hw/vmapple/meson.build @@ -3,3 +3,4 @@ system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('aes.c')) system_ss.add(when: 'CONFIG_VMAPPLE_BDIF', if_true: files('bdif.c')) system_ss.add(when: 'CONFIG_VMAPPLE_CFG', if_true: files('cfg.c')) +system_ss.add(when: 'CONFIG_VMAPPLE_VIRTIO_BLK', if_true: files('virtio-b= lk.c')) --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138560; cv=none; d=zohomail.com; s=zohoarc; b=UiraEiJlG298k7HEjfkl3QhuZsV0oUd/WH/Hy/alDTvD7J1S1v0RfH+wxOyi2cUldiRkS/Pd2teRHwisTgGtO/fronofIlyuYEJXjmd+qrZuLhChNDoK7SsBlrlabr0UGhjPXo5DsvhCDpX3LvUrV1YvI3UQ7t5eQP4R2E68nIg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138560; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=jzLF6WZxlhetZaZPRfOe7fKCtkMcxscueckYeAPjn3I=; b=jGI7D3Ae+VLUGz3IoO87GwXkjniUepKsuok0r3X2rg+0VLjjEUwyrlJPAsheqQ4xJ2WcJJlHX/iO4Fm7TWyfmObs89JpLPUe/pS5gMB2PgVd1pUHUDNqV+PQ6fv6BC0sjQZWRmFYFR5KS87vClv0nDGk/jYdJia+fYs8sbi5EyA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 174113856057816.70361777793562; Tue, 4 Mar 2025 17:36:00 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdU7-0001Rl-SF; Tue, 04 Mar 2025 20:23:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdTB-0008ES-T6 for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:22:53 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdT8-0006yg-Bq for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:22:44 -0500 Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-43996e95114so42446825e9.3 for ; Tue, 04 Mar 2025 17:22:41 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e485dbe7sm19453481f8f.93.2025.03.04.17.22.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:22:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137760; x=1741742560; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jzLF6WZxlhetZaZPRfOe7fKCtkMcxscueckYeAPjn3I=; b=M/PeVj4dw7tUxqzLOXL2zPIl9u7sLALOThyIPD6D6l8vWR3CLmFFwGQeqUkxOp6rmp 1Cz2KVmkDuMjlHVkK/4f3bdBiYgodIn9VSM4oK4Ldurg4aNTA7f+hTFEuwIlVXKV5SaY KErEz+SEMv+3OSwsteYuHR+PQQhzEA2dsfis57IwK78u2+g4M62c8mUdU0mSYlD/I44y /F2+A9nSHF+RE6Xb2WCQF9Lk5vxaUYXmJ7hTXAP+elh8YxnXOMAzxUjtjGWHOAnlx2H9 ByELEIF3ihDLB2nOHrcA1MSlKXqbF9a0XVhExj8qJNDxuSuONbjMztJu8FANgy1Y0JVT sdLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137760; x=1741742560; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jzLF6WZxlhetZaZPRfOe7fKCtkMcxscueckYeAPjn3I=; b=PJjxcJRQ8b4pjdy/bHU/eblchp5ztsVDUzDuHH554WprZsXEyrPtxf3N+09MFxlm9I IcVUVHQEJRn+kwqFzwFgyWiw8TeTv9Im6exYM/4zyn5kl+pgEbic6ExWcpMOOJ99lgMw 9HZWoIaM0Qu0pC/6cxYwIxC66CJSAOdlIL42oZ0wEYb+pqbdgbnmFqOXo1i42arzHFO/ DhRFEjZbtSLeBEio81Mlpff/gFgN2MYPR4eEdxmJzfdNKrAkPLZr2gTYzwOvNEIhEPjy mVOg+VV5HfK2F+Rjy4xqQLPUhhW3RvHHephEu30e68qOLLtwKe2xoejldeKQGGHbBC0+ s5zg== X-Gm-Message-State: AOJu0Yyqr+hbdG8ICDkh+UPbEXOqEg/mUSjTn+Yrt6BUczjkqs6wsgV8 gJ730FX1gSd0w6oQQO7xSTmFWlBcinaMhSSDftY003VgvHXJHkiNRIh9kV3ixi4h/Dw0ccffu+A n7Mg= X-Gm-Gg: ASbGncsN2imeQRSTvGdyxBx/JFFo/Au+0OFAEJmv1vnsacB0LGNhLYVd/M70RSsxsmg pjvopAqILgSxYQCufkPYKOT7tbYR1yD9g2yu/TZB3MloSEkkMIzUiHwM2t9FbxFaVeS4CnczxIo QsVO4lwqoJQXfUa6Ritl8YGr2/cqpDd5LFrrUBLFNntJXdHYIbjfAh40gNRr2D7hwFChGW2pS6x j/IlzrXBKDvBlIGYa+EXKiT6Ox1ChLufMPV4Eittv9RbE3dcW3nucBisufPfNygraNzkjn6isVt F8DtKbQkaGd6fAqkbeL+k+TfZFATICCCPPuAjBiifV1gH7N41q7x/aLsaDHsquFOx1rUaqyUG6q 6yuUmrnSNPYjoiqfGEz8= X-Google-Smtp-Source: AGHT+IEshfpKkA6ikGZVQ2k/+H4mv6GdpJjA6UmTKWZ4vejNzlDt6uAN+kXZj1c8ZkU+E4m8Ki+8AQ== X-Received: by 2002:a05:6000:2c6:b0:385:f249:c336 with SMTP id ffacd0b85a97d-3911f7c4703mr616891f8f.45.1741137760367; Tue, 04 Mar 2025 17:22:40 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Phil Dennis-Jordan , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 08/41] hw/usb/hcd-xhci-pci: Adds property for disabling mapping in IRQ mode Date: Wed, 5 Mar 2025 02:21:23 +0100 Message-ID: <20250305012157.96463-9-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741138562706019100 From: Phil Dennis-Jordan This change addresses an edge case that trips up macOS guest drivers for PCI based XHCI controllers. The guest driver would attempt to schedule events to XHCI event rings 1 and 2 even when using PCI pin-based interrupts. Interrupts would therefore be dropped, and events only handled on timeout. So, in addition to disabling interrupter mapping if numintrs is 1, a callback is added to xhci to check whether interrupter mapping should be enabled. The PCI XHCI device type now provides an implementation of this callback if the new "conditional-intr-mapping" property is enabled. (default: disabled) When enabled, interrupter mapping is only enabled when MSI-X or MSI is active. This means that when using pin-based interrupts, events are only submitted to interrupter 0 regardless of selected target. This allows the macOS guest drivers to work with the device in those configurations. Signed-off-by: Phil Dennis-Jordan Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2705 Message-ID: <20241227121336.25838-6-phil@philjordan.eu> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/usb/hcd-xhci-pci.h | 1 + hw/usb/hcd-xhci.h | 5 +++++ hw/usb/hcd-xhci-pci.c | 24 ++++++++++++++++++++++++ hw/usb/hcd-xhci.c | 3 ++- 4 files changed, 32 insertions(+), 1 deletion(-) diff --git a/hw/usb/hcd-xhci-pci.h b/hw/usb/hcd-xhci-pci.h index 08f70ce97cc..5b61ae84555 100644 --- a/hw/usb/hcd-xhci-pci.h +++ b/hw/usb/hcd-xhci-pci.h @@ -40,6 +40,7 @@ typedef struct XHCIPciState { XHCIState xhci; OnOffAuto msi; OnOffAuto msix; + bool conditional_intr_mapping; } XHCIPciState; =20 #endif diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index 9609b835141..9c3974f1489 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -193,6 +193,11 @@ typedef struct XHCIState { uint32_t max_pstreams_mask; void (*intr_update)(XHCIState *s, int n, bool enable); bool (*intr_raise)(XHCIState *s, int n, bool level); + /* + * Callback for special-casing interrupter mapping support. NULL for m= ost + * implementations, for defaulting to enabled mapping unless numintrs = =3D=3D 1. + */ + bool (*intr_mapping_supported)(XHCIState *s); DeviceState *hostOpaque; =20 /* Operational Registers */ diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c index 49642aab58e..d908eb787d3 100644 --- a/hw/usb/hcd-xhci-pci.c +++ b/hw/usb/hcd-xhci-pci.c @@ -82,6 +82,21 @@ static bool xhci_pci_intr_raise(XHCIState *xhci, int n, = bool level) return false; } =20 +static bool xhci_pci_intr_mapping_conditional(XHCIState *xhci) +{ + XHCIPciState *s =3D container_of(xhci, XHCIPciState, xhci); + PCIDevice *pci_dev =3D PCI_DEVICE(s); + + /* + * Implementation of the "conditional-intr-mapping" property, which on= ly + * enables interrupter mapping if MSI or MSI-X is available and active. + * Forces all events onto interrupter/event ring 0 in pin-based IRQ mo= de. + * Provides compatibility with macOS guests on machine types where MSI= (-X) + * is not available. + */ + return msix_enabled(pci_dev) || msi_enabled(pci_dev); +} + static void xhci_pci_reset(DeviceState *dev) { XHCIPciState *s =3D XHCI_PCI(dev); @@ -119,6 +134,9 @@ static void usb_xhci_pci_realize(struct PCIDevice *dev,= Error **errp) object_property_set_link(OBJECT(&s->xhci), "host", OBJECT(s), NULL); s->xhci.intr_update =3D xhci_pci_intr_update; s->xhci.intr_raise =3D xhci_pci_intr_raise; + if (s->conditional_intr_mapping) { + s->xhci.intr_mapping_supported =3D xhci_pci_intr_mapping_condition= al; + } if (!qdev_realize(DEVICE(&s->xhci), NULL, errp)) { return; } @@ -201,6 +219,8 @@ static void xhci_instance_init(Object *obj) static const Property xhci_pci_properties[] =3D { DEFINE_PROP_ON_OFF_AUTO("msi", XHCIPciState, msi, ON_OFF_AUTO_AUTO), DEFINE_PROP_ON_OFF_AUTO("msix", XHCIPciState, msix, ON_OFF_AUTO_AUTO), + DEFINE_PROP_BOOL("conditional-intr-mapping", XHCIPciState, + conditional_intr_mapping, false), }; =20 static void xhci_class_init(ObjectClass *klass, void *data) @@ -215,6 +235,10 @@ static void xhci_class_init(ObjectClass *klass, void *= data) k->exit =3D usb_xhci_pci_exit; k->class_id =3D PCI_CLASS_SERIAL_USB; device_class_set_props(dc, xhci_pci_properties); + object_class_property_set_description(klass, "conditional-intr-mapping= ", + "When true, disables interrupter mapping for pin-based IRQ mode. " + "Intended to be used with guest drivers with questionable behaviou= r, " + "such as macOS's."); } =20 static const TypeInfo xhci_pci_info =3D { diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index 00d5bc37792..64c3a23b9b7 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -644,7 +644,8 @@ static void xhci_event(XHCIState *xhci, XHCIEvent *even= t, int v) dma_addr_t erdp; unsigned int dp_idx; =20 - if (xhci->numintrs =3D=3D 1) { + if (xhci->numintrs =3D=3D 1 || + (xhci->intr_mapping_supported && !xhci->intr_mapping_supported(xhc= i))) { v =3D 0; } =20 --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741137990; cv=none; d=zohomail.com; s=zohoarc; b=EC/HGsCFiTCFCjIfGg6YBx7xJronm/ZobpzFT9vPV4w3M3LpYx13Qor2ruIYv7v1X4fYj2nuvyHwWUXP8fWe+8Rc4bte/9WiIPYGBDgOJSQDchd3L7TCu88Biza5Xsr0D4ZXXBPi/uVr4Le/XhKKGEc219Wq28fVA3PsVO+B4pc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741137990; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=SPUpypQZ2LXw+I58ulYTyqaYJo2Hf3jVeCz2jXbt7w8=; b=e17aGDoeD2MOsxn14tnC0Fvvddqb1B2x/VU4sdU7MTT9/IDFD/NsGeqg7BLNVZU61GUvatKUXotn0piKzY3Tke9IfIeay657C1fHUOW2PLbK3fpiwYq4f1A1BrHFCxyEEFN3LhIpfrvyp8v6mSnOI1oT+Mzi0vF9J1ABfa7ltSw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741137990466262.43059369034506; Tue, 4 Mar 2025 17:26:30 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdU1-00018w-G4; Tue, 04 Mar 2025 20:23:37 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdTH-0008J6-IZ for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:22:54 -0500 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdTD-0006zQ-JW for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:22:51 -0500 Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-439ac3216dcso42529555e9.1 for ; Tue, 04 Mar 2025 17:22:47 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e47a7473sm19561396f8f.38.2025.03.04.17.22.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:22:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137766; x=1741742566; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SPUpypQZ2LXw+I58ulYTyqaYJo2Hf3jVeCz2jXbt7w8=; b=FdxcEncz/kZJQa28w7bX0NSrqfys198HTSy1xvug3fcErMcb+GcsI4b2FcrcUubAPT klun8yq2MzlfO5+yQBGPLdxFZuRtFcDDfpeTA6AmDyGEkRSVDKA3SlJ+o0clyv262a8q tdtDP++kWozwihB2GXRq8Fwt/Gs7SvYvVrNdnGqv9nI465eXHQ8Ao3Xrev2OSnc7v+Un 9IuozecySNssv+kNNKmv1axYgziI1LK6/5gi/PClA1Xvb5HPBcEzAHN91xosnhysmMK+ KqIOokmOkXCpz1pXUjor4LiY2kn3qUxb/YYD1/s6TzkbQvHfTxZwBZQry8gzeRXQwxyh oVrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137766; x=1741742566; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SPUpypQZ2LXw+I58ulYTyqaYJo2Hf3jVeCz2jXbt7w8=; b=oaUATj4Z7LEorP510ymNFJeN1/+kMciWJIJ6XapGoQ3DjrrDGdow3E8yRCJOTps6f8 AI1KsIFXMt+W46p4/icFK9/21QQfnDatfIuC6guvPimzSwuCMm0f6ZZBObBJevYQCgNI GJkvcp4850ygO/ukIhdqKN1bYA2vy51Tr/hFhvG7JWwlC7n1j/XdEpZIL95V+euZ5mpg bvqC2WWAU/+xIIrEyDCRmnGVNfXDMzY9+Xc17z2BUl/k4eRBY+OKgeQqz+PVzsfUp20v 2CQtOW3zOR2fOfTjz9IWxbQF6UyjwPpQA6uwQypTbdVFEFTtT16X7rEBE+KJYMfpLo1o PbsA== X-Gm-Message-State: AOJu0YyQGECNDltQI1zWwbizj5Tbb2y3MaJhSa5M5+7yVfVKkMxVxVeZ 8RGeGT05ykyHB1RE02VqJza4TVHOqhk+y13eWvXwgZKXU6LIYeIUy/K6UQN7NkaoeutMGw8/Uxz z0LY= X-Gm-Gg: ASbGncsVmftkalAbJ3Q02hn0lhkL7Naow8qJSwPy5SGAG6AVw+uUqJcH8wZI8g2EjDx O9kwkO1Rcrba76aY60BODR83ZViZwFksWtDiBGRZyQnwgu41wimdOpGGajJplYkqCRH8mxZsvO2 +iwXJqIEbISRsn1lXadmN06E68ixSvcMjO2NKCLioJ+awVqwoOr8TpWt8DwnVUc9xbRC4fJI7+C EN2qgWejInXoZxG2cu47IB1otTohrJ+/UUdClfdkbB3wGHFERxMdVqsRApiwf5PQ/537AWGJgAR HS5vUjmKcyy/VxBlaAc+NmX/ygNPiWHLGMZTisJbmqpLMeenbkOOfHb5YZCfW7CGMYr739Pv1pZ Lr5rBrkvPoZFXx5Z5riQ= X-Google-Smtp-Source: AGHT+IEoaBPQE3gqjzub2Druv5E1I4MDShGJfPzkd0l5FBRgGENTZjK9ndS5yH4Oqkz6z35AwsnilQ== X-Received: by 2002:a5d:47a7:0:b0:391:5f:fa13 with SMTP id ffacd0b85a97d-3911f7c5584mr610678f8f.47.1741137765549; Tue, 04 Mar 2025 17:22:45 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alexander Graf , Phil Dennis-Jordan , Akihiko Odaki , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 09/41] hw/vmapple/vmapple: Add vmapple machine type Date: Wed, 5 Mar 2025 02:21:24 +0100 Message-ID: <20250305012157.96463-10-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741137992379019100 From: Alexander Graf Apple defines a new "vmapple" machine type as part of its proprietary macOS Virtualization.Framework vmm. This machine type is similar to the virt one, but with subtle differences in base devices, a few special vmapple device additions and a vastly different boot chain. This patch reimplements this machine type in QEMU. To use it, you have to have a readily installed version of macOS for VMApple, run on macOS with -accel hvf, pass the Virtualization.Framework boot rom (AVPBooter) in via -bios, pass the aux and root volume as pflash and pass aux and root volume as virtio drives. In addition, you also need to find the machine UUID and pass that as -M vmapple,uuid=3D parameter: $ qemu-system-aarch64 -accel hvf -M vmapple,uuid=3D0x1234 -m 4G \ -bios /System/Library/Frameworks/Virtualization.framework/Versions/A/Re= sources/AVPBooter.vmapple2.bin -drive file=3Daux,if=3Dpflash,format=3Draw \ -drive file=3Droot,if=3Dpflash,format=3Draw \ -drive file=3Daux,if=3Dnone,id=3Daux,format=3Draw \ -device vmapple-virtio-blk-pci,variant=3Daux,drive=3Daux \ -drive file=3Droot,if=3Dnone,id=3Droot,format=3Draw \ -device vmapple-virtio-blk-pci,variant=3Droot,drive=3Droot With all these in place, you should be able to see macOS booting successfully. Known issues: - Currently only macOS 12 guests are supported. The boot process for 13+ will need further investigation and adjustment. Signed-off-by: Alexander Graf Co-authored-by: Phil Dennis-Jordan Signed-off-by: Phil Dennis-Jordan Reviewed-by: Akihiko Odaki Tested-by: Akihiko Odaki Message-ID: <20241223221645.29911-15-phil@philjordan.eu> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- MAINTAINERS | 1 + docs/system/arm/vmapple.rst | 65 ++++ docs/system/target-arm.rst | 1 + hw/vmapple/vmapple.c | 618 ++++++++++++++++++++++++++++++++++++ contrib/vmapple/uuid.sh | 12 + hw/vmapple/Kconfig | 21 ++ hw/vmapple/meson.build | 1 + 7 files changed, 719 insertions(+) create mode 100644 docs/system/arm/vmapple.rst create mode 100644 hw/vmapple/vmapple.c create mode 100755 contrib/vmapple/uuid.sh diff --git a/MAINTAINERS b/MAINTAINERS index 0e160360918..d1e69539de0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2826,6 +2826,7 @@ M: Phil Dennis-Jordan S: Maintained F: hw/vmapple/* F: include/hw/vmapple/* +F: docs/system/arm/vmapple.rst =20 Subsystems ---------- diff --git a/docs/system/arm/vmapple.rst b/docs/system/arm/vmapple.rst new file mode 100644 index 00000000000..35c329ea5a8 --- /dev/null +++ b/docs/system/arm/vmapple.rst @@ -0,0 +1,65 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +VMApple machine emulation +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +VMApple is the device model that the macOS built-in hypervisor called "Vir= tualization.framework" +exposes to Apple Silicon macOS guests. The "vmapple" machine model in QEMU= implements the same +device model, but does not use any code from Virtualization.Framework. + +Prerequisites +------------- + +To run the vmapple machine model, you need to + + * Run on Apple Silicon + * Run on macOS 12.0 or above + * Have an already installed copy of a Virtualization.Framework macOS 12 v= irtual + machine. Note that newer versions than 12.x are currently NOT supported= on + the guest side. I will assume that you installed it using the + `macosvm `__ CLI. + +First, we need to extract the UUID from the virtual machine that you insta= lled. You can do this +by running the shell script in contrib/vmapple/uuid.sh on the macosvm.json= file. + +.. code-block:: bash + :caption: uuid.sh script to extract the UUID from a macosvm.json file + + $ contrib/vmapple/uuid.sh "path/to/macosvm.json" + +Now we also need to trim the aux partition. It contains metadata that we c= an just discard: + +.. code-block:: bash + :caption: Command to trim the aux file + + $ dd if=3D"aux.img" of=3D"aux.img.trimmed" bs=3D$(( 0x4000 )) skip=3D1 + +How to run +---------- + +Then, we can launch QEMU with the Virtualization.Framework pre-boot enviro= nment and the readily +installed target disk images. I recommend to port forward the VM's ssh and= vnc ports to the host +to get better interactive access into the target system: + +.. code-block:: bash + :caption: Example execution command line + + $ UUID=3D"$(contrib/vmapple/uuid.sh 'macosvm.json')" + $ AVPBOOTER=3D"/System/Library/Frameworks/Virtualization.framework/Resou= rces/AVPBooter.vmapple2.bin" + $ AUX=3D"aux.img.trimmed" + $ DISK=3D"disk.img" + $ qemu-system-aarch64 \ + -serial mon:stdio \ + -m 4G \ + -accel hvf \ + -M vmapple,uuid=3D"$UUID" \ + -bios "$AVPBOOTER" \ + -drive file=3D"$AUX",if=3Dpflash,format=3Draw \ + -drive file=3D"$DISK",if=3Dpflash,format=3Draw \ + -drive file=3D"$AUX",if=3Dnone,id=3Daux,format=3Draw \ + -drive file=3D"$DISK",if=3Dnone,id=3Droot,format=3Draw \ + -device vmapple-virtio-blk-pci,variant=3Daux,drive=3Daux \ + -device vmapple-virtio-blk-pci,variant=3Droot,drive=3Droot \ + -netdev user,id=3Dnet0,ipv6=3Doff,hostfwd=3Dtcp::2222-:22,hostfwd= =3Dtcp::5901-:5900 \ + -device virtio-net-pci,netdev=3Dnet0 + diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst index a43ec8f10e0..b96a05a9206 100644 --- a/docs/system/target-arm.rst +++ b/docs/system/target-arm.rst @@ -103,6 +103,7 @@ Board-specific documentation arm/stellaris arm/stm32 arm/virt + arm/vmapple arm/xenpvh arm/xlnx-versal-virt arm/xlnx-zynq diff --git a/hw/vmapple/vmapple.c b/hw/vmapple/vmapple.c new file mode 100644 index 00000000000..fa117bf1511 --- /dev/null +++ b/hw/vmapple/vmapple.c @@ -0,0 +1,618 @@ +/* + * VMApple machine emulation + * + * Copyright =C2=A9 2023 Amazon.com, Inc. or its affiliates. All Rights Re= served. + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * VMApple is the device model that the macOS built-in hypervisor called + * "Virtualization.framework" exposes to Apple Silicon macOS guests. The + * machine model in this file implements the same device model in QEMU, but + * does not use any code from Virtualization.Framework. + */ + +#include "qemu/osdep.h" +#include "qemu/bitops.h" +#include "qemu/datadir.h" +#include "qemu/error-report.h" +#include "qemu/guest-random.h" +#include "qemu/help-texts.h" +#include "qemu/log.h" +#include "qemu/module.h" +#include "qemu/option.h" +#include "qemu/units.h" +#include "monitor/qdev.h" +#include "hw/boards.h" +#include "hw/irq.h" +#include "hw/loader.h" +#include "hw/qdev-properties.h" +#include "hw/sysbus.h" +#include "hw/usb.h" +#include "hw/arm/boot.h" +#include "hw/arm/primecell.h" +#include "hw/char/pl011.h" +#include "hw/intc/arm_gic.h" +#include "hw/intc/arm_gicv3_common.h" +#include "hw/misc/pvpanic.h" +#include "hw/pci-host/gpex.h" +#include "hw/usb/hcd-xhci-pci.h" +#include "hw/virtio/virtio-pci.h" +#include "hw/vmapple/vmapple.h" +#include "net/net.h" +#include "qapi/error.h" +#include "qapi/visitor.h" +#include "qapi/qapi-visit-common.h" +#include "qobject/qlist.h" +#include "standard-headers/linux/input.h" +#include "system/hvf.h" +#include "system/reset.h" +#include "system/runstate.h" +#include "system/system.h" + +struct VMAppleMachineState { + MachineState parent; + + Notifier machine_done; + struct arm_boot_info bootinfo; + const MemMapEntry *memmap; + const int *irqmap; + DeviceState *gic; + DeviceState *cfg; + DeviceState *pvpanic; + Notifier powerdown_notifier; + PCIBus *bus; + MemoryRegion fw_mr; + MemoryRegion ecam_alias; + uint64_t uuid; +}; + +#define TYPE_VMAPPLE_MACHINE MACHINE_TYPE_NAME("vmapple") +OBJECT_DECLARE_SIMPLE_TYPE(VMAppleMachineState, VMAPPLE_MACHINE) + +/* Number of external interrupt lines to configure the GIC with */ +#define NUM_IRQS 256 + +enum { + VMAPPLE_FIRMWARE, + VMAPPLE_CONFIG, + VMAPPLE_MEM, + VMAPPLE_GIC_DIST, + VMAPPLE_GIC_REDIST, + VMAPPLE_UART, + VMAPPLE_RTC, + VMAPPLE_PCIE, + VMAPPLE_PCIE_MMIO, + VMAPPLE_PCIE_ECAM, + VMAPPLE_GPIO, + VMAPPLE_PVPANIC, + VMAPPLE_APV_GFX, + VMAPPLE_APV_IOSFC, + VMAPPLE_AES_1, + VMAPPLE_AES_2, + VMAPPLE_BDOOR, + VMAPPLE_MEMMAP_LAST, +}; + +static const MemMapEntry memmap[] =3D { + [VMAPPLE_FIRMWARE] =3D { 0x00100000, 0x00100000 }, + [VMAPPLE_CONFIG] =3D { 0x00400000, 0x00010000 }, + + [VMAPPLE_GIC_DIST] =3D { 0x10000000, 0x00010000 }, + [VMAPPLE_GIC_REDIST] =3D { 0x10010000, 0x00400000 }, + + [VMAPPLE_UART] =3D { 0x20010000, 0x00010000 }, + [VMAPPLE_RTC] =3D { 0x20050000, 0x00001000 }, + [VMAPPLE_GPIO] =3D { 0x20060000, 0x00001000 }, + [VMAPPLE_PVPANIC] =3D { 0x20070000, 0x00000002 }, + [VMAPPLE_BDOOR] =3D { 0x30000000, 0x00200000 }, + [VMAPPLE_APV_GFX] =3D { 0x30200000, 0x00010000 }, + [VMAPPLE_APV_IOSFC] =3D { 0x30210000, 0x00010000 }, + [VMAPPLE_AES_1] =3D { 0x30220000, 0x00004000 }, + [VMAPPLE_AES_2] =3D { 0x30230000, 0x00004000 }, + [VMAPPLE_PCIE_ECAM] =3D { 0x40000000, 0x10000000 }, + [VMAPPLE_PCIE_MMIO] =3D { 0x50000000, 0x1fff0000 }, + + /* Actual RAM size depends on configuration */ + [VMAPPLE_MEM] =3D { 0x70000000ULL, GiB}, +}; + +static const int irqmap[] =3D { + [VMAPPLE_UART] =3D 1, + [VMAPPLE_RTC] =3D 2, + [VMAPPLE_GPIO] =3D 0x5, + [VMAPPLE_APV_IOSFC] =3D 0x10, + [VMAPPLE_APV_GFX] =3D 0x11, + [VMAPPLE_AES_1] =3D 0x12, + [VMAPPLE_PCIE] =3D 0x20, +}; + +#define GPEX_NUM_IRQS 16 + +static void create_bdif(VMAppleMachineState *vms, MemoryRegion *mem) +{ + DeviceState *bdif; + SysBusDevice *bdif_sb; + DriveInfo *di_aux =3D drive_get(IF_PFLASH, 0, 0); + DriveInfo *di_root =3D drive_get(IF_PFLASH, 0, 1); + + if (!di_aux) { + error_report("No AUX device. Please specify one as pflash drive."); + exit(1); + } + + if (!di_root) { + /* Fall back to the first IF_VIRTIO device as root device */ + di_root =3D drive_get(IF_VIRTIO, 0, 0); + } + + if (!di_root) { + error_report("No root device. Please specify one as virtio drive."= ); + exit(1); + } + + /* PV backdoor device */ + bdif =3D qdev_new(TYPE_VMAPPLE_BDIF); + bdif_sb =3D SYS_BUS_DEVICE(bdif); + sysbus_mmio_map(bdif_sb, 0, vms->memmap[VMAPPLE_BDOOR].base); + + qdev_prop_set_drive(DEVICE(bdif), "aux", blk_by_legacy_dinfo(di_aux)); + qdev_prop_set_drive(DEVICE(bdif), "root", blk_by_legacy_dinfo(di_root)= ); + + sysbus_realize_and_unref(bdif_sb, &error_fatal); +} + +static void create_pvpanic(VMAppleMachineState *vms, MemoryRegion *mem) +{ + SysBusDevice *pvpanic; + + vms->pvpanic =3D qdev_new(TYPE_PVPANIC_MMIO_DEVICE); + pvpanic =3D SYS_BUS_DEVICE(vms->pvpanic); + sysbus_mmio_map(pvpanic, 0, vms->memmap[VMAPPLE_PVPANIC].base); + + sysbus_realize_and_unref(pvpanic, &error_fatal); +} + +static bool create_cfg(VMAppleMachineState *vms, MemoryRegion *mem, + Error **errp) +{ + ERRP_GUARD(); + SysBusDevice *cfg; + MachineState *machine =3D MACHINE(vms); + uint32_t rnd =3D 1; + + vms->cfg =3D qdev_new(TYPE_VMAPPLE_CFG); + cfg =3D SYS_BUS_DEVICE(vms->cfg); + sysbus_mmio_map(cfg, 0, vms->memmap[VMAPPLE_CONFIG].base); + + qemu_guest_getrandom_nofail(&rnd, sizeof(rnd)); + + qdev_prop_set_uint32(vms->cfg, "nr-cpus", machine->smp.cpus); + qdev_prop_set_uint64(vms->cfg, "ecid", vms->uuid); + qdev_prop_set_uint64(vms->cfg, "ram-size", machine->ram_size); + qdev_prop_set_uint32(vms->cfg, "rnd", rnd); + + if (!sysbus_realize_and_unref(cfg, errp)) { + error_prepend(errp, "Error creating vmapple cfg device: "); + return false; + } + + return true; +} + +static void create_gfx(VMAppleMachineState *vms, MemoryRegion *mem) +{ + int irq_gfx =3D vms->irqmap[VMAPPLE_APV_GFX]; + int irq_iosfc =3D vms->irqmap[VMAPPLE_APV_IOSFC]; + SysBusDevice *gfx; + + gfx =3D SYS_BUS_DEVICE(qdev_new("apple-gfx-mmio")); + sysbus_mmio_map(gfx, 0, vms->memmap[VMAPPLE_APV_GFX].base); + sysbus_mmio_map(gfx, 1, vms->memmap[VMAPPLE_APV_IOSFC].base); + sysbus_connect_irq(gfx, 0, qdev_get_gpio_in(vms->gic, irq_gfx)); + sysbus_connect_irq(gfx, 1, qdev_get_gpio_in(vms->gic, irq_iosfc)); + sysbus_realize_and_unref(gfx, &error_fatal); +} + +static void create_aes(VMAppleMachineState *vms, MemoryRegion *mem) +{ + int irq =3D vms->irqmap[VMAPPLE_AES_1]; + SysBusDevice *aes; + + aes =3D SYS_BUS_DEVICE(qdev_new(TYPE_APPLE_AES)); + sysbus_mmio_map(aes, 0, vms->memmap[VMAPPLE_AES_1].base); + sysbus_mmio_map(aes, 1, vms->memmap[VMAPPLE_AES_2].base); + sysbus_connect_irq(aes, 0, qdev_get_gpio_in(vms->gic, irq)); + sysbus_realize_and_unref(aes, &error_fatal); +} + +static int arm_gic_ppi_index(int cpu_nr, int ppi_index) +{ + return NUM_IRQS + cpu_nr * GIC_INTERNAL + ppi_index; +} + +static void create_gic(VMAppleMachineState *vms, MemoryRegion *mem) +{ + MachineState *ms =3D MACHINE(vms); + /* We create a standalone GIC */ + SysBusDevice *gicbusdev; + QList *redist_region_count; + int i; + unsigned int smp_cpus =3D ms->smp.cpus; + + vms->gic =3D qdev_new(gicv3_class_name()); + qdev_prop_set_uint32(vms->gic, "revision", 3); + qdev_prop_set_uint32(vms->gic, "num-cpu", smp_cpus); + /* + * Note that the num-irq property counts both internal and external + * interrupts; there are always 32 of the former (mandated by GIC spec= ). + */ + qdev_prop_set_uint32(vms->gic, "num-irq", NUM_IRQS + 32); + + uint32_t redist0_capacity =3D + vms->memmap[VMAPPLE_GIC_REDIST].size / GICV3_REDIST_SIZE; + uint32_t redist0_count =3D MIN(smp_cpus, redist0_capacity); + + redist_region_count =3D qlist_new(); + qlist_append_int(redist_region_count, redist0_count); + qdev_prop_set_array(vms->gic, "redist-region-count", redist_region_cou= nt); + + gicbusdev =3D SYS_BUS_DEVICE(vms->gic); + sysbus_realize_and_unref(gicbusdev, &error_fatal); + sysbus_mmio_map(gicbusdev, 0, vms->memmap[VMAPPLE_GIC_DIST].base); + sysbus_mmio_map(gicbusdev, 1, vms->memmap[VMAPPLE_GIC_REDIST].base); + + /* + * Wire the outputs from each CPU's generic timer and the GICv3 + * maintenance interrupt signal to the appropriate GIC PPI inputs, + * and the GIC's IRQ/FIQ/VIRQ/VFIQ interrupt outputs to the CPU's inpu= ts. + */ + for (i =3D 0; i < smp_cpus; i++) { + DeviceState *cpudev =3D DEVICE(qemu_get_cpu(i)); + + /* Map the virt timer to PPI 27 */ + qdev_connect_gpio_out(cpudev, GTIMER_VIRT, + qdev_get_gpio_in(vms->gic, + arm_gic_ppi_index(i, 27))); + + /* Map the GIC IRQ and FIQ lines to CPU */ + sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_= IRQ)); + sysbus_connect_irq(gicbusdev, i + smp_cpus, + qdev_get_gpio_in(cpudev, ARM_CPU_FIQ)); + } +} + +static void create_uart(const VMAppleMachineState *vms, int uart, + MemoryRegion *mem, Chardev *chr) +{ + hwaddr base =3D vms->memmap[uart].base; + int irq =3D vms->irqmap[uart]; + DeviceState *dev =3D qdev_new(TYPE_PL011); + SysBusDevice *s =3D SYS_BUS_DEVICE(dev); + + qdev_prop_set_chr(dev, "chardev", chr); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + memory_region_add_subregion(mem, base, + sysbus_mmio_get_region(s, 0)); + sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq)); +} + +static void create_rtc(const VMAppleMachineState *vms) +{ + hwaddr base =3D vms->memmap[VMAPPLE_RTC].base; + int irq =3D vms->irqmap[VMAPPLE_RTC]; + + sysbus_create_simple("pl031", base, qdev_get_gpio_in(vms->gic, irq)); +} + +static DeviceState *gpio_key_dev; +static void vmapple_powerdown_req(Notifier *n, void *opaque) +{ + /* use gpio Pin 3 for power button event */ + qemu_set_irq(qdev_get_gpio_in(gpio_key_dev, 0), 1); +} + +static void create_gpio_devices(const VMAppleMachineState *vms, int gpio, + MemoryRegion *mem) +{ + DeviceState *pl061_dev; + hwaddr base =3D vms->memmap[gpio].base; + int irq =3D vms->irqmap[gpio]; + SysBusDevice *s; + + pl061_dev =3D qdev_new("pl061"); + /* Pull lines down to 0 if not driven by the PL061 */ + qdev_prop_set_uint32(pl061_dev, "pullups", 0); + qdev_prop_set_uint32(pl061_dev, "pulldowns", 0xff); + s =3D SYS_BUS_DEVICE(pl061_dev); + sysbus_realize_and_unref(s, &error_fatal); + memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0)); + sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq)); + gpio_key_dev =3D sysbus_create_simple("gpio-key", -1, + qdev_get_gpio_in(pl061_dev, 3)); +} + +static void vmapple_firmware_init(VMAppleMachineState *vms, + MemoryRegion *sysmem) +{ + hwaddr size =3D vms->memmap[VMAPPLE_FIRMWARE].size; + hwaddr base =3D vms->memmap[VMAPPLE_FIRMWARE].base; + const char *bios_name; + int image_size; + char *fname; + + bios_name =3D MACHINE(vms)->firmware; + if (!bios_name) { + error_report("No firmware specified"); + exit(1); + } + + fname =3D qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); + if (!fname) { + error_report("Could not find ROM image '%s'", bios_name); + exit(1); + } + + memory_region_init_ram(&vms->fw_mr, NULL, "firmware", size, &error_fat= al); + image_size =3D load_image_mr(fname, &vms->fw_mr); + + g_free(fname); + if (image_size < 0) { + error_report("Could not load ROM image '%s'", bios_name); + exit(1); + } + + memory_region_add_subregion(get_system_memory(), base, &vms->fw_mr); +} + +static void create_pcie(VMAppleMachineState *vms) +{ + hwaddr base_mmio =3D vms->memmap[VMAPPLE_PCIE_MMIO].base; + hwaddr size_mmio =3D vms->memmap[VMAPPLE_PCIE_MMIO].size; + hwaddr base_ecam =3D vms->memmap[VMAPPLE_PCIE_ECAM].base; + hwaddr size_ecam =3D vms->memmap[VMAPPLE_PCIE_ECAM].size; + int irq =3D vms->irqmap[VMAPPLE_PCIE]; + MemoryRegion *mmio_alias; + MemoryRegion *mmio_reg; + MemoryRegion *ecam_reg; + DeviceState *dev; + int i; + PCIHostState *pci; + DeviceState *usb_controller; + USBBus *usb_bus; + + dev =3D qdev_new(TYPE_GPEX_HOST); + qdev_prop_set_uint32(dev, "num-irqs", GPEX_NUM_IRQS); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + + /* Map only the first size_ecam bytes of ECAM space */ + ecam_reg =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); + memory_region_init_alias(&vms->ecam_alias, OBJECT(dev), "pcie-ecam", + ecam_reg, 0, size_ecam); + memory_region_add_subregion(get_system_memory(), base_ecam, + &vms->ecam_alias); + + /* + * Map the MMIO window from [0x50000000-0x7fff0000] in PCI space into + * system address space at [0x50000000-0x7fff0000]. + */ + mmio_alias =3D g_new0(MemoryRegion, 1); + mmio_reg =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1); + memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio", + mmio_reg, base_mmio, size_mmio); + memory_region_add_subregion(get_system_memory(), base_mmio, mmio_alias= ); + + for (i =3D 0; i < GPEX_NUM_IRQS; i++) { + sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, + qdev_get_gpio_in(vms->gic, irq + i)); + gpex_set_irq_num(GPEX_HOST(dev), i, irq + i); + } + + pci =3D PCI_HOST_BRIDGE(dev); + vms->bus =3D pci->bus; + g_assert(vms->bus); + + while ((dev =3D qemu_create_nic_device("virtio-net-pci", true, NULL)))= { + qdev_realize_and_unref(dev, BUS(vms->bus), &error_fatal); + } + + if (defaults_enabled()) { + usb_controller =3D qdev_new(TYPE_QEMU_XHCI); + qdev_realize_and_unref(usb_controller, BUS(pci->bus), &error_fatal= ); + + usb_bus =3D USB_BUS(object_resolve_type_unambiguous(TYPE_USB_BUS, + &error_fatal)); + usb_create_simple(usb_bus, "usb-kbd"); + usb_create_simple(usb_bus, "usb-tablet"); + } +} + +static void vmapple_reset(void *opaque) +{ + VMAppleMachineState *vms =3D opaque; + hwaddr base =3D vms->memmap[VMAPPLE_FIRMWARE].base; + + cpu_set_pc(first_cpu, base); +} + +static void mach_vmapple_init(MachineState *machine) +{ + VMAppleMachineState *vms =3D VMAPPLE_MACHINE(machine); + MachineClass *mc =3D MACHINE_GET_CLASS(machine); + const CPUArchIdList *possible_cpus; + MemoryRegion *sysmem =3D get_system_memory(); + int n; + unsigned int smp_cpus =3D machine->smp.cpus; + unsigned int max_cpus =3D machine->smp.max_cpus; + + vms->memmap =3D memmap; + machine->usb =3D true; + + possible_cpus =3D mc->possible_cpu_arch_ids(machine); + assert(possible_cpus->len =3D=3D max_cpus); + for (n =3D 0; n < possible_cpus->len; n++) { + Object *cpu; + CPUState *cs; + + if (n >=3D smp_cpus) { + break; + } + + cpu =3D object_new(possible_cpus->cpus[n].type); + object_property_set_int(cpu, "mp-affinity", + possible_cpus->cpus[n].arch_id, &error_fat= al); + + cs =3D CPU(cpu); + cs->cpu_index =3D n; + + numa_cpu_pre_plug(&possible_cpus->cpus[cs->cpu_index], DEVICE(cpu), + &error_fatal); + + if (object_property_find(cpu, "has_el3")) { + object_property_set_bool(cpu, "has_el3", false, &error_fatal); + } + if (object_property_find(cpu, "has_el2")) { + object_property_set_bool(cpu, "has_el2", false, &error_fatal); + } + object_property_set_int(cpu, "psci-conduit", QEMU_PSCI_CONDUIT_HVC, + &error_fatal); + + /* Secondary CPUs start in PSCI powered-down state */ + if (n > 0) { + object_property_set_bool(cpu, "start-powered-off", true, + &error_fatal); + } + + object_property_set_link(cpu, "memory", OBJECT(sysmem), &error_abo= rt); + qdev_realize(DEVICE(cpu), NULL, &error_fatal); + object_unref(cpu); + } + + memory_region_add_subregion(sysmem, vms->memmap[VMAPPLE_MEM].base, + machine->ram); + + create_gic(vms, sysmem); + create_bdif(vms, sysmem); + create_pvpanic(vms, sysmem); + create_aes(vms, sysmem); + create_gfx(vms, sysmem); + create_uart(vms, VMAPPLE_UART, sysmem, serial_hd(0)); + create_rtc(vms); + create_pcie(vms); + + create_gpio_devices(vms, VMAPPLE_GPIO, sysmem); + + vmapple_firmware_init(vms, sysmem); + create_cfg(vms, sysmem, &error_fatal); + + /* connect powerdown request */ + vms->powerdown_notifier.notify =3D vmapple_powerdown_req; + qemu_register_powerdown_notifier(&vms->powerdown_notifier); + + vms->bootinfo.ram_size =3D machine->ram_size; + vms->bootinfo.board_id =3D -1; + vms->bootinfo.loader_start =3D vms->memmap[VMAPPLE_MEM].base; + vms->bootinfo.skip_dtb_autoload =3D true; + vms->bootinfo.firmware_loaded =3D true; + arm_load_kernel(ARM_CPU(first_cpu), machine, &vms->bootinfo); + + qemu_register_reset(vmapple_reset, vms); +} + +static CpuInstanceProperties +vmapple_cpu_index_to_props(MachineState *ms, unsigned cpu_index) +{ + MachineClass *mc =3D MACHINE_GET_CLASS(ms); + const CPUArchIdList *possible_cpus =3D mc->possible_cpu_arch_ids(ms); + + assert(cpu_index < possible_cpus->len); + return possible_cpus->cpus[cpu_index].props; +} + + +static int64_t vmapple_get_default_cpu_node_id(const MachineState *ms, int= idx) +{ + return idx % ms->numa_state->num_nodes; +} + +static const CPUArchIdList *vmapple_possible_cpu_arch_ids(MachineState *ms) +{ + int n; + unsigned int max_cpus =3D ms->smp.max_cpus; + + if (ms->possible_cpus) { + assert(ms->possible_cpus->len =3D=3D max_cpus); + return ms->possible_cpus; + } + + ms->possible_cpus =3D g_malloc0(sizeof(CPUArchIdList) + + sizeof(CPUArchId) * max_cpus); + ms->possible_cpus->len =3D max_cpus; + for (n =3D 0; n < ms->possible_cpus->len; n++) { + ms->possible_cpus->cpus[n].type =3D ms->cpu_type; + ms->possible_cpus->cpus[n].arch_id =3D + arm_build_mp_affinity(n, GICV3_TARGETLIST_BITS); + ms->possible_cpus->cpus[n].props.has_thread_id =3D true; + ms->possible_cpus->cpus[n].props.thread_id =3D n; + } + return ms->possible_cpus; +} + +static GlobalProperty vmapple_compat_defaults[] =3D { + { TYPE_VIRTIO_PCI, "disable-legacy", "on" }, + /* + * macOS XHCI driver attempts to schedule events onto even rings 1 & 2 + * even when (as here) there is no MSI(-X) support. Disabling interrup= ter + * mapping in the XHCI controller works around the problem. + */ + { TYPE_XHCI_PCI, "conditional-intr-mapping", "on" }, +}; + +static void vmapple_machine_class_init(ObjectClass *oc, void *data) +{ + MachineClass *mc =3D MACHINE_CLASS(oc); + + mc->init =3D mach_vmapple_init; + mc->max_cpus =3D 32; + mc->block_default_type =3D IF_VIRTIO; + mc->no_cdrom =3D 1; + mc->pci_allow_0_address =3D true; + mc->minimum_page_bits =3D 12; + mc->possible_cpu_arch_ids =3D vmapple_possible_cpu_arch_ids; + mc->cpu_index_to_instance_props =3D vmapple_cpu_index_to_props; + mc->default_cpu_type =3D ARM_CPU_TYPE_NAME("host"); + mc->get_default_cpu_node_id =3D vmapple_get_default_cpu_node_id; + mc->default_ram_id =3D "mach-vmapple.ram"; + mc->desc =3D "Apple aarch64 Virtual Machine"; + + compat_props_add(mc->compat_props, vmapple_compat_defaults, + G_N_ELEMENTS(vmapple_compat_defaults)); +} + +static void vmapple_instance_init(Object *obj) +{ + VMAppleMachineState *vms =3D VMAPPLE_MACHINE(obj); + + vms->irqmap =3D irqmap; + + object_property_add_uint64_ptr(obj, "uuid", &vms->uuid, + OBJ_PROP_FLAG_READWRITE); + object_property_set_description(obj, "uuid", "Machine UUID (SDOM)"); +} + +static const TypeInfo vmapple_machine_info =3D { + .name =3D TYPE_VMAPPLE_MACHINE, + .parent =3D TYPE_MACHINE, + .instance_size =3D sizeof(VMAppleMachineState), + .class_init =3D vmapple_machine_class_init, + .instance_init =3D vmapple_instance_init, +}; + +static void machvmapple_machine_init(void) +{ + type_register_static(&vmapple_machine_info); +} +type_init(machvmapple_machine_init); + diff --git a/contrib/vmapple/uuid.sh b/contrib/vmapple/uuid.sh new file mode 100755 index 00000000000..f5637221d23 --- /dev/null +++ b/contrib/vmapple/uuid.sh @@ -0,0 +1,12 @@ +#!/bin/sh +# +# Used for converting a guest provisioned using Virtualization.framework +# for use with the QEMU 'vmapple' aarch64 machine type. +# +# Extracts the Machine UUID from Virtualization.framework VM JSON file. +# (as produced by 'macosvm', passed as command line argument) +# +# SPDX-License-Identifier: GPL-2.0-or-later + +plutil -extract machineId raw "$1" | base64 -d | plutil -extract ECID raw - + diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig index 5586fd460b7..2382b297672 100644 --- a/hw/vmapple/Kconfig +++ b/hw/vmapple/Kconfig @@ -11,3 +11,24 @@ config VMAPPLE_CFG =20 config VMAPPLE_VIRTIO_BLK bool + +config VMAPPLE + bool + depends on ARM + depends on HVF + default y if ARM + imply PCI_DEVICES + select ARM_GICV3 + select PLATFORM_BUS + select PCI_EXPRESS + select PCI_EXPRESS_GENERIC_BRIDGE + select PL011 # UART + select PL031 # RTC + select PL061 # GPIO + select GPIO_PWR + select PVPANIC_MMIO + select VMAPPLE_AES + select VMAPPLE_BDIF + select VMAPPLE_CFG + select MAC_PVG_MMIO + select VMAPPLE_VIRTIO_BLK diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build index 3553ec61518..23bc4c999e3 100644 --- a/hw/vmapple/meson.build +++ b/hw/vmapple/meson.build @@ -4,3 +4,4 @@ system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('= aes.c')) system_ss.add(when: 'CONFIG_VMAPPLE_BDIF', if_true: files('bdif.c')) system_ss.add(when: 'CONFIG_VMAPPLE_CFG', if_true: files('cfg.c')) system_ss.add(when: 'CONFIG_VMAPPLE_VIRTIO_BLK', if_true: files('virtio-b= lk.c')) +specific_ss.add(when: 'CONFIG_VMAPPLE', if_true: files('vmapple.c')) --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Assert we are using KVM or TCG. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Harsh Prateek Bora Message-Id: <20250127102620.39159-3-philmd@linaro.org> --- hw/ppc/spapr_hcall.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index f8ab7670630..f987ff323f8 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -299,8 +299,10 @@ static target_ulong h_page_init(PowerPCCPU *cpu, Spapr= MachineState *spapr, if (flags & (H_ICACHE_SYNCHRONIZE | H_ICACHE_INVALIDATE)) { if (kvm_enabled()) { kvmppc_icbi_range(cpu, pdst, len); - } else { + } else if (tcg_enabled()) { tb_flush(CPU(cpu)); + } else { + g_assert_not_reached(); } } =20 --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741137866; cv=none; d=zohomail.com; s=zohoarc; b=IvJAsWoCOasOAEfv1afUc/5/i1JydrC0EFWvKI1L/fF+Y5iXpRHttvRuUEf2RFyINZI/tzGVEKkuTF2yACGmy7S7ImRJBVT8ug+PIrMWxNyRKFfRe2xzGLn3z0zJnt4yTnZrncA8CjlsrgmQMzLQBTeTXJDv0sPT3uaweDA/A6c= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741137866; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Q8ln23H4+MbGK4gitXxRZRuS6c4E+4FT/FZeDk/HlDc=; b=bne5sD79cNJpX7dA89gTZPgK+cLoIrS5AA9U2RBv8sckV9pdhFUuv6Uv3dDPwTyxJlf3h1oDierwI2HlAkJuVOGrcb68sUSWvn272aX+WYQ/4g6itGZOF0HvD21A/U6emWdqO+Q+FB/SpmWbKtM0YZZm81Hj/6mG+2gEF0pnYmE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741137866863937.0818553221417; Tue, 4 Mar 2025 17:24:26 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdU4-00018X-S9; Tue, 04 Mar 2025 20:23:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdTR-0008So-92 for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:03 -0500 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdTM-00070Z-6U for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:22:58 -0500 Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-43bc6a6aaf7so20956275e9.2 for ; Tue, 04 Mar 2025 17:22:55 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e47b7d69sm19684867f8f.60.2025.03.04.17.22.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:22:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137774; x=1741742574; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Q8ln23H4+MbGK4gitXxRZRuS6c4E+4FT/FZeDk/HlDc=; b=Y+zkgcrfbeG7skCZY0nx+sUcjCCZJ7+F3P0ymyYJo7ILHXnpjCw5vCultb9bAK1Hkj y2Qj+Y9LtSsNMNGHTuP9Aa4k/Y0t6hD/f/lOqej5KWuYA4Bo59DL1J3vn9rjGmIMpobx yRtF+Th0REM07PLKK7uhWygTrXN4smUQhXbYfSYofh/4ZDTm/OcaSDtZDhx/aNfrlEdh BzGeUJJXT4BAJef5ZBph6MdW8mDlVIjy088pmXaKBH0kz4oZH1EPakqelVYq0oombHeK yFG5ltH4UiGF0t+ND14AOMDeT1p4oXV2ljCXDBSqT2IV3K1XCkcbaFqj97s2FYhA1Tlm aTDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137774; x=1741742574; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Q8ln23H4+MbGK4gitXxRZRuS6c4E+4FT/FZeDk/HlDc=; b=djQd92hwE92YNhT+Td86wWNdoMM5e42lbKjiwYEW/v4LzjG9mrPttoCgavPANVC3A2 b5Z0nuBGr6sJhS6UxxMe971M+WO0VMLbTI/aoGQpGXtPOtHtBnLp5VduSNXn9S+v0W4j Rnx5NiHLwd4UmOnbZwy50eQBMRxv5tDby4m41j1rQB86DvaHiE9DCwxGsCV9cQz8BEi3 EFJ+64FAk5L0cqmClKBabyEmojdr/ejHkWp6trKKrlI+w+CLZWekfLRaIEt9r3BfLY17 ev5i10MNxYzdA1yGbxG3zact0y4Ab6qlV6o3Jtcnoc2eWTUT7C9hTCtan2tfqfupvZMC 3u/w== X-Gm-Message-State: AOJu0YyQfPqCFJSWBkHesTzGLAViP5lqy4nU9yC4/Onh7VeFYv95EoCn NMmNiluZdKSTF1vSjjnzbrRMcsfJP6tHiVBo8EAXvXg4QgzrYakrIf/hkFz+ctooFXdqIyW2pJI WzD0= X-Gm-Gg: ASbGnctZ+IuEcEI6ejLG6WT3+Y3AxrEaSIIemDzTiX24mzkf8w1OoDRI5uIf7P/EJeg TqDqnPnq8bnhUhuJ2Rz5XUMYZDPQm6VnY/KqjZXfkwCEKj1sBYFOa7Yt6GA26VjdXeOMGSYHdUw w6LqExwk70A1IQL2+m66Sm433VeVcyU5K+JnCLxeZ9SUzGPRljszzZrhXGWMn24Atg7ZaZFMMyS yFfBYPVP9jNSoNyfs4AwavjS5Vq0Du8F2qRkMrl1uTYNVWEGQDGEnnA1PAe5qYo81+hi+OJqfEM JcL7FKFExZVy9+f7wotmmvTfrY9Cu10FRO1fJ3ennsToof6WqS+4hxMwcRV6kDYuWKMvw0y6H4V IQZz1NwNVQcC5ef9UF8Q= X-Google-Smtp-Source: AGHT+IGNVgsFUAnqjOl7hWRGGaaKmlQaCZ0qeg74JejFtTHA9H1HeG6qAaTJrYWS+DZJpNoX9iJXaA== X-Received: by 2002:a5d:5f50:0:b0:390:f4c7:ea20 with SMTP id ffacd0b85a97d-3911f756fa6mr777720f8f.24.1741137774502; Tue, 04 Mar 2025 17:22:54 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Gavin Shan , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 11/41] hw/acpi/ghes: Make ghes_record_cper_errors() static Date: Wed, 5 Mar 2025 02:21:26 +0100 Message-ID: <20250305012157.96463-12-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741137868528019000 From: Gavin Shan acpi_ghes_memory_errors() is the only caller, no need to expose the function. Besides, the last 'return' in this function isn't necessary and remove it. No functional changes intended. Signed-off-by: Gavin Shan Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20250214041635.608012-2-gshan@redhat.com> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/acpi/ghes.h | 2 -- hw/acpi/ghes.c | 6 ++---- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/include/hw/acpi/ghes.h b/include/hw/acpi/ghes.h index 39619a2457c..578a582203c 100644 --- a/include/hw/acpi/ghes.h +++ b/include/hw/acpi/ghes.h @@ -75,8 +75,6 @@ void acpi_build_hest(GArray *table_data, GArray *hardware= _errors, void acpi_ghes_add_fw_cfg(AcpiGhesState *vms, FWCfgState *s, GArray *hardware_errors); int acpi_ghes_memory_errors(uint16_t source_id, uint64_t error_physical_ad= dr); -void ghes_record_cper_errors(const void *cper, size_t len, - uint16_t source_id, Error **errp); =20 /** * acpi_ghes_present: Report whether ACPI GHES table is present diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index b709c177cde..b85bb48195a 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -390,8 +390,8 @@ static void get_hw_error_offsets(uint64_t ghes_addr, *read_ack_register_addr =3D ghes_addr + sizeof(uint64_t); } =20 -void ghes_record_cper_errors(const void *cper, size_t len, - uint16_t source_id, Error **errp) +static void ghes_record_cper_errors(const void *cper, size_t len, + uint16_t source_id, Error **errp) { uint64_t cper_addr =3D 0, read_ack_register_addr =3D 0, read_ack_regis= ter; AcpiGedState *acpi_ged_state; @@ -440,8 +440,6 @@ void ghes_record_cper_errors(const void *cper, size_t l= en, =20 /* Write the generic error data entry into guest memory */ cpu_physical_memory_write(cper_addr, cper, len); - - return; } =20 int acpi_ghes_memory_errors(uint16_t source_id, uint64_t physical_address) --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741137869; cv=none; d=zohomail.com; s=zohoarc; b=V1wTDG+9Ks3i1IO4m/pIbm9eHFOSJV2X119j5tbaZ/JSYuTJAm2FQQ9aIb0cdq1L2+zO+lBufCnR7blZ2yKJDVxLAO1pscHaxWIBOlCC0/EZnVrc6Rko2XM1nMumy4zRHsYteiOT0QqWNBvexs9ZEy4Firc8laaz2xvoXixXSVk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741137869; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=DXmZv1/YGvLlH9tVUnIp5UMqICtZ1kO2g7onsOxZU/A=; b=mptoP2FzFRXVTo+PEGSma54UlnX4xHHd/kqsq+GEF16h9fmaIn9ssXdzyprujJHxhZhJOoBLP37aysTnaJIihkQIEas5noJ0PfiyMiufNXa716UUp+X3qLIg8fZO0NfSesozhgvTwxRcmjSKZCvmC3GKp1GnUP0zvQUn05iFpZo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741137869651737.2699668873651; Tue, 4 Mar 2025 17:24:29 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdUC-0001ib-Ew; Tue, 04 Mar 2025 20:23:48 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdTV-00006O-6U for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:09 -0500 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdTR-000712-24 for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:04 -0500 Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-4394a0c65fcso66891085e9.1 for ; Tue, 04 Mar 2025 17:23:00 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Iglesias" Subject: [PULL 12/41] hw/arm: Do not expose the virt machine on Xen-only binary Date: Wed, 5 Mar 2025 02:21:27 +0100 Message-ID: <20250305012157.96463-13-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741137871242019000 Since the Virt machine is useless under Xen, do not even try to build it there. A Xen-only binary now only offers the XenPVH machine: $ qemu-system-aarch64 -M help Supported machines are: none empty machine xenpvh Xen PVH ARM machine Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Edgar E. Iglesias Message-Id: <20250218162618.46167-3-philmd@linaro.org> --- hw/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index faa00d1db3b..15200a2d7e7 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -2,6 +2,7 @@ config ARM_VIRT bool default y depends on ARM + depends on TCG || KVM || HVF imply PCI_DEVICES imply TEST_DEVICES imply VFIO_AMD_XGBE --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741137912; cv=none; d=zohomail.com; s=zohoarc; b=emh+s+GpfQnLpBGlJ1dg+NNMkDuyNm8Vun2F1fxn/ZB6RpkB9/7k74kPl0imS4gyqCYzlyKMLuyk9mxYvWYwa9qSdpvm91ErVk2L+bdEEfMSH1S4Kv3/U63plcMjMSMzVhbYIWX7iDdFq6CYAdsnHRAvu7lrWJrHfvhTdvkOjRY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741137912; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=z1HY9sBjuk9kbpZKm7s52igZtwUaZd0dmJ6wZJ2aD0c=; b=Y4K9WrATQpzS4JcINtJWEyuC0wluX8bdcYoiFPXzJk5BKlxQ/+PXlit46UU/6iAdxcc2H3MG+jBc8QmhiifKXhsFQsHbM4ki4P4ES/3lKVsU12ogOUH0CfQCsuPKoZciEn4HfAyqOkeyouitdFZ4EM5wrTHB+BcMXeXQke6h6Wk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741137912162348.80509358619236; Tue, 4 Mar 2025 17:25:12 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdUG-0001wB-66; Tue, 04 Mar 2025 20:23:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdTZ-0000BC-6c for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:11 -0500 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdTV-00071e-6M for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:07 -0500 Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-43948f77f1aso40736085e9.0 for ; Tue, 04 Mar 2025 17:23:04 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Iglesias" Subject: [PULL 13/41] hw/xen: Link XenPVH with GPEX PCIe bridge Date: Wed, 5 Mar 2025 02:21:28 +0100 Message-ID: <20250305012157.96463-14-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741137912805019000 XenPVH requires the PCIe/GPEX device. Add it to Kconfig to avoid when configuring using --without-default-devices: /usr/bin/ld: libqemu-aarch64-softmmu.a.p/hw_xen_xen-pvh-common.c.o: in fu= nction `xenpvh_gpex_init': hw/xen/xen-pvh-common.c:174: undefined reference to `gpex_set_irq_num' /usr/bin/ld: libqemu-aarch64-softmmu.a.p/hw_xen_xen-hvm-common.c.o: in fu= nction `pci_dev_bus_num': include/hw/pci/pci.h:337: undefined reference to `pci_bus_num' /usr/bin/ld: include/hw/pci/pci.h:337: undefined reference to `pci_bus_nu= m' /usr/bin/ld: include/hw/pci/pci.h:337: undefined reference to `pci_bus_nu= m' /usr/bin/ld: include/hw/pci/pci.h:337: undefined reference to `pci_bus_nu= m' /usr/bin/ld: include/hw/pci/pci.h:337: undefined reference to `pci_bus_nu= m' /usr/bin/ld: libqemu-aarch64-softmmu.a.p/hw_xen_xen-hvm-common.c.o: in fu= nction `cpu_ioreq_config': hw/xen/xen-hvm-common.c:412: undefined reference to `pci_host_config_read= _common' /usr/bin/ld: hw/xen/xen-hvm-common.c:428: undefined reference to `pci_hos= t_config_read_common' /usr/bin/ld: hw/xen/xen-hvm-common.c:438: undefined reference to `pci_hos= t_config_write_common' Fixes: f22e598a72c ("hw/xen: pvh-common: Add support for creating PCIe/GPEX= ") Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Edgar E. Iglesias Message-Id: <20250218162618.46167-2-philmd@linaro.org> --- accel/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/accel/Kconfig b/accel/Kconfig index 794e0d18d21..4263cab7227 100644 --- a/accel/Kconfig +++ b/accel/Kconfig @@ -16,4 +16,5 @@ config KVM config XEN bool select FSDEV_9P if VIRTFS + select PCI_EXPRESS_GENERIC_BRIDGE select XEN_BUS --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138257; cv=none; d=zohomail.com; s=zohoarc; b=nx0kV5r47kqp+e4rGfJR9gPoMaHq/rWDrJVmJe0aGBrMNm+6Si0gES6mgKs19EeEsyA+cV14M3uFbm13J0TpLKwyYit2ECTvTeHdji/UlHbQy/BcW2OnPNcv/l8K36gG5i5M96k1Sw941U2gNkxl01qgPLUmYSXp5TDdIbR3Yg4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138257; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=aeQ4l2OYCtamyJNS0OGrQ+B6RH9yuhSbCm/kTfeIjFw=; b=FlBP6aX1IHy2DDikNPG4qXnUleDQZEsXNKSGQ9m8B0PFzmeM/XVFtxbtovd57DfJwhCfgxAyiAsGAQubk2agRJ5H5+2Cou76LRPRCf3ZemvI/zcYPMfWZD27/UmYHWp5ftNgeRDpF0llKhPMcoyZaY+3u4sSlhnSi/vmlVAF0Sg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138257308893.254697385046; Tue, 4 Mar 2025 17:30:57 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdUj-0002fO-63; Tue, 04 Mar 2025 20:24:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdTb-0000Cw-K5 for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:14 -0500 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdTZ-00072K-R2 for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:11 -0500 Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-43bc0b8520cso18283125e9.1 for ; Tue, 04 Mar 2025 17:23:09 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Iglesias" Subject: [PULL 14/41] hw/xen/xen-pvh: Reduce included headers Date: Wed, 5 Mar 2025 02:21:29 +0100 Message-ID: <20250305012157.96463-15-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741138259893019100 Have "hw/xen/xen-pvh-common.h" include the bare minimal set of headers. Adapt sources to avoid errors when refactoring unrelated headers such: hw/i386/xen/xen-pvh.c: In function =E2=80=98xen_pvh_machine_class_init= =E2=80=99: hw/i386/xen/xen-pvh.c:84:28: error: =E2=80=98TARGET_DEFAULT_CPU_TYPE=E2= =80=99 undeclared (first use in this function) 84 | mc->default_cpu_type =3D TARGET_DEFAULT_CPU_TYPE; | ^~~~~~~~~~~~~~~~~~~~~~~ hw/xen/xen-pvh-common.c: In function =E2=80=98xen_pvh_init=E2=80=99: hw/xen/xen-pvh-common.c:217:43: error: =E2=80=98MiB=E2=80=99 undeclared= (first use in this function) 217 | if (s->cfg.pci_ecam.size !=3D 256 * MiB) { | ^~~ hw/xen/xen-hvm-common.c:18:6: error: no previous prototype for =E2=80= =98xen_mr_is_memory=E2=80=99 [-Werror=3Dmissing-prototypes] 18 | bool xen_mr_is_memory(MemoryRegion *mr) | ^~~~~~~~~~~~~~~~ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Edgar E. Iglesias Message-Id: <20250218162618.46167-5-philmd@linaro.org> --- include/hw/xen/xen-pvh-common.h | 8 ++++---- hw/i386/xen/xen-pvh.c | 1 + hw/xen/xen-pvh-common.c | 5 ++--- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/include/hw/xen/xen-pvh-common.h b/include/hw/xen/xen-pvh-commo= n.h index 5cdd23c2f4d..17c5a58a5a4 100644 --- a/include/hw/xen/xen-pvh-common.h +++ b/include/hw/xen/xen-pvh-common.h @@ -9,11 +9,11 @@ #ifndef XEN_PVH_COMMON_H__ #define XEN_PVH_COMMON_H__ =20 -#include -#include "hw/sysbus.h" -#include "hw/hw.h" -#include "hw/xen/xen-hvm-common.h" +#include "exec/memory.h" +#include "qom/object.h" +#include "hw/boards.h" #include "hw/pci-host/gpex.h" +#include "hw/xen/xen-hvm-common.h" =20 #define TYPE_XEN_PVH_MACHINE MACHINE_TYPE_NAME("xen-pvh-base") OBJECT_DECLARE_TYPE(XenPVHMachineState, XenPVHMachineClass, diff --git a/hw/i386/xen/xen-pvh.c b/hw/i386/xen/xen-pvh.c index 33c10279763..f6356f2a7ed 100644 --- a/hw/i386/xen/xen-pvh.c +++ b/hw/i386/xen/xen-pvh.c @@ -14,6 +14,7 @@ #include "hw/xen/arch_hvm.h" #include #include "hw/xen/xen-pvh-common.h" +#include "target/i386/cpu.h" =20 #define TYPE_XEN_PVH_X86 MACHINE_TYPE_NAME("xenpvh") OBJECT_DECLARE_SIMPLE_TYPE(XenPVHx86State, XEN_PVH_X86) diff --git a/hw/xen/xen-pvh-common.c b/hw/xen/xen-pvh-common.c index 9c21fa858d3..d675f7a8aeb 100644 --- a/hw/xen/xen-pvh-common.c +++ b/hw/xen/xen-pvh-common.c @@ -8,14 +8,13 @@ =20 #include "qemu/osdep.h" #include "qemu/error-report.h" -#include "qapi/error.h" +#include "qemu/units.h" #include "qapi/visitor.h" #include "hw/boards.h" #include "hw/irq.h" -#include "hw/sysbus.h" -#include "system/system.h" #include "system/tpm.h" #include "system/tpm_backend.h" +#include "system/runstate.h" #include "hw/xen/xen-pvh-common.h" #include "trace.h" =20 --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741137991; cv=none; d=zohomail.com; s=zohoarc; b=VI9pJ0zAb7CtoSRxVYRENycIJFKfmacJerKGHZ+x4T6kci3Ue92Ui+1uXH7I7THH95tXoB4rd3H3oeF/8UVF7v+9Gp0x2RTcYxpfH9+MWPOG1RySZ1TrfRicV4o05mFDaW3us27xRpYspA5qy+g6nJYuSzfLErP9rbO1js0kudE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741137991; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=q2IHjjPDhAlThC5AYDDLcqpca6XJWi3ImZ01k6AVQ1k=; b=ev6ZSVg53yJE2pQHo1Cvlp+A8TL3IlN62WnxfrcAoCSW7wRzTWLqdGkJLiMqV3/q0Z2sVm9jTYNndDURf+LMDFjAOGedfYR35HjGvPRPQITZ07XuojeWQ2OTykr93eGKs03IJ0LKirr3eX9tHkObDdVgfX/MWfewbrBtokMiqaM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741137991878530.7257659619443; Tue, 4 Mar 2025 17:26:31 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdUO-00025k-FY; Tue, 04 Mar 2025 20:24:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdTg-0000MS-TV for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:18 -0500 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdTe-00073A-G1 for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:16 -0500 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-38f406e9f80so4730969f8f.2 for ; Tue, 04 Mar 2025 17:23:13 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Adapt sources to avoid errors when refactoring unrelated headers such: include/hw/xen/xen-hvm-common.h:71:5: error: unknown type name =E2=80=98x= enevtchn_handle=E2=80=99 71 | xenevtchn_handle *xce_handle; | ^~~~~~~~~~~~~~~~ hw/xen/xen-hvm-common.c: In function =E2=80=98cpu_get_ioreq=E2=80=99: hw/xen/xen-hvm-common.c:227:13: error: implicit declaration of function = =E2=80=98hw_error=E2=80=99 227 | hw_error("Fatal error while trying to get io event!\n= "); | ^~~~~~~~ | herror hw/xen/xen-hvm-common.c: In function =E2=80=98handle_ioreq=E2=80=99: hw/xen/xen-hvm-common.c:446:34: error: =E2=80=98target_ulong=E2=80=99 und= eclared (first use in this function) 446 | (req->size < sizeof (target_ulong))) { | ^~~~~~~~~~~~ hw/i386/xen/xen-hvm.c: In function =E2=80=98xen_add_to_physmap=E2=80=99: hw/i386/xen/xen-hvm.c:298:22: error: implicit declaration of function =E2= =80=98xen_replace_cache_entry=E2=80=99 298 | uint8_t *p =3D xen_replace_cache_entry(phys_offset, start= _addr, size); | ^~~~~~~~~~~~~~~~~~~~~~~ hw/i386/xen/xen-hvm.c:314:9: error: implicit declaration of function 'err= or_report' is invalid in C99 314 | error_report("relocate_memory %lu pages from GFN %"HWADDR_PRIx ^~~~~~~~~~~~ hw/i386/xen/xen-hvm.c: In function =E2=80=98xen_log_global_start=E2=80=99: hw/i386/xen/xen-hvm.c:465:9: error: implicit declaration of function =E2= =80=98xen_enabled=E2=80=99 465 | if (xen_enabled()) { | ^~~~~~~~~~~ hw/i386/xen/xen-hvm.c: In function =E2=80=98regs_to_cpu=E2=80=99: hw/i386/xen/xen-hvm.c:487:5: error: unknown type name =E2=80=98X86CPU=E2= =80=99 487 | X86CPU *cpu; | ^~~~~~ hw/i386/xen/xen-hvm.c:492:15: error: =E2=80=98R_EAX=E2=80=99 undeclared (= first use in this function) 492 | env->regs[R_EAX] =3D req->data; | ^~~~~ | REG_RAX Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Anthony PERARD Message-Id: <20250218162618.46167-6-philmd@linaro.org> --- include/hw/xen/xen-hvm-common.h | 14 +++----------- hw/arm/xen-stubs.c | 5 ++--- hw/i386/xen/xen-hvm.c | 6 ++++++ hw/xen/xen-hvm-common.c | 7 +++++++ 4 files changed, 18 insertions(+), 14 deletions(-) diff --git a/include/hw/xen/xen-hvm-common.h b/include/hw/xen/xen-hvm-commo= n.h index c1ea2c0d787..19df5600a39 100644 --- a/include/hw/xen/xen-hvm-common.h +++ b/include/hw/xen/xen-hvm-common.h @@ -1,18 +1,10 @@ #ifndef HW_XEN_HVM_COMMON_H #define HW_XEN_HVM_COMMON_H =20 -#include "qemu/units.h" - -#include "cpu.h" -#include "hw/pci/pci.h" -#include "hw/hw.h" +#include "qemu/queue.h" +#include "exec/hwaddr.h" #include "hw/xen/xen_native.h" -#include "hw/xen/xen-legacy-backend.h" -#include "system/runstate.h" -#include "system/system.h" -#include "system/xen.h" -#include "system/xen-mapcache.h" -#include "qemu/error-report.h" +#include "hw/xen/xen_backend_ops.h" #include =20 extern MemoryRegion xen_memory; diff --git a/hw/arm/xen-stubs.c b/hw/arm/xen-stubs.c index 34beb8b08cb..5551584dc20 100644 --- a/hw/arm/xen-stubs.c +++ b/hw/arm/xen-stubs.c @@ -5,10 +5,9 @@ */ =20 #include "qemu/osdep.h" -#include "qemu/error-report.h" #include "qapi/qapi-commands-migration.h" -#include "hw/boards.h" -#include "system/system.h" +#include "system/xen.h" +#include "hw/hw.h" #include "hw/xen/xen-hvm-common.h" #include "hw/xen/arch_hvm.h" =20 diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c index d3df488c483..d4516acec69 100644 --- a/hw/i386/xen/xen-hvm.c +++ b/hw/i386/xen/xen-hvm.c @@ -10,10 +10,12 @@ =20 #include "qemu/osdep.h" #include "qemu/units.h" +#include "qemu/error-report.h" #include "qapi/error.h" #include "qapi/qapi-commands-migration.h" #include "trace.h" =20 +#include "hw/hw.h" #include "hw/i386/pc.h" #include "hw/irq.h" #include "hw/i386/apic-msidef.h" @@ -24,6 +26,10 @@ #include "hw/xen/arch_hvm.h" #include #include "exec/target_page.h" +#include "target/i386/cpu.h" +#include "system/runstate.h" +#include "system/xen-mapcache.h" +#include "system/xen.h" =20 static MemoryRegion ram_640k, ram_lo, ram_hi; static MemoryRegion *framebuffer; diff --git a/hw/xen/xen-hvm-common.c b/hw/xen/xen-hvm-common.c index 7ffbbfea23b..9a677e8ed74 100644 --- a/hw/xen/xen-hvm-common.c +++ b/hw/xen/xen-hvm-common.c @@ -1,14 +1,21 @@ #include "qemu/osdep.h" #include "qemu/units.h" +#include "qemu/error-report.h" #include "qapi/error.h" +#include "exec/target_long.h" #include "exec/target_page.h" #include "trace.h" =20 +#include "hw/hw.h" #include "hw/pci/pci_host.h" #include "hw/xen/xen-hvm-common.h" #include "hw/xen/xen-bus.h" #include "hw/boards.h" #include "hw/xen/arch_hvm.h" +#include "system/runstate.h" +#include "system/system.h" +#include "system/xen.h" +#include "system/xen-mapcache.h" =20 MemoryRegion xen_memory, xen_grants; =20 --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Anthony PERARD Message-Id: <20250218162618.46167-7-philmd@linaro.org> --- include/hw/xen/xen-bus.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/hw/xen/xen-bus.h b/include/hw/xen/xen-bus.h index 2adb2af8391..bdbf1ed6fd0 100644 --- a/include/hw/xen/xen-bus.h +++ b/include/hw/xen/xen-bus.h @@ -8,9 +8,10 @@ #ifndef HW_XEN_BUS_H #define HW_XEN_BUS_H =20 +#include "hw/qdev-core.h" #include "hw/xen/xen_backend_ops.h" -#include "hw/sysbus.h" #include "qemu/notify.h" +#include "qemu/queue.h" #include "qom/object.h" =20 typedef struct XenEventChannel XenEventChannel; --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741137913; cv=none; d=zohomail.com; s=zohoarc; b=UI3xpXl8cJpW4EY9tJRMUi3jG6GCQTu1vCaSBqIipPsvpv0t6MnsLSaM4fCNoBVgkKoQ+k70Md0E1OjcJLgS2CqEOO6OAxuf6yL3tsQ8zwQgix0nOEf9PwiQX/eqYK/yl91hPREnY8LfVD32Czw4AZal60mHXmUcRLKqDNPUpOQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741137913; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=/QUbgFdH+LpUBvr3jWV7pVNPKK1k5LRXJFBmyMiAPQM=; b=BLuOuLASbGRGLO0n1e6OuCT5uchu+P7vQOfeCPJn02t9RGGh0FrCD1QvHvCSrTfhyM+UkOQCaI2B1TILN6d0gsmKrLC1+WxLTN6qC+vwA6vXD25KH3qyT5vkN0lBwsiKyzN4o1KAQ2hFuxaN2tuuN6W23kRMj0w2HYekDY48NzQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741137913568347.7198263694196; Tue, 4 Mar 2025 17:25:13 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdUu-0003BE-7a; Tue, 04 Mar 2025 20:24:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdTq-0000hB-8P for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:26 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdTn-00074U-R0 for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:25 -0500 Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-390effd3e85so4770627f8f.0 for ; Tue, 04 Mar 2025 17:23:23 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Tue, 04 Mar 2025 17:23:22 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Anthony PERARD Subject: [PULL 17/41] hw/xen/xen-legacy-backend: Remove unused 'net/net.h' header Date: Wed, 5 Mar 2025 02:21:32 +0100 Message-ID: <20250305012157.96463-18-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741137915486019000 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Anthony PERARD Message-Id: <20250218162618.46167-8-philmd@linaro.org> --- include/hw/xen/xen-legacy-backend.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/hw/xen/xen-legacy-backend.h b/include/hw/xen/xen-legac= y-backend.h index e198b120c5d..2d0cbfecade 100644 --- a/include/hw/xen/xen-legacy-backend.h +++ b/include/hw/xen/xen-legacy-backend.h @@ -3,7 +3,6 @@ =20 #include "hw/xen/xen_backend_ops.h" #include "hw/xen/xen_pvdev.h" -#include "net/net.h" #include "qom/object.h" =20 #define TYPE_XENSYSDEV "xen-sysdev" --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43bd426c01bsm2058145e9.2.2025.03.04.17.23.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:23:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137807; x=1741742607; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9zYIkt9GKGIYdkcKWEhjNfLJXtEaeim06qAhvggPTOw=; b=MEBVe2ZV2f2gZbAVC+RZBjJGmSh/7ixmfUkjzrECeHDDwxXhYeJRsrrhIwOWGAdvId imi58FtR7XUvujqMVb9YVIVoSSwdNIZ+OAePqsdF+q3spENY8Lef64qIrKH/tQY6BKtU ECb4Xfv8oc7sYY41pAllzeEgpwPfAL/XVZgeoIYx/pXBTyN5Mq2kV5FvFYNi1qZWxMOu j6jaQHqAIuz6bhjjY7hLNwnvXXDX+tI2DIqBKguDeOurvYPZuSIfS/UOb5mJ/zZtJ4MN H4USQTU/VfTgdrOzhtmiRs7gT418Gj9dAAZfYOA+gDdzQU7f38E58Uj3nACC1z1HT1mS MReg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137807; x=1741742607; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9zYIkt9GKGIYdkcKWEhjNfLJXtEaeim06qAhvggPTOw=; b=wm0qoOV8sbXyz7PKSuaDyUj5LC/hMay+N67/pTCvM03vszrtmrxA8UL8Yc3zyIEaaV 1sFiUB3b1mXgjyJq0/2TIiFmDHqwRtH3h2OVfi6vX1qARY9anmr65sBzdRFy1tOf7pyG WouxLUiWJQ7t0arQkWTXrWvr+LSJIN3JWrf6vWSyKIaPWG6wcSupovti9Ug/qYS6ouyt S1mAwNagDhvFJHRgdPiSoqVw4k9td0mxCfAMl+zQDDkgVfg52ioPcQrxuieI08hYnvo8 9EAATRpavAe3Lpz6EV9scgYvfQCLZdgucA/4U8YdbOhTJ2ZvZjnXR1jO1pG9mRHiaKlq Gctg== X-Gm-Message-State: AOJu0YweN1f18PMjKAg6kDchU90Xlvs4A+gl8UeRv4uQv4zbjfxCwpwM yFLSCPxHVeA/TA4OW3igkr8zqxNhQBMVB1o4lJNF6xEEWH/MG+ircxEuTq5ombgvdUu6OIPO8Oy SaGY= X-Gm-Gg: ASbGnct6Jea7lTRIR98MwIj0N+BsIjNl/CC6Igd1ukHXlzxDIQ/dOzwW14SVH/XJs7E Jo69vt1BbSi1WiH8hoGJrFq7selytDVi8/CNnWRmGaaRM/k9zotnDVREBKBw4JnZxaPmD9o53Xw ze9p/khDg8nhTAV6SfCmBIjlwPm6yTSs/bJNfa3OCJf4S+4430NynibUW6NSpexHSyzmd0EwOBc NYTioLRLTlWH8LxHqp+GYqks2bqYYVt24zUlXlwz5FVyjo/rYAkGYp+2aBquBElt4X7ZuBavx4j asFwrI3/bCd1KyDMg8UlhebROhj+Y+rEp5oHDVA/kirEHBr7PqqMqcg0WkWrgUfIg2KSB1NjCfi RoSnOYHPm5KGm8qr7cYM= X-Google-Smtp-Source: AGHT+IHtA/bag7Tdz6sdGvjgZ7CrhAe1pi8OSdo8brr0CZx2FAnemKS7xQOTu2zUSNdl6rekkLaacw== X-Received: by 2002:a05:600c:4ece:b0:43b:c94d:e1e2 with SMTP id 5b1f17b1804b1-43bd2ae54bcmr5223275e9.25.1741137807422; Tue, 04 Mar 2025 17:23:27 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: BALATON Zoltan , Bernhard Beschow , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 18/41] hw/net/fsl_etsec: Set eTSEC device description and category Date: Wed, 5 Mar 2025 02:21:33 +0100 Message-ID: <20250305012157.96463-19-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741137879463019000 From: BALATON Zoltan Add description and set category for eTSEC device so it shows up better in -device help. Signed-off-by: BALATON Zoltan Reviewed-by: Bernhard Beschow Message-ID: <20250218155407.838774E600E@zero.eik.bme.hu> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/net/fsl_etsec/etsec.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/net/fsl_etsec/etsec.c b/hw/net/fsl_etsec/etsec.c index 3ce4fa2662d..adde6448926 100644 --- a/hw/net/fsl_etsec/etsec.c +++ b/hw/net/fsl_etsec/etsec.c @@ -423,8 +423,10 @@ static void etsec_class_init(ObjectClass *klass, void = *data) DeviceClass *dc =3D DEVICE_CLASS(klass); =20 dc->realize =3D etsec_realize; + dc->desc =3D "Freescale Enhanced Three-Speed Ethernet Controller"; device_class_set_legacy_reset(dc, etsec_reset); device_class_set_props(dc, etsec_properties); + set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); } =20 static const TypeInfo etsec_types[] =3D { --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741137995; cv=none; d=zohomail.com; s=zohoarc; b=R5WQm8MF7UzDrGe/GX+CtA8KdtZOktQzEvgvZilFLKf4VGDIdozAB0E6u15RB4o+hsAmdVovsre3PRCcaayQJbiyJUFqXjxqMESX3ncg4o7a4dJpE/8Zo3kQ/tYvPIKCIrCr9GaG/BIYvqgmni9fV8XdoN6PIPjlizO4LZGypJI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741137995; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=YXL5B5zw3pZta0/9DCa7fbyWVn6oj5wqXc+Tu2wdyGc=; b=QzdLzqUhVoVcfOGcT+IhKRStSzKq1GHFWX3IWj9oTc0n3T5PmVCZici1Kzi0Omd2KXxbjzv5BmeY3Bg6Bkc6/4Bl/PWtsT2eRIBBEW+uGF0bATkrlzmHiGBgzdRBvaGWkXd1bF6KMXCYH1WIXRnBT+uMkTko56ffzICATYFQPHU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741137995048199.5392373747777; Tue, 4 Mar 2025 17:26:35 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdUr-00037j-Vo; Tue, 04 Mar 2025 20:24:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdU0-00017G-L8 for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:36 -0500 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdTy-00076h-TB for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:36 -0500 Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-43bc63876f1so21509305e9.3 for ; Tue, 04 Mar 2025 17:23:34 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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However we don't want to break the possibly incomplete "my first bare metal assembly program"s, so we choose to simply display a warning when this occurs. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-Id: <20250220092903.3726-2-philmd@linaro.org> --- hw/char/pl011.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 06ce851044d..12a2d4bc7bd 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -85,6 +85,7 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Char= dev *chr) #define CR_OUT1 (1 << 12) #define CR_RTS (1 << 11) #define CR_DTR (1 << 10) +#define CR_RXE (1 << 9) #define CR_TXE (1 << 8) #define CR_LBE (1 << 7) #define CR_UARTEN (1 << 0) @@ -487,6 +488,14 @@ static int pl011_can_receive(void *opaque) PL011State *s =3D (PL011State *)opaque; int r; =20 + if (!(s->cr & CR_UARTEN)) { + qemu_log_mask(LOG_GUEST_ERROR, + "PL011 receiving data on disabled UART\n"); + } + if (!(s->cr & CR_RXE)) { + qemu_log_mask(LOG_GUEST_ERROR, + "PL011 receiving data on disabled RX UART\n"); + } r =3D s->read_count < pl011_get_fifo_depth(s); trace_pl011_can_receive(s->lcr, s->read_count, r); return r; --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138170; cv=none; d=zohomail.com; s=zohoarc; b=cD83XnGpGc2buaA1HJp2HO7HpWO2pZHKVseSegD852cOeAYe3J/8przCfiltzHu952PIBoM2Ecl2EqBUsZL2Hb8F8WcuJK63P+mFU4WbXYHQpB3HnE8ruhqpWMHwCMjBUiPP+vOa9nkk+nIhaXRoYTffUTO4oYCUN4sx+MBP3y8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138170; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=LY4o8wZMDwjmmvlDp+QFAxvztgqIF0167Zll+crzCoA=; b=kVYhr9/AiXBj8eRaNa6HH9T/DP87cnl0qoflwyuwuWUYYzjoeiH61s/1fqlJDCBYdvvhENvWmpdWHjrqfXry8qkNeiikuBkpbro9HrYB25wWmyhWyLrkvawF+QNVDR2d2h9q2rPK4gRBsTkjJa5PUjF34bRZtBtlAs2IxzqRCBc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138169624668.4113765594735; Tue, 4 Mar 2025 17:29:29 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdV3-0003oI-HN; Tue, 04 Mar 2025 20:24:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdU4-0001L7-TG for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:40 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdU3-00077N-5j for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:40 -0500 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-43bc638686eso1801335e9.1 for ; Tue, 04 Mar 2025 17:23:38 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Reviewed-by: Richard Henderson Message-Id: <20250220092903.3726-3-philmd@linaro.org> --- hw/char/pl011.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 12a2d4bc7bd..5bb83c54216 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -486,7 +486,9 @@ static void pl011_write(void *opaque, hwaddr offset, static int pl011_can_receive(void *opaque) { PL011State *s =3D (PL011State *)opaque; - int r; + unsigned fifo_depth =3D pl011_get_fifo_depth(s); + unsigned fifo_available =3D fifo_depth - s->read_count; + int r =3D fifo_available ? 1 : 0; =20 if (!(s->cr & CR_UARTEN)) { qemu_log_mask(LOG_GUEST_ERROR, @@ -496,7 +498,6 @@ static int pl011_can_receive(void *opaque) qemu_log_mask(LOG_GUEST_ERROR, "PL011 receiving data on disabled RX UART\n"); } - r =3D s->read_count < pl011_get_fifo_depth(s); trace_pl011_can_receive(s->lcr, s->read_count, r); return r; } --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138225; cv=none; d=zohomail.com; s=zohoarc; b=LXXT9uQpI+IFVh+HcbDnZPF2Tm1URrA7fsRrRCvnmHgxlJJIDYTUAZhdIFxFoDSFh9VkQmuZ42HvtNV4p5W0IYArCYzrfXvvC6kX7vNnYQEmb+xVYrEvWqfFrKQGuj4z+RzdkbuvJE5wNSctoJzGPtGw7mdJOlsGGtAJdgFlxkk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138225; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=flZzPJvyMRfjjg+eGkch3F0VvTnr5vwIJOoCHfTrgLI=; b=MFeAn1VsPO+FiKyAnf/uG9yznY5XCWWx+UoQPqXQANNAYHqt/k1tK0DRL/DiplqzOFHP/Vzt/z0V/MnHbCpw9Q5JrIo+pBc46DdTOKkcRm5WUt9k9Pyrd4VM6sL5/d3NSsrXBgbuiHm1O79c2d1lcfKG6LmjWHVVHwFys93ZoLE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138225110425.1180521198248; Tue, 4 Mar 2025 17:30:25 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdV2-0003on-Fp; Tue, 04 Mar 2025 20:24:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdU9-0001iQ-Vp for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:46 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdU7-000785-NZ for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:45 -0500 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-38f403edb4eso3753946f8f.3 for ; Tue, 04 Mar 2025 17:23:43 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Luc Michel Reviewed-by: Richard Henderson Message-Id: <20250220092903.3726-4-philmd@linaro.org> --- hw/char/pl011.c | 10 ++++++---- hw/char/trace-events | 7 ++++--- 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 5bb83c54216..f7485e7c541 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -185,7 +185,7 @@ static void pl011_fifo_rx_put(void *opaque, uint32_t va= lue) s->read_fifo[slot] =3D value; s->read_count++; s->flags &=3D ~PL011_FLAG_RXFE; - trace_pl011_fifo_rx_put(value, s->read_count); + trace_pl011_fifo_rx_put(value, s->read_count, pipe_depth); if (s->read_count =3D=3D pipe_depth) { trace_pl011_fifo_rx_full(); s->flags |=3D PL011_FLAG_RXFF; @@ -248,12 +248,13 @@ static void pl011_write_txdata(PL011State *s, uint8_t= data) static uint32_t pl011_read_rxdata(PL011State *s) { uint32_t c; + unsigned fifo_depth =3D pl011_get_fifo_depth(s); =20 s->flags &=3D ~PL011_FLAG_RXFF; c =3D s->read_fifo[s->read_pos]; if (s->read_count > 0) { s->read_count--; - s->read_pos =3D (s->read_pos + 1) & (pl011_get_fifo_depth(s) - 1); + s->read_pos =3D (s->read_pos + 1) & (fifo_depth - 1); } if (s->read_count =3D=3D 0) { s->flags |=3D PL011_FLAG_RXFE; @@ -261,7 +262,7 @@ static uint32_t pl011_read_rxdata(PL011State *s) if (s->read_count =3D=3D s->read_trigger - 1) { s->int_level &=3D ~INT_RX; } - trace_pl011_read_fifo(s->read_count); + trace_pl011_read_fifo(s->read_count, fifo_depth); s->rsr =3D c >> 8; pl011_update(s); qemu_chr_fe_accept_input(&s->chr); @@ -498,12 +499,13 @@ static int pl011_can_receive(void *opaque) qemu_log_mask(LOG_GUEST_ERROR, "PL011 receiving data on disabled RX UART\n"); } - trace_pl011_can_receive(s->lcr, s->read_count, r); + trace_pl011_can_receive(s->lcr, s->read_count, fifo_depth, fifo_availa= ble); return r; } =20 static void pl011_receive(void *opaque, const uint8_t *buf, int size) { + trace_pl011_receive(size); /* * In loopback mode, the RX input signal is internally disconnected * from the entire receiving logics; thus, all inputs are ignored, diff --git a/hw/char/trace-events b/hw/char/trace-events index b2e3d25ae34..05a33036c12 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -60,12 +60,13 @@ imx_serial_put_data(const char *chrname, uint32_t value= ) "%s: 0x%" PRIx32 # pl011.c pl011_irq_state(int level) "irq state %d" pl011_read(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03= x value 0x%08x reg %s" -pl011_read_fifo(int read_count) "FIFO read, read_count now %d" +pl011_read_fifo(unsigned rx_fifo_used, size_t rx_fifo_depth) "RX FIFO read= , used %u/%zu" pl011_write(uint32_t addr, uint32_t value, const char *regname) "addr 0x%0= 3x value 0x%08x reg %s" -pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_co= unt %d returning %d" -pl011_fifo_rx_put(uint32_t c, int read_count) "new char 0x%02x read_count = now %d" +pl011_can_receive(uint32_t lcr, unsigned rx_fifo_used, size_t rx_fifo_dept= h, unsigned rx_fifo_available) "LCR 0x%02x, RX FIFO used %u/%zu, can_receiv= e %u chars" +pl011_fifo_rx_put(uint32_t c, unsigned read_count, size_t rx_fifo_depth) "= RX FIFO push char [0x%02x] %d/%zu depth used" pl011_fifo_rx_full(void) "RX FIFO now full, RXFF set" pl011_baudrate_change(unsigned int baudrate, uint64_t clock, uint32_t ibrd= , uint32_t fbrd) "new baudrate %u (clk: %" PRIu64 "hz, ibrd: %" PRIu32 ", f= brd: %" PRIu32 ")" +pl011_receive(int size) "recv %d chars" =20 # cmsdk-apb-uart.c cmsdk_apb_uart_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK = APB UART read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Have the IOCanReadHandler handler return how many elements are available, and use that in the IOReadHandler handler. Example of FIFO better used by enabling the pl011 tracing events and running the tests/functional/test_aarch64_virt.py tests: pl011_can_receive LCR 0x70, RX FIFO used 0/16, can_receive 16 chars pl011_receive recv 5 chars pl011_fifo_rx_put RX FIFO push char [0x72] 1/16 depth used pl011_irq_state irq state 1 pl011_fifo_rx_put RX FIFO push char [0x6f] 2/16 depth used pl011_fifo_rx_put RX FIFO push char [0x6f] 3/16 depth used pl011_fifo_rx_put RX FIFO push char [0x74] 4/16 depth used pl011_fifo_rx_put RX FIFO push char [0x0d] 5/16 depth used pl011_can_receive LCR 0x70, RX FIFO used 5/16, can_receive 11 chars pl011_can_receive LCR 0x70, RX FIFO used 5/16, can_receive 11 chars pl011_write addr 0x038 value 0x00000050 reg IMSC pl011_irq_state irq state 1 pl011_can_receive LCR 0x70, RX FIFO used 5/16, can_receive 11 chars pl011_read addr 0x03c value 0x00000030 reg RIS pl011_write addr 0x044 value 0x00000000 reg ICR pl011_irq_state irq state 1 pl011_read addr 0x018 value 0x00000080 reg FR pl011_read_fifo RX FIFO read, used 4/16 pl011_irq_state irq state 1 pl011_read addr 0x000 value 0x00000072 reg DR pl011_can_receive LCR 0x70, RX FIFO used 4/16, can_receive 12 chars pl011_read addr 0x018 value 0x00000080 reg FR pl011_read_fifo RX FIFO read, used 3/16 pl011_irq_state irq state 1 pl011_read addr 0x000 value 0x0000006f reg DR pl011_can_receive LCR 0x70, RX FIFO used 3/16, can_receive 13 chars pl011_read addr 0x018 value 0x00000080 reg FR pl011_read_fifo RX FIFO read, used 2/16 pl011_irq_state irq state 1 pl011_read addr 0x000 value 0x0000006f reg DR pl011_can_receive LCR 0x70, RX FIFO used 2/16, can_receive 14 chars pl011_read addr 0x018 value 0x00000080 reg FR pl011_read_fifo RX FIFO read, used 1/16 pl011_irq_state irq state 1 pl011_read addr 0x000 value 0x00000074 reg DR pl011_can_receive LCR 0x70, RX FIFO used 1/16, can_receive 15 chars pl011_read addr 0x018 value 0x00000080 reg FR pl011_read_fifo RX FIFO read, used 0/16 pl011_irq_state irq state 0 pl011_read addr 0x000 value 0x0000000d reg DR pl011_can_receive LCR 0x70, RX FIFO used 0/16, can_receive 16 chars pl011_read addr 0x018 value 0x00000090 reg FR pl011_read addr 0x03c value 0x00000020 reg RIS pl011_write addr 0x038 value 0x00000050 reg IMSC pl011_irq_state irq state 0 pl011_can_receive LCR 0x70, RX FIFO used 0/16, can_receive 16 chars pl011_can_receive LCR 0x70, RX FIFO used 0/16, can_receive 16 chars pl011_read addr 0x018 value 0x00000090 reg FR pl011_write addr 0x000 value 0x00000072 reg DR Inspired-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Reviewed-by: Richard Henderson Message-Id: <20250220092903.3726-5-philmd@linaro.org> --- hw/char/pl011.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index f7485e7c541..23a9db8c57c 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -489,7 +489,6 @@ static int pl011_can_receive(void *opaque) PL011State *s =3D (PL011State *)opaque; unsigned fifo_depth =3D pl011_get_fifo_depth(s); unsigned fifo_available =3D fifo_depth - s->read_count; - int r =3D fifo_available ? 1 : 0; =20 if (!(s->cr & CR_UARTEN)) { qemu_log_mask(LOG_GUEST_ERROR, @@ -500,7 +499,8 @@ static int pl011_can_receive(void *opaque) "PL011 receiving data on disabled RX UART\n"); } trace_pl011_can_receive(s->lcr, s->read_count, fifo_depth, fifo_availa= ble); - return r; + + return fifo_available; } =20 static void pl011_receive(void *opaque, const uint8_t *buf, int size) @@ -515,7 +515,9 @@ static void pl011_receive(void *opaque, const uint8_t *= buf, int size) return; } =20 - pl011_fifo_rx_put(opaque, *buf); + for (int i =3D 0; i < size; i++) { + pl011_fifo_rx_put(opaque, buf[i]); + } } =20 static void pl011_event(void *opaque, QEMUChrEvent event) --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138246; cv=none; d=zohomail.com; s=zohoarc; b=OUDcmWfCHqTFWsr6+RnvTWm192nHXEjmuwc1Iys8p3TIUOxiII4NMAyj+s0QDdu4yS+mZWHneQ7DFnQy9qwBBO53ygI9cCp8TjrVSYmaS2ooVIHAI1x4ABJjWdacAyhvlmbRUCizBW2kNTseRyz52MDQGZPjIqn7/kl55orXe5M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138246; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ZnAwaBdhJN/kNZhyvNDoVKLIcUFbc7BOsa1ZC7/+qgE=; b=drwZtosghrRb3OnD0+FgnuLwdDy/3aEx37wVlBI+fQlHV2oVwgxRAeqP9WhICPkXAmKwVqiu/LVjXdojVzxqdpVt9j0zp4RinvJtppErUuaSL1ryjBWvWExT9wPU/7JaRpG8MbgJjMsFjFyAHkzPvM7IEhGBO4A6ITznLpCrZtk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138246846565.3930638043521; Tue, 4 Mar 2025 17:30:46 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdVb-0004QT-En; Tue, 04 Mar 2025 20:25:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdUI-00021w-8t for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:55 -0500 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdUG-00079J-M7 for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:54 -0500 Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-43bcad638efso10144815e9.2 for ; Tue, 04 Mar 2025 17:23:52 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Have the IOCanReadHandler handler return how many elements are available, and use that in the IOReadHandler handler. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Reviewed-by: Richard Henderson Message-Id: <20250220092903.3726-6-philmd@linaro.org> --- hw/char/bcm2835_aux.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c index 73ad5934067..c6e7eccf7dd 100644 --- a/hw/char/bcm2835_aux.c +++ b/hw/char/bcm2835_aux.c @@ -221,7 +221,7 @@ static int bcm2835_aux_can_receive(void *opaque) { BCM2835AuxState *s =3D opaque; =20 - return s->read_count < BCM2835_AUX_RX_FIFO_LEN; + return BCM2835_AUX_RX_FIFO_LEN - s->read_count; } =20 static void bcm2835_aux_put_fifo(void *opaque, uint8_t value) @@ -243,7 +243,9 @@ static void bcm2835_aux_put_fifo(void *opaque, uint8_t = value) =20 static void bcm2835_aux_receive(void *opaque, const uint8_t *buf, int size) { - bcm2835_aux_put_fifo(opaque, *buf); + for (int i =3D 0; i < size; i++) { + bcm2835_aux_put_fifo(opaque, buf[i]); + } } =20 static const MemoryRegionOps bcm2835_aux_ops =3D { --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138365; cv=none; d=zohomail.com; s=zohoarc; b=iZlpBbLQALgrwuREWryXI6bvzOr20O+Z1DWhGwUUsMmWAXxQilqhvpmf/kRqK9zRr0WOOOcg8/O7QdP7U2STnAm0uKeB0qjLpS4EVZ3M99YHSVuezpDzorA3nNQl87lG3xwmIQf5MJX8PcbOuGXn9EeF552QNukX+ZitA+HlVAY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138365; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=qd7m5wMCz+XZxcgvBF3/5ywn7cJ5I9SW91UZjpHUbeA=; b=Z09zKnlW0S5rU4plHUoPID7LVAEoaRec69+SjJ2XRzE1BTO47mnLVxZrgAmd70BLMfhVQKbTyjNUefuD1zlpO0YTY1bJGhWQDPxtZBrJ6SZ4FCq3izHk9R47q+XuU7njMRfPQqpfDSxpnGiSSi8BdCk0JxKjQ/OE0P5Jpl6eS8E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138365364647.4795566725775; Tue, 4 Mar 2025 17:32:45 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdWr-0006VQ-8M; Tue, 04 Mar 2025 20:26:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdUN-0002Di-3D for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:00 -0500 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdUL-0007AM-I2 for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:23:58 -0500 Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-390ddf037ffso3360399f8f.2 for ; Tue, 04 Mar 2025 17:23:57 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e4844c0dsm18880330f8f.80.2025.03.04.17.23.54 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:23:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137835; x=1741742635; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qd7m5wMCz+XZxcgvBF3/5ywn7cJ5I9SW91UZjpHUbeA=; b=cYsEZF4DPwJbbCt2fcEC3RW4ULWbSjKrmFSsyxUxqf3vY1nCYW87qh0oHAI9zVhh5/ 6pl70pzVP1Opom2qJKsNV5QzuF++Mq1Inl+/nim0nBhV7q4+71MzBpr3iiw8m++giGO1 qxnEzfCdR5vlq7KHnYVV+5LRd1DWh5BfIyKgJB53AA19mfvqAYwvBi4wpqEjn1NTwYOR v1Un3+6KvPG9YtVPcIW4C8QltQvzFk5MsQwUOXsQGQ8ScxJBhqZd43dHUiFHDDg2Q81C KS1gCmkBdfFbSMk2a4LhiUq7QLLx8sRGqOlCT38y3YynIvCPvONf5F8K0gXuzNoFu9rY rAcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137835; x=1741742635; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qd7m5wMCz+XZxcgvBF3/5ywn7cJ5I9SW91UZjpHUbeA=; b=Awo44fFGfeZqqPNZXzGOppZGOv9Ug5FF8NE5H24lK5kU1N9LyUbcjH7McRYrQSd+mB 1h4lfHWLWcH8oHswepdAG1StsLSJyEIgqyhoqtS/r9MrBLEo44IPaDQnNUMvUzToHq2A KvlISm+hdIJc64D5CZX1jtv+fRCO8JjJtS3yxgmgwFpCVGdaQYiVc0ZdhlZmSAny7FHh 1bYKhKtBN25gqCa6ighF30q7z0YcfwE7P74UePPJGljGQP8L+JegdclRrrPyd54aNc5b /U2/0Tk3xxoEpdA5LvAQqvfNCSTsd2irKRseopgiNVRxqhSP5F6lnNDe6Q9ccOAQiJuO KA9g== X-Gm-Message-State: AOJu0Yx5HYI4NwhSiWy1IBNC+GMntEJ0ttMZSMURE0/WmShy8bVbQGA6 UyBGJkQ4XlEaUrDBEEPXJ5k5lCj6V6NEUC4s39LonL6Xy0StLnK+OqB8TC79oL0NnEelAO6FFAu nzzc= X-Gm-Gg: ASbGnctVnumn7uZWEozYHEe2A3uH+FH4Xub98GUrtX0WoCIpOHGPm+2YRWwL8Rk+a5R J+m7HyNvzAYQcKktbGJ0YfATt/UDI8GMIcSzEJ3tqG9xw/78xzVv6u0Hbc62vctoAdBPjpoQ3C8 OHqzmH61P54k8kRHe0/EIR5T26FtQq6M1ZydnvdGESUBxHHnn0bVMK4dXmtcQQ3JW+w5wY1Yw7m TVBCW59YXivH1Oa2SyVjP+dam4PxfxSnsN++RscEBE6oW3Bh1eXQoCXoB783WycRrZbFEOkNN2r Y27trYw9wCdVN2dwE7gjL5Z00nnEVKz6ahSmLngeFvJjlco40NpoSg+LX/fPWQIu+DXvCr0M+wt 7rTW/uYFSirzj/CJPWCg= X-Google-Smtp-Source: AGHT+IFQriLDXu0bW0VYcFYpFnrQQOenK3H2DTY1wBvYAaLm4iAVNypHhoO05v4I74OKggKoXOtFHg== X-Received: by 2002:a05:6000:381:b0:38f:2f0e:980c with SMTP id ffacd0b85a97d-3911f7d2fc9mr585329f8f.47.1741137835466; Tue, 04 Mar 2025 17:23:55 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Luc Michel , Richard Henderson , Bernhard Beschow Subject: [PULL 24/41] hw/char/imx_serial: Really use RX FIFO depth Date: Wed, 5 Mar 2025 02:21:39 +0100 Message-ID: <20250305012157.96463-25-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741138368271019100 While we model a 32-elements RX FIFO since the IMX serial model was introduced in commit 988f2442971 ("hw/char/imx_serial: Implement receive FIFO and ageing timer") we only read 1 char at a time! Have the IOCanReadHandler handler return how many elements are available, and use that in the IOReadHandler handler. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Reviewed-by: Richard Henderson Tested-by: Bernhard Beschow Message-Id: <20250220092903.3726-7-philmd@linaro.org> --- hw/char/imx_serial.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c index 38b4865157e..6f14f8403a9 100644 --- a/hw/char/imx_serial.c +++ b/hw/char/imx_serial.c @@ -386,7 +386,8 @@ static void imx_serial_write(void *opaque, hwaddr offse= t, static int imx_can_receive(void *opaque) { IMXSerialState *s =3D (IMXSerialState *)opaque; - return s->ucr2 & UCR2_RXEN && fifo32_num_used(&s->rx_fifo) < FIFO_SIZE; + + return s->ucr2 & UCR2_RXEN ? fifo32_num_free(&s->rx_fifo) : 0; } =20 static void imx_put_data(void *opaque, uint32_t value) @@ -417,7 +418,10 @@ static void imx_receive(void *opaque, const uint8_t *b= uf, int size) IMXSerialState *s =3D (IMXSerialState *)opaque; =20 s->usr2 |=3D USR2_WAKE; - imx_put_data(opaque, *buf); + + for (int i =3D 0; i < size; i++) { + imx_put_data(opaque, buf[i]); + } } =20 static void imx_event(void *opaque, QEMUChrEvent event) --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741137990; cv=none; d=zohomail.com; s=zohoarc; b=ABvHFUBcV8AnI1hY3pJFbVbSP8hGty3KuPQ/gNvD9mZOgiTfGy5i4v28QuBjx73RDXi9H6yjkBkFsLEBQ3JT0ofhNm0W4JNszWnEihpGZrJDlHWMeMlK8/P67c2EgzUNb34kNd/SmoOtQ0a3zk+gb6xkhzBJlvpj1d7IaUQA0pU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741137990; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=GWCkeTUZ1Bwoa+5rt2QUs52v09pE2by6BJ43I/9OHfA=; b=hRp6Rn/Aci2sD2sYtBvAldPPP47il1fRovRceecr7hOp4Lq/HticEj97dmQLSCZI5aNgvLGfhal7zW/sXDE7t+fdqbolU6gqq+HX/rzclpOtZKAr0BOtkU30mBo6A3FLoCgleKuCRndc8Yai9NQbjX9wdbCBGWSVbD8bOGsLi/A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741137989999816.3454489500813; Tue, 4 Mar 2025 17:26:29 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdWG-0004vm-Np; Tue, 04 Mar 2025 20:25:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdUS-0002Fa-ON for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:11 -0500 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdUR-0007BE-6f for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:04 -0500 Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-43bcad638efso10145755e9.2 for ; Tue, 04 Mar 2025 17:24:02 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43bd42e6bcfsm1952175e9.32.2025.03.04.17.23.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:24:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137841; x=1741742641; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=GWCkeTUZ1Bwoa+5rt2QUs52v09pE2by6BJ43I/9OHfA=; b=GCfUfAtIrzHLlH/2PKgYp41BYSS/VC+sMlt2aBoOgsv5WWw96+LLCa7e9Ey5oolEMG s0aUcNBFNw8pSGl9wJFFx1keMLTIcGuLEf6ENh6PPWkB3dNlru6cgfbMI1dyLzZUM238 07DAOX6RJfb7B8+YXeKIxuO1VpRsCn66njZ2S0++aBqLh8ShV3LbTlMOb/6VWcrCWFNq bAoapJgQND1xUoWCuubtXc6bTcvLD7Ks74v5MIQ/J1ABryAxKk/hp4xVNuMfwPITICYS wmPqS+LBmsYqie7HrzzfDhDFv2UPzeuSBNuibXq7NZM3/U3mG59F5S/307ewz+68Ye5G nVjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137841; x=1741742641; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GWCkeTUZ1Bwoa+5rt2QUs52v09pE2by6BJ43I/9OHfA=; b=TCVDQI1a+T8X8laRZ8RvMShF6DVwZSjU4O7YRxyQv55o+wuBq4McljzZVCekcBVJOA d0AquUTBJVrpg+wt6DTZDnafFQNfXqzjjXwGPIqhDoaxPyXNBgbNzrIk+vpSGQ25RGRK 7g2nCgfWG9LxOB5n/2+ppQIm53362DP0Iz0bu5Kgav+3krwvbakQ3hwOkKBwT2NkxvCv Wugesf7IFGJ0dC8ylqTBpQ/DHBWJ9fMmPKT/pm16I2AJ07FfZALoeJHk6ENQyoNo3Pel a1MXuyNTTOv8Mlev4lbXC3QWMhDlaFWokSEguKPe3TMJTv9MX2/ZLLIDQ+RVo0ibCJHY 5/gw== X-Gm-Message-State: AOJu0YxzrrbPjijQUBZZThhAMoqf0HRqRI3G68uEVh/sgZTNBl4JrBuO KRgddAKO3WQPssOZt5t0i6r6AhoQDHaIq4Nkmm/ziJHu1RmneKo45CuyJ8foyOhd/3sZFsGRJVD cC50= X-Gm-Gg: ASbGncveFHx2qsJfrJDinjwwFaQyOfd+o4CaBlWbEZL7Lf3xbTfWizCVoa/EdTCKdFn ek7yM2bsdoX+2eIfOSSB4BlMb/PAhbp4rvItfJhSZK9SMa83Nrh0lx3o01TwGoaFgy+XeQDi+IF qI7gB5B/drA0qLNikaB0MSA3AfpJZu3Zc763x8AI+7wQ6FGPzPU/swD4P+JsZbwY32KdUtWDXTf t9k6GErlSgvEWRmLAD4ktqAWad6Z9fDNpEzSyXE5BjOPn0R2ofBlrWLTXBhX8OJV38WJ/TWwxAQ rtmMEfuphrp8M26i9J6Xhcf2OjdgB9M6BbQGKNksTGTWqB/Yb+o5cVj6H3x91poKYWjExflaEfH ZIDjcHdfMzPWTJ54I71E= X-Google-Smtp-Source: AGHT+IEDnbjMa1qZO+TqVDNEIcP6ZL46N87m9w0qmJfAaCjm2r5QnBMcwlcnE+z00mQf2jHlHbIhzA== X-Received: by 2002:a05:600c:4ed2:b0:439:a5e6:73ff with SMTP id 5b1f17b1804b1-43bd29d8441mr6558595e9.17.1741137840978; Tue, 04 Mar 2025 17:24:00 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Luc Michel , Thomas Huth , Richard Henderson Subject: [PULL 25/41] hw/char/mcf_uart: Use FIFO_DEPTH definition instead of magic values Date: Wed, 5 Mar 2025 02:21:40 +0100 Message-ID: <20250305012157.96463-26-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741137991279019000 Defines FIFO_DEPTH and use it, fixing coding style. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson Message-Id: <20250220092903.3726-8-philmd@linaro.org> --- hw/char/mcf_uart.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/hw/char/mcf_uart.c b/hw/char/mcf_uart.c index 980a12fcb7d..95f269ee9b7 100644 --- a/hw/char/mcf_uart.c +++ b/hw/char/mcf_uart.c @@ -17,6 +17,8 @@ #include "chardev/char-fe.h" #include "qom/object.h" =20 +#define FIFO_DEPTH 4 + struct mcf_uart_state { SysBusDevice parent_obj; =20 @@ -27,7 +29,7 @@ struct mcf_uart_state { uint8_t imr; uint8_t bg1; uint8_t bg2; - uint8_t fifo[4]; + uint8_t fifo[FIFO_DEPTH]; uint8_t tb; int current_mr; int fifo_len; @@ -247,14 +249,16 @@ static void mcf_uart_reset(DeviceState *dev) static void mcf_uart_push_byte(mcf_uart_state *s, uint8_t data) { /* Break events overwrite the last byte if the fifo is full. */ - if (s->fifo_len =3D=3D 4) + if (s->fifo_len =3D=3D FIFO_DEPTH) { s->fifo_len--; + } =20 s->fifo[s->fifo_len] =3D data; s->fifo_len++; s->sr |=3D MCF_UART_RxRDY; - if (s->fifo_len =3D=3D 4) + if (s->fifo_len =3D=3D FIFO_DEPTH) { s->sr |=3D MCF_UART_FFULL; + } =20 mcf_uart_update(s); } --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138561; cv=none; d=zohomail.com; s=zohoarc; b=ltPS481HZJxjUPfEIhGzq1qlHN5BwICIAkrXjC86DpmW/aTdx5PK1dqr+rYqXCBPodOTZZIVftJTnsjot4mmJr16mwaVBrNc3Jqvb26gMxvVOAgwyowLYeLIbCXfAPFKfnEBv1xe9gUH0arnjsxpnOkwqdV/b3Gfk7i42bKZ+5Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138561; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=zsw3hWIwysJpMOxIWVwDgeawOr5AGtB31cvISbXkIjI=; b=n8Cc4RwwzmRYp8QmSMckkJlGhZVEwzZUUx/LOTxcMJXT0aBEWa4/RC6qAcaj3u4SPIHhqNvla7UPnlEdRBjqQd98jzBBeJS5EMJJD5o7ieZzMdszu75SfA5Ki1xdxuAqG+XQ8z7B1Wymkr5BuSjoMRa/skswFlruKreVFY0t8Q0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138561821221.0778222487928; Tue, 4 Mar 2025 17:36:01 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdWK-00056U-CP; Tue, 04 Mar 2025 20:26:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdUY-0002Lo-Q1 for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:12 -0500 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdUW-0007CF-5v for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:09 -0500 Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-43bbb440520so31789515e9.2 for ; Tue, 04 Mar 2025 17:24:07 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43bd42c8050sm1989855e9.21.2025.03.04.17.24.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:24:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137846; x=1741742646; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zsw3hWIwysJpMOxIWVwDgeawOr5AGtB31cvISbXkIjI=; b=gB4KeL70UwMnRFx/HECn5QdOBHUVajlYN85JrM9ATad4YwGRr2Lx96JJdiVPR8/WKH wCKm9aN+BNZy2Wcxh4DeFteC0HILmPqBjxOCBbOzHexqP/Xqc7AkHNj97aEl+yBE5paX bvakTqmql+nAxAbW7T7M4ronz3Rz1JLhiZENe0cnCdnhHdgupJxbNRTH6p5eEY1lcvDn G2T+xZA9g2V33VT11RkdlA6p44YpcXHOVLXN7x6Au/BD15oiKQQf1HDJgIOu5YgOdM2X m4g66MnLwIkM//PpngZsR0IxX/vuxNWNvJ/AFyzn/0hELOt3vPOg+6zNTtIC/whcRzML POTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137846; x=1741742646; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zsw3hWIwysJpMOxIWVwDgeawOr5AGtB31cvISbXkIjI=; b=Y0lPJyl35H7EPINLzHLPMsczGpyG2pA0zVCGZFt2Fc1G1RYveQXfgfK3UyA1VR9eZW bCoJcRnGbnTcEcU+JLfi35xVMIfxNq9IXmtb0FmdLwVYBiTzNz8RQjFzA3iARyYdTgVp DESp7LoQP65Kj1+BdkaWgZ0Qa5Vb8vLUZf/jq4hTeFG0Fzrfy1XxhAG4hXUuWtK0aj2j pJvZ49buDmVrwfhIBXk2W3gKs4YPSuRqWu7HaFpfarWTx4s5+V1+nAyIzFcEXHbRwi6b buvJtsT8dGbeNocnTYEtCGWwzhiCDaLst+aDqf9Imcb1VindG1cXSvGLftsyalYqhkcb RvLA== X-Gm-Message-State: AOJu0YwRaXXWAowf3kNskItwY8s2Bq9vqbqbYEPFCYGhRVyrO8vVQMI6 GdxRP+gC1y4XbwXhGZTDpVHzIzg++roBVK0Tj33nbsLW8rhX2pMrMUAwP1g45QTaMtul1DlrntL EfOM= X-Gm-Gg: ASbGncv4pOqHbx2BGgyDLvVJPKqgf9sVDPLE0/+Wa4Yuobw1SgsXkl0F7+gFHZr69yv qx3yuJITx/sHxAoqvxpan6/utXnWUNBIkX8SVQ++N4oBwG2Mn8Ea1ZuWZbc4lA5iy0peJU7jP0m A+SJ8TOO1abAFGKOoHlGZ069a/HWFeXqgO0Vx3s37IafIML4Xxg4Mri3TbRXok/bILMaoQCjIwn 9FZ60o1KwTRy4WZhw/zkE+MHgqKu0imgyMdbvEeecxZEEtOK+tgxzOL+MVkQgVyFUjisfmls8/N D0hR7pkkiQU3Hcd5QinUfHdyRY0qzj2t2+DHoCiE2nmRuHkJfq/+V90qopLNUs/RNt64mFrSOdB pNf+lJXlmEwt9zDXYY20= X-Google-Smtp-Source: AGHT+IG9ZmacBlKb5ZVQcmDUs9qj5tagOwc/FyygnJ6KABY3skoFkrFA0rNRxJS1t2tQYkQMx+bXsw== X-Received: by 2002:a7b:ce94:0:b0:43b:cf9c:700c with SMTP id 5b1f17b1804b1-43bd29847ffmr8044605e9.16.1741137846353; Tue, 04 Mar 2025 17:24:06 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Luc Michel , Thomas Huth , Richard Henderson Subject: [PULL 26/41] hw/char/mcf_uart: Really use RX FIFO depth Date: Wed, 5 Mar 2025 02:21:41 +0100 Message-ID: <20250305012157.96463-27-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741138563813019000 While we model a 4-elements RX FIFO since the MCF UART model was introduced in commit 20dcee94833 ("MCF5208 emulation"), we only read 1 char at a time! Have the IOCanReadHandler handler return how many elements are available, and use that in the IOReadHandler handler. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Tested-by: Thomas Huth Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson Message-Id: <20250220092903.3726-9-philmd@linaro.org> --- hw/char/mcf_uart.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/hw/char/mcf_uart.c b/hw/char/mcf_uart.c index 95f269ee9b7..529c26be93a 100644 --- a/hw/char/mcf_uart.c +++ b/hw/char/mcf_uart.c @@ -281,14 +281,16 @@ static int mcf_uart_can_receive(void *opaque) { mcf_uart_state *s =3D (mcf_uart_state *)opaque; =20 - return s->rx_enabled && (s->sr & MCF_UART_FFULL) =3D=3D 0; + return s->rx_enabled ? FIFO_DEPTH - s->fifo_len : 0; } =20 static void mcf_uart_receive(void *opaque, const uint8_t *buf, int size) { mcf_uart_state *s =3D (mcf_uart_state *)opaque; =20 - mcf_uart_push_byte(s, buf[0]); + for (int i =3D 0; i < size; i++) { + mcf_uart_push_byte(s, buf[i]); + } } =20 static const MemoryRegionOps mcf_uart_ops =3D { --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138369; cv=none; d=zohomail.com; s=zohoarc; b=Nxri08tQZMGGyfranr7A4h8aRuqi/m10t/ICXQRtgbLGuWy/p0GZdQKaKwZiEOsgJH9c9yiZ9RBg1cd3m/gqC6x7SpMzLhNRW7FNp9QW3jalp6bz8v3RIrndww1BPQW5R4dNcL7EncSwoViJ9ekvBfYeQ5adzNMijgM0onF2xpA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138369; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=H0YNIJlxmbjMyr4LODgtrAg0p6qQTSAHOFsEzvnJxFk=; b=FJ/gCobahfA6UuKSILMEzXTnbHecNxF5Q6hYQDgXEKEz4ErHjQnNGg+Cx6z0GD6Ca+lyAKXilCXPSxMm0RRDW0Hfp+S5p6OuwjuEGiVl7c6mwT+tqF7wOr1UJI4BJK/MA+4TbnBQjQxMANLhhRQf/C+BGzp1J0rmpD83/ECWS2M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138369869598.0865007039893; Tue, 4 Mar 2025 17:32:49 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdV5-0003wj-Hs; Tue, 04 Mar 2025 20:24:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdUc-0002Sv-L0 for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:15 -0500 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdUa-0007Ct-P0 for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:14 -0500 Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-43996e95114so42450515e9.3 for ; Tue, 04 Mar 2025 17:24:12 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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The IOReadHandler, sh_serial_receive1() takes care to receive multiple chars, but if the FIFO is partly filled, we only process the number of free slots in the FIFO, discarding the other chars! Fix by returning how many elements the FIFO can queue in the IOCanReadHandler, so we don't have to process more than that in the IOReadHandler, thus not discarding anything. Remove the now unnecessary check on 's->rx_cnt < SH_RX_FIFO_LENGTH' in IOReadHandler, reducing the block indentation. Fixes: 63242a007a1 ("SH4: Serial controller improvement") Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Reviewed-by: Richard Henderson Message-Id: <20250220092903.3726-10-philmd@linaro.org> --- hw/char/sh_serial.c | 30 ++++++++++++++---------------- 1 file changed, 14 insertions(+), 16 deletions(-) diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c index 247aeb071ac..41c8175a638 100644 --- a/hw/char/sh_serial.c +++ b/hw/char/sh_serial.c @@ -320,7 +320,7 @@ static uint64_t sh_serial_read(void *opaque, hwaddr off= s, =20 static int sh_serial_can_receive(SHSerialState *s) { - return s->scr & (1 << 4); + return s->scr & (1 << 4) ? SH_RX_FIFO_LENGTH - s->rx_head : 0; } =20 static void sh_serial_receive_break(SHSerialState *s) @@ -353,22 +353,20 @@ static void sh_serial_receive1(void *opaque, const ui= nt8_t *buf, int size) if (s->feat & SH_SERIAL_FEAT_SCIF) { int i; for (i =3D 0; i < size; i++) { - if (s->rx_cnt < SH_RX_FIFO_LENGTH) { - s->rx_fifo[s->rx_head++] =3D buf[i]; - if (s->rx_head =3D=3D SH_RX_FIFO_LENGTH) { - s->rx_head =3D 0; - } - s->rx_cnt++; - if (s->rx_cnt >=3D s->rtrg) { - s->flags |=3D SH_SERIAL_FLAG_RDF; - if (s->scr & (1 << 6) && s->rxi) { - timer_del(&s->fifo_timeout_timer); - qemu_set_irq(s->rxi, 1); - } - } else { - timer_mod(&s->fifo_timeout_timer, - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 15 * s->et= u); + s->rx_fifo[s->rx_head++] =3D buf[i]; + if (s->rx_head =3D=3D SH_RX_FIFO_LENGTH) { + s->rx_head =3D 0; + } + s->rx_cnt++; + if (s->rx_cnt >=3D s->rtrg) { + s->flags |=3D SH_SERIAL_FLAG_RDF; + if (s->scr & (1 << 6) && s->rxi) { + timer_del(&s->fifo_timeout_timer); + qemu_set_irq(s->rxi, 1); } + } else { + timer_mod(&s->fifo_timeout_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 15 * s->etu); } } } else { --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741137990; cv=none; d=zohomail.com; s=zohoarc; b=FZSeJP0SLLm36aJXXscuVqANPcJUhehWxa5T/c/aZ4Xeg0xbruRZUUyMmM06EICH9Oz3GuWiGhC3eF8z4yoVL8jDkFfKgTAhkiZhEo3oUEswOQsSH8sSeTpvPqc9y08UGtn3wRwhkH5V+o3aKzuIDNNhn43lOSDpPT6Hq6OoY2k= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741137990; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=0qqjRyLJXA943FvFgC6O1oaicZbTpbgR9SXUAwOPgKM=; b=aNL7UyVHlZi19GK3h1f4QJKAqkIDwsBFL7/eKYsX+lTad974ZXUL23DTIAzZjOuBx1hD7mepK0GR5xO/iYNFAKReLKw5xn4DktQ7ysco0Heq8hfgOxEwEm+SHzV2AMlMPF5eNn6NRxyyRJlph7vdhcBTaBH5y9+Ys8VeEEe4TPU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741137990590211.31310180635182; Tue, 4 Mar 2025 17:26:30 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdUq-000320-LJ; Tue, 04 Mar 2025 20:24:29 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdUh-0002g6-0s for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:19 -0500 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdUf-0007Dl-AU for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:18 -0500 Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-390dd3403fdso5299899f8f.0 for ; Tue, 04 Mar 2025 17:24:16 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e47965ddsm19712111f8f.18.2025.03.04.17.24.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:24:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137855; x=1741742655; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0qqjRyLJXA943FvFgC6O1oaicZbTpbgR9SXUAwOPgKM=; b=yGSEADqTL008eLG6S5OtMwHWaNS5Jv0QsxJRCztptOZ9CfbSq59aUfqUQ5F5YuTShK N7t51v7Wytk2EYKh0+zvrXlXmYEmLYqXX77RmFWhEf1IkajMs2Mg3GANpQ+TZITkBV3k XIeHQQyidSRZI1mIhsCkmQ6yNHUD8HyH9R6LB9FnlSBZglottM+KpMrVmLAz3TPpxUQt D5+/UIrFLCd6f+re/KH23EtIafbihiZD9NdEh0E8wvXLESTzpAdegFEUEayLVO27Fl/s C/SVY16QsFHoekcRxC2nDL8aHCCLQTB7UpnjUFwNLUEm27Bcuqf9epUa2CbEMQT4+teD wFPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137855; x=1741742655; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0qqjRyLJXA943FvFgC6O1oaicZbTpbgR9SXUAwOPgKM=; b=Y5hzl5x6dWAP3taqyx+7p0Xc+vbPWMpmAQGEpBS3MumJ/OJGwQmz9Tu7jSBRXI5Lh4 ky2Mc3PDdhfKW848R87Cb7Xz6UiEd6SGpa+nWQzo5erXHBjeywAGPjTDGKbNJFPm5JVG YWDRLBPDj+epFxIQgi8Be2B/YMzO/PXVLO3BHquVc8phyRHpHftmmNdTx6/K7W8nmmJc 2NEDpLj6J25uDkPWo/GypHnlyJfc195iKrUGzglwQ6AagXpbyVKUV6DvXA4eSt8PgAs6 lgm3v+a6PBxbWCEGOiG1M51qhifiYnqYSuOMhz++Kfw8PrbpJbHhveOEyfs7zlq8sAbg 3xWw== X-Gm-Message-State: AOJu0YzOKYBSZosDc5XaF//u8t8DjLuNvd3Wmqtgl15mulmeb1bafXo5 5bhyiVcPzwAakeEOraSTI14wwQVs4vRESAqpuvGuowD8rabNb5FreZHtnqm0MBQg4AqZL8ZBm44 JbUE= X-Gm-Gg: ASbGnctzstu2B9x5NLiBFcxSkRIBx8jrkdDhGV8la37rg3Iz0OJJ61DPUFXHYZpXHm5 tkj+OMykj4+X/l0VZ2xv4BPbfZer2RPbf90EIA0AUjNkoPBC79hWuwgykvttLQTnWxsjtZvNRc1 4QIBfaxpXpy4sWujDMZOo0fuHS8gr3iCaDXaNTeGiD+/DC/ArHjFroi8zn4p71Bell54nkgeS0b h56O+eEcT5IwSqt9wxPQvew2flACPecMY1UFKAILsqDAvB+3gbw0w/bFcmxknvQMsuMHH78dLN2 z8UWjmSEADD5URVKNKYBMIdrVfvOTVPUL1wnikxr2/idXkaPbEsNw39SYhSk/acANyAQnSqNrjt Ntpl07BgYczq9fWp9rjY= X-Google-Smtp-Source: AGHT+IHEnSfe15n9kkeZo+PEMl+EdPMJ2MLBnSq4QrPDPYtKySnpCUirv2IunIYIF/e35wMoHAHsZg== X-Received: by 2002:a05:6000:2b06:b0:391:4f9:a047 with SMTP id ffacd0b85a97d-3911f741393mr383577f8f.17.1741137855549; Tue, 04 Mar 2025 17:24:15 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Daniel Henrique Barboza , =?UTF-8?q?Cl=C3=A9ment=20Chigot?= Subject: [PULL 28/41] hw/char/sifive_uart: Free fifo on unrealize Date: Wed, 5 Mar 2025 02:21:43 +0100 Message-ID: <20250305012157.96463-29-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741137993014019000 From: Alistair Francis We previously allocate the fifo on reset and never free it, which means we are leaking memory. Instead let's allocate on realize and free on unrealize. Signed-off-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Daniel Henrique Barboza Tested-by: Cl=C3=A9ment Chigot Message-ID: <20250303023120.157221-1-alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/char/sifive_uart.c | 44 +++++++++++++++++++++++++++---------------- 1 file changed, 28 insertions(+), 16 deletions(-) diff --git a/hw/char/sifive_uart.c b/hw/char/sifive_uart.c index 4bc5767284b..b45e6c098c4 100644 --- a/hw/char/sifive_uart.c +++ b/hw/char/sifive_uart.c @@ -251,6 +251,23 @@ static int sifive_uart_be_change(void *opaque) return 0; } =20 +static void sifive_uart_reset_enter(Object *obj, ResetType type) +{ + SiFiveUARTState *s =3D SIFIVE_UART(obj); + + s->txfifo =3D 0; + s->ie =3D 0; + s->ip =3D 0; + s->txctrl =3D 0; + s->rxctrl =3D 0; + s->div =3D 0; + + s->rx_fifo_len =3D 0; + + memset(s->rx_fifo, 0, SIFIVE_UART_RX_FIFO_SIZE); + fifo8_reset(&s->tx_fifo); +} + static const Property sifive_uart_properties[] =3D { DEFINE_PROP_CHR("chardev", SiFiveUARTState, chr), }; @@ -270,30 +287,24 @@ static void sifive_uart_realize(DeviceState *dev, Err= or **errp) { SiFiveUARTState *s =3D SIFIVE_UART(dev); =20 + fifo8_create(&s->tx_fifo, SIFIVE_UART_TX_FIFO_SIZE); + s->fifo_trigger_handle =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, fifo_trigger_update, s); =20 - qemu_chr_fe_set_handlers(&s->chr, sifive_uart_can_rx, sifive_uart_rx, - sifive_uart_event, sifive_uart_be_change, s, - NULL, true); + if (qemu_chr_fe_backend_connected(&s->chr)) { + qemu_chr_fe_set_handlers(&s->chr, sifive_uart_can_rx, sifive_uart_= rx, + sifive_uart_event, sifive_uart_be_change,= s, + NULL, true); + } =20 } =20 -static void sifive_uart_reset_enter(Object *obj, ResetType type) +static void sifive_uart_unrealize(DeviceState *dev) { - SiFiveUARTState *s =3D SIFIVE_UART(obj); + SiFiveUARTState *s =3D SIFIVE_UART(dev); =20 - s->txfifo =3D 0; - s->ie =3D 0; - s->ip =3D 0; - s->txctrl =3D 0; - s->rxctrl =3D 0; - s->div =3D 0; - - s->rx_fifo_len =3D 0; - - memset(s->rx_fifo, 0, SIFIVE_UART_RX_FIFO_SIZE); - fifo8_create(&s->tx_fifo, SIFIVE_UART_TX_FIFO_SIZE); + fifo8_destroy(&s->tx_fifo); } =20 static void sifive_uart_reset_hold(Object *obj, ResetType type) @@ -329,6 +340,7 @@ static void sifive_uart_class_init(ObjectClass *oc, voi= d *data) ResettableClass *rc =3D RESETTABLE_CLASS(oc); =20 dc->realize =3D sifive_uart_realize; + dc->unrealize =3D sifive_uart_unrealize; dc->vmsd =3D &vmstate_sifive_uart; rc->phases.enter =3D sifive_uart_reset_enter; rc->phases.hold =3D sifive_uart_reset_hold; --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138322; cv=none; d=zohomail.com; s=zohoarc; b=nK9lHEdNUK7azLKR9m9qlaW9Hcink91+LxhiyC3umIlNBOV5n9/I8cn3vGdX3j8doBRDM5de/+0yIatKbQvcZHJz5ftkmCo8TRVdJaOu/BdsTgoo4MdJ41KzDjDrgCWb6nijtE6jQAlmuMzQJiR5c97HHze5/utJzsPidsfkr/M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138322; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=xAGfCuU3Kbhb9h0Vekx8SOe9ZIxHfI7sjhoEbEJI7Ok=; b=fJtebQ8hSLKKSk98LX6+iYrPOF1McrE6uPRJ89uLcLsk5/U0oOGRH/33Ko4PzwC7+834UNvyiufBLYqYMfRnhWJS+EyLdl16F6Zdphr4De5vjT2as8Z84qr2dIqz1QU7VWCp0JRKDL8uGuLSRl79XSnq/RlVmny6NMR9/SSdrZQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138321791775.0216123414294; Tue, 4 Mar 2025 17:32:01 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdWd-0005be-SD; Tue, 04 Mar 2025 20:26:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdUo-0002yk-3f for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:27 -0500 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdUk-0007EN-4K for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:24 -0500 Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-43bd03ed604so6218155e9.2 for ; Tue, 04 Mar 2025 17:24:21 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e485d773sm19173652f8f.81.2025.03.04.17.24.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:24:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137860; x=1741742660; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xAGfCuU3Kbhb9h0Vekx8SOe9ZIxHfI7sjhoEbEJI7Ok=; b=hubTVO4R2p4r1S8gLTr3+QZlWXp5e8Oopx8eAOfNG7BWMlOy8WmoCLwX1vuy25cYNC Ky3Gq2uBYX2LNhJ6BkBpYoCIozd3Q56YPj5uL4dwevhUvIXbOiG1ugkWo/XarqwCS4G3 2wbg+WnitPfFlMKAM5/NcAmDPiCBjBiOiQcdUgLybzPXMioou4qCepDPH5yZTKTOS6Tv GF9oK12jCmgpCj/7n6vlP7zO33/tSekZDpnohGC89VN97X+b4vrcbvDJBFcWsnhWf9G0 oFZte12l6EACbw62RfAuCt1S2wBkWfqJmYjvM/cG3ZFgrti4Hk4oTL6HGa0+znDYD9g4 p5IQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137860; x=1741742660; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xAGfCuU3Kbhb9h0Vekx8SOe9ZIxHfI7sjhoEbEJI7Ok=; b=e5NlyD7rnfAoo5S80kKYaNNnEEqssGwcf+p90zQG61vwd2epSierzMEzts2i7FtNiw 3k0czleK6+OQdGdE8Q/ihmxsikwaODi950d1lkabbajIqH/w0lWnegBDqJZMTnmiHjM1 gwXfYPeZZ6Q3GfqUaUy4NelXg44HXz2RbS3ms2u7wX3S7HOuFY0hU1eNMKWWQXFAmdov 2Jsvas1Uk7UK9/iOVbTX3fYFnoDdaF+eOTyFwj7yJG5zCz1dln5tPFnk0Kv0gnGzZoxA XRiePZSHAQLelggHVTtKF+OGmj62FxM2XhuyDBPCyg3dfN9MDMkE70W+G+a3kdg0QTVF 3SFA== X-Gm-Message-State: AOJu0YzT7APCHsUHxp880nuZvvVY0C5AcVkSiEg2n3bWv52ntgc+Yznk HbBT2E4/yVxGqJ4ygQ1SpVW3nKSYfPlCpTf2Lq9VA4r+peD12oX/G7O2xegtKNq/M86EmUmomo0 Y9Yw= X-Gm-Gg: ASbGncsmZiqt973V1q7jImXMGpc7zsgMPGYThsNtAQMv+xUt4PluG2MnGDA2TZS5qaf 0d4kxL5txBYbPNF6nQNxlLIT/wuV1ifpovKUX2YNvKQ9DAjQ+sL4J8HiQR46iGnZqlVJn9taPjm QP+1WzXStJcFfMxpCc83Ly4ho0IwILXSnHWY+8I1uKXvpEoyyB2wPb6Byauba//eCnhloMZyaUU 8HM4v4XHP7AOJCZFHv945EXELHbE+qqnJu2yPU0uShm86nxxi5xwkQ8EK35K/Hed3pPwAgeA0P3 ifHXqMy1ktU5tIZPqQzMeLhtR3zLg9Xq+sSlGFmaKwNki5wEsSGikaiVejwmR5UVRGkA3dDbu3O wk8urbnlWHj44StXX2LI= X-Google-Smtp-Source: AGHT+IEeaMdkz+OCDDar26RrJDW6XKvyYLGDFccIYNMjGIaCbM++RD13r2zkzb8ETUGgc67yotR0IA== X-Received: by 2002:a05:6000:4025:b0:390:f6aa:4e6f with SMTP id ffacd0b85a97d-3911f714de9mr847057f8f.10.1741137860151; Tue, 04 Mar 2025 17:24:20 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: BALATON Zoltan , Mark Cave-Ayland , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 29/41] hw/misc/macio: Improve trace logs Date: Wed, 5 Mar 2025 02:21:44 +0100 Message-ID: <20250305012157.96463-30-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741138323913019100 From: BALATON Zoltan Add macio_gpio_read trace event and use that in macio_gpio_read() instead of macio_gpio_write. Also change log message to match macio_timer_{read,write}. Signed-off-by: BALATON Zoltan Reviewed-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20250222122850.9D8B84E603D@zero.eik.bme.hu> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/misc/macio/gpio.c | 2 +- hw/misc/macio/trace-events | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/misc/macio/gpio.c b/hw/misc/macio/gpio.c index 7cad62819a0..4364afc84af 100644 --- a/hw/misc/macio/gpio.c +++ b/hw/misc/macio/gpio.c @@ -135,7 +135,7 @@ static uint64_t macio_gpio_read(void *opaque, hwaddr ad= dr, unsigned size) } } =20 - trace_macio_gpio_write(addr, val); + trace_macio_gpio_read(addr, val); return val; } =20 diff --git a/hw/misc/macio/trace-events b/hw/misc/macio/trace-events index ad4b9d1c08e..055a407aebb 100644 --- a/hw/misc/macio/trace-events +++ b/hw/misc/macio/trace-events @@ -18,7 +18,8 @@ macio_timer_read(uint64_t addr, unsigned len, uint32_t va= l) "read addr 0x%"PRIx6 macio_set_gpio(int gpio, bool state) "setting GPIO %d to %d" macio_gpio_irq_assert(int gpio) "asserting GPIO %d" macio_gpio_irq_deassert(int gpio) "deasserting GPIO %d" -macio_gpio_write(uint64_t addr, uint64_t val) "addr: 0x%"PRIx64" value: 0x= %"PRIx64 +macio_gpio_write(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PR= Ix64 +macio_gpio_read(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRI= x64 =20 # pmu.c pmu_adb_poll(int olen) "ADB autopoll, olen=3D%d" --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138527; cv=none; d=zohomail.com; s=zohoarc; b=REP831+V5dTW5FZ7QOIObMYZ2NDxOKY6+OO9fJsQqYNOHBUuzfux6Q/3pz6/b7RwV9REzS/GtDyXKkhaWCKpNO0lM547YXMLAhlNyBJVdr3D/L/F595GI5P3La6pIq01LLwwOsqbFH2NWI+ZXvZxSzrdDUtG3cdy48542UQ1S1w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138527; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=G+D8Q/imAfZSFEdzdeEp7YKtJwoNb8wSIJ5VcE+KtEw=; b=D0+GfxiEasNfnNMtR/+4aweVhzZjBuzAKAou3KP1cmYWJ68j5Jyt9FTulL5PvuSu+0ftv8g9vW8TIj01GtEWo2q4e72h8dqaY+vUh8KjYp+MqWgqSrlEO7WhUwf73k5mklfl673KyXXQmB7/nw6rCqk3rQc7yqJHw691rQLdCcg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138527706202.32536545084713; Tue, 4 Mar 2025 17:35:27 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdX0-0007Qk-SQ; Tue, 04 Mar 2025 20:26:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdUs-0003I7-En for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:32 -0500 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdUp-0007FL-9Z for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:29 -0500 Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-38dcac27bcbso214315f8f.0 for ; Tue, 04 Mar 2025 17:24:26 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e4844514sm19327572f8f.76.2025.03.04.17.24.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:24:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137865; x=1741742665; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=G+D8Q/imAfZSFEdzdeEp7YKtJwoNb8wSIJ5VcE+KtEw=; b=ObWajPzYb8NyjiQGt9bWgVN8PMi27kjctpKp/t9Ba9KwNfhp2OGg5giStA9BHmfJ4b DGaEBcZp6LEZOYqc3TEXrgnRDrRvNFA8oQVlLov0ykpymivFSy3WVXFopsbxPWiu75Ne MrKUTVoielG5rcb6JLX9+PDLLUF7DxhpBb38H5wCYR68Mx0dq978sEds+kV7HRsf8L0o 69lCVY+hVilsJ5tAAwqe3b+o9/mJ2HLTpCMzW7wPtt7ucmKo7WhmwBvqknvzrrRQNGDc xkGDZ8/BBkh8RO0VGf6ASI4MCthLafF9lkUlNgrUYf+XFwkpAYSlAXbVmaVX3geNZ0cX 7uBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137865; x=1741742665; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=G+D8Q/imAfZSFEdzdeEp7YKtJwoNb8wSIJ5VcE+KtEw=; b=jptaVwxmMojk8sOih4uONbDTPnjKcYqAF7vModdn9UAGISBVTBrzvPAwRUNzzBHFBt iOsHMRdYsT+Rn9hxxT7XLrF8nDENncIRhkZ5GaV/tQsUi5nZpv31RWBE8txYlQxZ0FIR Qunov5HHdbO0qrL1i70Yn/HqwKPWqjASMxuGrRmbrEkrXwW4ydy+0xAY0juHv3nI23Em ZF1VXz4KfmZYkQbMGCqAi1lbgZ0wPHNLbiOAUqd2y8xlM7t63EjueF8swaAGh6HFWhxb /sJSjArqp3smiLcyu/LeDb+ZlZVuxKYam+OSTV1ZNPeJz47QAXn72R1xwf+z4zDYyhPm vDqw== X-Gm-Message-State: AOJu0Yx3JrL6h4PCCLvSTmSSz25PBDmeNqaEXKu42LRjygzc3RcdQjn4 /I1db25qaL3vHWtGeYLR3U3Rt0/XCefPxMQQdVrfiOZHO2AomvNjq49fKECTFLFyvMb1scS1zvZ CwNI= X-Gm-Gg: ASbGncvbyluZMsThh/HyLj01svkQuFfAz/kg08DbHG21xq58oCJcIt3XpaexTF8Kx/z iOG/dwHm+Buv80oxi5mIXhJ7/Ygyb7BpOydBWhOWDE1nIIGBgYOmOT0kV4KQJtWYN1LaiQa53vl WsgiS5lhWjT5D/bSZS8xCanqT83dne3wO/z9zjCBRdIT/gPw/ToZc6w+xPQI+hrcJTefj3lCM8I uZkGqzfdRMti/Oi0LZvxcEj/oso0+kZ7fswqX8mFyEzUWpNOHaBtJLBUXq2SBBxPzPuM/eagfw+ D2vSNFnzf3gnq7et82BZhoS4jGoHCkfUKMhrXqlkRD3UiFKNjjIptGqYgM8NGoTQGCb9M4Yz645 J6QLOGutyKkbAtF3RBCo= X-Google-Smtp-Source: AGHT+IHc1/Te3utdhIsd+vjEaXcSmQGoITPS4ZJrrV/K6IAt3ScpXxEGd2yh7cFTDUJct+syxt3hkA== X-Received: by 2002:a5d:5848:0:b0:390:ef45:1a36 with SMTP id ffacd0b85a97d-3911ea413a4mr867739f8f.19.1741137865454; Tue, 04 Mar 2025 17:24:25 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: BALATON Zoltan , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Mark Cave-Ayland Subject: [PULL 30/41] hw/misc/macio/gpio: Add constants for register bits Date: Wed, 5 Mar 2025 02:21:45 +0100 Message-ID: <20250305012157.96463-31-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741138528525019100 From: BALATON Zoltan Add named constants for register bit values that should make it easier to understand what these mean. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Mark Cave-Ayland Message-ID: <20250224141026.3B36C4E6010@zero.eik.bme.hu> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/misc/macio/gpio.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/hw/misc/macio/gpio.c b/hw/misc/macio/gpio.c index 4364afc84af..e87bfca1f5d 100644 --- a/hw/misc/macio/gpio.c +++ b/hw/misc/macio/gpio.c @@ -34,6 +34,11 @@ #include "qemu/module.h" #include "trace.h" =20 +enum MacioGPIORegisterBits { + OUT_DATA =3D 1, + IN_DATA =3D 2, + OUT_ENABLE =3D 4, +}; =20 void macio_set_gpio(MacIOGPIOState *s, uint32_t gpio, bool state) { @@ -41,14 +46,14 @@ void macio_set_gpio(MacIOGPIOState *s, uint32_t gpio, b= ool state) =20 trace_macio_set_gpio(gpio, state); =20 - if (s->gpio_regs[gpio] & 4) { + if (s->gpio_regs[gpio] & OUT_ENABLE) { qemu_log_mask(LOG_GUEST_ERROR, "GPIO: Setting GPIO %d while it's an output\n", gpio= ); } =20 - new_reg =3D s->gpio_regs[gpio] & ~2; + new_reg =3D s->gpio_regs[gpio] & ~IN_DATA; if (state) { - new_reg |=3D 2; + new_reg |=3D IN_DATA; } =20 if (new_reg =3D=3D s->gpio_regs[gpio]) { @@ -107,12 +112,12 @@ static void macio_gpio_write(void *opaque, hwaddr add= r, uint64_t value, =20 addr -=3D 8; if (addr < 36) { - value &=3D ~2; + value &=3D ~IN_DATA; =20 - if (value & 4) { - ibit =3D (value & 1) << 1; + if (value & OUT_ENABLE) { + ibit =3D (value & OUT_DATA) << 1; } else { - ibit =3D s->gpio_regs[addr] & 2; + ibit =3D s->gpio_regs[addr] & IN_DATA; } =20 s->gpio_regs[addr] =3D value | ibit; --=20 2.47.1 From nobody Thu Apr 3 02:26:16 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138027; cv=none; d=zohomail.com; s=zohoarc; b=JWsR1NeBO4hcn+mLObGH9sRKmFY59JKmQvU4/lWnIJU1vav6BB7sKi9ggUIwO1b+i97tgVI+jSIh1vzmL04Bsz8i9iBrjRMBt2IWiVudpxkDns4Qqye3qNksov4rhUP79E++60bsaSrsvvg3dz9GTH1eu5Cwpk1I7ZYCb8kQFTc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138027; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=RY0hKsg/QJVynR94vVsgSjWfjxRvhr7eQQRJ6wX8nKY=; b=RYZQPS/Yz4putezK19Q2yHYVpzSNHnj176ORzkoreakxlloRdBGCHZ/OnPRtUm71dr/RSvANA8zJcNwPY2Umsd5fSdDgk1+VZVPTVF0jXRkcw+jzaPuOjELkzrZ1wNk/6juIN+niFkFa2xdH1g8OMZzRy77WqfIeCLlpsq3Fe+E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138027458867.028882257698; Tue, 4 Mar 2025 17:27:07 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdWS-0005NL-6T; Tue, 04 Mar 2025 20:26:11 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdUw-0003TG-NE for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:35 -0500 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdUu-0007Fr-9c for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:34 -0500 Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-43bcc85ba13so10408015e9.0 for ; Tue, 04 Mar 2025 17:24:31 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43bd4292f0bsm2017765e9.15.2025.03.04.17.24.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:24:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137870; x=1741742670; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RY0hKsg/QJVynR94vVsgSjWfjxRvhr7eQQRJ6wX8nKY=; b=Se5v9sxm2fB+xC8zyeWd8ccDBxBKzeBSqF8eW/MWWmis0T64YmzhPAf+LTvBleRZS+ WXhlw88rZytSja8kYkvf6NgTv8V7Il7B0BbRQYWtRITP0xj1vUUlWCX3eaurAzsWWwfJ JWl+ovaBHWrqgiE7BrRAH0AxKcmN+2IE/2NTJSZmib8Xl5cog/BIWnuX1N84hYn9WW8d zX197G/PHLr0G/nWZZKXH15K3Mtm4wnRCn4HxCStWle2sUapCnbD9bv6vilLWfNsho16 bHgcj2N0fQ3vIjqOPGQ7lFNpga2oPOLzormisWDb3Mmdi+gKj3i6i0wuwPM5uCQR8S0a K7vw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137870; x=1741742670; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RY0hKsg/QJVynR94vVsgSjWfjxRvhr7eQQRJ6wX8nKY=; b=XHX/d69MtbSHXierSiTeVEqA8V6LxhIzb7ZZT9UpwmsaQS+HLSeC3iM6SRN55hksG3 DU/af6HGdgxEntJNPh3zG0jPRYkxGLc5OmWP91z5HtruzKnNoaXDxW0ePmqkCqjtuPmr mWcbDKh83dbRut4ZMNChvDSQPHnPOtc/aROEF4lu1SPJLOTBrxbMe1wSnGlcUzRnkR8Y iBkIVoN07WVuiQM8aXM4N8QE+nah/jK/5wqJN3nd0DtjXO9lP8l7SXuoAWogmgx5VyOX iC0Zu0faNfNlfNHu+kf7M2OTb4uS3F9kdslw5Bbw8Xe2k1M359klOZJ2s65tjDcR4O79 AdIw== X-Gm-Message-State: AOJu0YxvxgqlVzOmpowjHAA+HFSgsFnpq5ED2eeMnHv1L6QKO2tlGSGm P2anrXZogD+MpI/GOJfaSAd0CFHX3Skbxji0tKFmA6g244s7napSmAM/LG+BG9TfjVK6oXSqz25 GigQ= X-Gm-Gg: ASbGnctcMVVyeRMU3ZZGqXL42ATR76NbyTtGcx9x56MiUxgpL7m/BmA7PfWLP6i8ydo XhKBRQJyA/7h2oyXwEYeCYtbZKLt7iNJQuymF/aK9lQtoRV3kd6wrSWsHlxaXQqIrxGZYPnAGks r3/x1fgzLT62My4MJ65J+AwTo4CwbzTtRySCoSbcUntpDlrAbG6vYMYWk0Rn2y8LTpiQzMEa8R8 PFnxbQIqN1VLb3ynXoH4Wvvl4hWYFLNvjGgqp3khg6Dg0oh8aAiEGa9jDWvbIhzUeI3S17K+ieZ YXH+ZZGY7a9kZs6B3O2pqnBk7mSNoce4K3D0zy2VK1B+PeEqT4zf+gswyaTSknt9+vRFRb281UP MCfl+IUNOOaAwn90NHNg= X-Google-Smtp-Source: AGHT+IG4TPGTMCx/Fk1AvYnjkfUvZoq89/xbPfL5mXFuC9oLsoJTGArVHEE4IhXlUzCy53wyArbb1Q== X-Received: by 2002:a5d:6da3:0:b0:391:1d5f:4c31 with SMTP id ffacd0b85a97d-3911f757c07mr781615f8f.23.1741137870037; Tue, 04 Mar 2025 17:24:30 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Keoseong Park , Jeuk Kim , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 31/41] hw/ufs: Add temperature event notification support Date: Wed, 5 Mar 2025 02:21:46 +0100 Message-ID: <20250305012157.96463-32-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741138030523019100 From: Keoseong Park This patch introduces temperature event notification support to the UFS emulation. It enables the emulated UFS device to generate temperature-related events, including high and low temperature notifications, in compliance with the UFS specification. With this feature, UFS drivers can now handle temperature exception events during testing and development within the emulated environment. This enhances validation and debugging capabilities for thermal event handling in UFS implementations. Signed-off-by: Keoseong Park Reviewed-by: Jeuk Kim Message-ID: <20250225064146epcms2p50889cb0066e2d4734f2386de325bcdf6@epcms2p= 5> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/ufs/ufs.h | 2 ++ include/block/ufs.h | 13 +++++++- hw/ufs/ufs.c | 78 ++++++++++++++++++++++++++++++++++++++++++++- 3 files changed, 91 insertions(+), 2 deletions(-) diff --git a/hw/ufs/ufs.h b/hw/ufs/ufs.h index 4bcc41f53a0..3799d97f30d 100644 --- a/hw/ufs/ufs.h +++ b/hw/ufs/ufs.h @@ -146,6 +146,8 @@ typedef struct UfsHc { /* MCQ properties */ UfsSq *sq[UFS_MAX_MCQ_QNUM]; UfsCq *cq[UFS_MAX_MCQ_QNUM]; + + uint8_t temperature; } UfsHc; =20 static inline uint32_t ufs_mcq_sq_tail(UfsHc *u, uint32_t qid) diff --git a/include/block/ufs.h b/include/block/ufs.h index 57f5ea3500c..a3ee62b027a 100644 --- a/include/block/ufs.h +++ b/include/block/ufs.h @@ -461,7 +461,7 @@ typedef struct Attributes { uint8_t psa_state; uint32_t psa_data_size; uint8_t ref_clk_gating_wait_time; - uint8_t device_case_rough_temperaure; + uint8_t device_case_rough_temperature; uint8_t device_too_high_temp_boundary; uint8_t device_too_low_temp_boundary; uint8_t throttling_status; @@ -1073,6 +1073,11 @@ enum health_desc_param { UFS_HEALTH_DESC_PARAM_LIFE_TIME_EST_B =3D 0x4, }; =20 +enum { + UFS_DEV_HIGH_TEMP_NOTIF =3D BIT(4), + UFS_DEV_LOW_TEMP_NOTIF =3D BIT(5), +}; + /* WriteBooster buffer mode */ enum { UFS_WB_BUF_MODE_LU_DEDICATED =3D 0x0, @@ -1091,6 +1096,12 @@ enum ufs_lu_wp_type { UFS_LU_PERM_WP =3D 0x02, }; =20 +/* Exception event mask values */ +enum { + MASK_EE_TOO_HIGH_TEMP =3D BIT(3), + MASK_EE_TOO_LOW_TEMP =3D BIT(4), +}; + /* UTP QUERY Transaction Specific Fields OpCode */ enum query_opcode { UFS_UPIU_QUERY_OPCODE_NOP =3D 0x0, diff --git a/hw/ufs/ufs.c b/hw/ufs/ufs.c index 1ccd6f88b69..857de6e9c2c 100644 --- a/hw/ufs/ufs.c +++ b/hw/ufs/ufs.c @@ -34,6 +34,11 @@ #define UFS_MAX_NUTMRS 8 #define UFS_MCQ_QCFGPTR 2 =20 +/* Each value represents the temperature in celsius as (value - 80) */ +#define UFS_TEMPERATURE 120 +#define UFS_TOO_HIGH_TEMP_BOUNDARY 160 +#define UFS_TOO_LOW_TEMP_BOUNDARY 60 + static void ufs_exec_req(UfsRequest *req); static void ufs_clear_req(UfsRequest *req); =20 @@ -838,6 +843,42 @@ static const MemoryRegionOps ufs_mmio_ops =3D { }, }; =20 +static void ufs_update_ee_status(UfsHc *u) +{ + uint16_t ee_status =3D be16_to_cpu(u->attributes.exception_event_statu= s); + uint8_t high_temp_thresh =3D u->attributes.device_too_high_temp_bounda= ry; + uint8_t low_temp_thresh =3D u->attributes.device_too_low_temp_boundary; + + if (u->temperature >=3D high_temp_thresh) { + ee_status |=3D MASK_EE_TOO_HIGH_TEMP; + } else { + ee_status &=3D ~MASK_EE_TOO_HIGH_TEMP; + } + + if (u->temperature <=3D low_temp_thresh) { + ee_status |=3D MASK_EE_TOO_LOW_TEMP; + } else { + ee_status &=3D ~MASK_EE_TOO_LOW_TEMP; + } + + u->attributes.exception_event_status =3D cpu_to_be16(ee_status); +} + +static bool ufs_check_exception_event_alert(UfsHc *u, uint8_t trans_type) +{ + uint16_t ee_control =3D be16_to_cpu(u->attributes.exception_event_cont= rol); + uint16_t ee_status; + + if (trans_type !=3D UFS_UPIU_TRANSACTION_RESPONSE) { + return false; + } + + ufs_update_ee_status(u); + + ee_status =3D be16_to_cpu(u->attributes.exception_event_status); + + return ee_control & ee_status; +} =20 void ufs_build_upiu_header(UfsRequest *req, uint8_t trans_type, uint8_t fl= ags, uint8_t response, uint8_t scsi_status, @@ -848,6 +889,8 @@ void ufs_build_upiu_header(UfsRequest *req, uint8_t tra= ns_type, uint8_t flags, req->rsp_upiu.header.flags =3D flags; req->rsp_upiu.header.response =3D response; req->rsp_upiu.header.scsi_status =3D scsi_status; + req->rsp_upiu.header.device_inf =3D + ufs_check_exception_event_alert(req->hc, trans_type); req->rsp_upiu.header.data_segment_length =3D cpu_to_be16(data_segment_= length); } =20 @@ -1042,6 +1085,25 @@ static QueryRespCode ufs_exec_query_flag(UfsRequest = *req, int op) return UFS_QUERY_RESULT_SUCCESS; } =20 +static inline uint8_t ufs_read_device_temp(UfsHc *u) +{ + uint8_t feat_sup =3D u->device_desc.ufs_features_support; + bool high_temp_sup, low_temp_sup, high_temp_en, low_temp_en; + uint16_t ee_control =3D be16_to_cpu(u->attributes.exception_event_cont= rol); + + high_temp_sup =3D feat_sup & UFS_DEV_HIGH_TEMP_NOTIF; + low_temp_sup =3D feat_sup & UFS_DEV_LOW_TEMP_NOTIF; + high_temp_en =3D ee_control & MASK_EE_TOO_HIGH_TEMP; + low_temp_en =3D ee_control & MASK_EE_TOO_LOW_TEMP; + + if ((high_temp_sup && high_temp_en) || + (low_temp_sup && low_temp_en)) { + return u->temperature; + } + + return 0; +} + static uint32_t ufs_read_attr_value(UfsHc *u, uint8_t idn) { switch (idn) { @@ -1072,6 +1134,7 @@ static uint32_t ufs_read_attr_value(UfsHc *u, uint8_t= idn) case UFS_QUERY_ATTR_IDN_EE_CONTROL: return be16_to_cpu(u->attributes.exception_event_control); case UFS_QUERY_ATTR_IDN_EE_STATUS: + ufs_update_ee_status(u); return be16_to_cpu(u->attributes.exception_event_status); case UFS_QUERY_ATTR_IDN_SECONDS_PASSED: return be32_to_cpu(u->attributes.seconds_passed); @@ -1086,7 +1149,8 @@ static uint32_t ufs_read_attr_value(UfsHc *u, uint8_t= idn) case UFS_QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME: return u->attributes.ref_clk_gating_wait_time; case UFS_QUERY_ATTR_IDN_CASE_ROUGH_TEMP: - return u->attributes.device_case_rough_temperaure; + u->attributes.device_case_rough_temperature =3D ufs_read_device_te= mp(u); + return u->attributes.device_case_rough_temperature; case UFS_QUERY_ATTR_IDN_HIGH_TEMP_BOUND: return u->attributes.device_too_high_temp_boundary; case UFS_QUERY_ATTR_IDN_LOW_TEMP_BOUND: @@ -1677,8 +1741,12 @@ static void ufs_init_hc(UfsHc *u) u->device_desc.ud_0_base_offset =3D 0x16; u->device_desc.ud_config_p_length =3D 0x1A; u->device_desc.device_rtt_cap =3D 0x02; + u->device_desc.ufs_features_support =3D UFS_DEV_HIGH_TEMP_NOTIF | + UFS_DEV_LOW_TEMP_NOTIF; u->device_desc.queue_depth =3D u->params.nutrs; u->device_desc.product_revision_level =3D 0x04; + u->device_desc.extended_ufs_features_support =3D + cpu_to_be32(UFS_DEV_HIGH_TEMP_NOTIF | UFS_DEV_LOW_TEMP_NOTIF); =20 memset(&u->geometry_desc, 0, sizeof(GeometryDescriptor)); u->geometry_desc.length =3D sizeof(GeometryDescriptor); @@ -1702,9 +1770,17 @@ static void ufs_init_hc(UfsHc *u) /* configure descriptor is not supported */ u->attributes.config_descr_lock =3D 0x01; u->attributes.max_num_of_rtt =3D 0x02; + u->attributes.device_too_high_temp_boundary =3D UFS_TOO_HIGH_TEMP_BOUN= DARY; + u->attributes.device_too_low_temp_boundary =3D UFS_TOO_LOW_TEMP_BOUNDA= RY; =20 memset(&u->flags, 0, sizeof(u->flags)); u->flags.permanently_disable_fw_update =3D 1; + + /* + * The temperature value is fixed to UFS_TEMPERATURE and does not chan= ge + * dynamically + */ + u->temperature =3D UFS_TEMPERATURE; } =20 static void ufs_realize(PCIDevice *pci_dev, Error **errp) --=20 2.47.1 From nobody Thu Apr 3 02:26:17 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138512; cv=none; d=zohomail.com; s=zohoarc; b=Qa0g1DVANeRkRrsTcxpqJfYQlM6GyQbJZZAD2zUj02IZTE69TCbJNbwyxnCvI+PBL/W0789Uv7F6jJsGDLl7q84mkEf6zJ3C5MZxOFCCsweCVrC3KwJYBQPCC0dnZ49qOy+faX7eMVtiYVDMKWsssKFm6sRIQ4PE/0pwu93UoeI= ARC-Message-Signature: i=1; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e4795983sm19152823f8f.6.2025.03.04.17.24.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:24:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137874; x=1741742674; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1mWnfHltEj6tHRnPRGRMEHYizLDHaaGta9SL21+nd1o=; b=hc/LkIRUATJSRI49wJ2RBhflEIAKYAB7myCjrhabHKx/Uw4g5TX9DGd/uQeC3oWcJz 3u+OQsEo9lycpw+1R+0nbExp+dbeHHNnPMQZWioAgBTvN3SUgQNq47uqpW7QZN7ez31w plMZuWtQkCorpCotRyKJXGtq1cmRl+sGIj+DdueaQzMvFflIFnrpXTY0nRuy/Q17Jb9R w1aLfR7SvHdjEjq8Vju/B3FiQlQGL0zpbQcf36w5W0QlVnJ39wU8Sj9YgChV96c2Ibdw /XANeIw8OitxcRywjUdnA7Dd2BLz47dE0nO67+HNmXsN39TlVl2qvQRa4CqDjFiRnTAo 2spA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137874; x=1741742674; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1mWnfHltEj6tHRnPRGRMEHYizLDHaaGta9SL21+nd1o=; b=kF1LseIIktEfLe8eHWJgrmR717O2XaAI0qLadOxiCbsV5pyiTAHuDrcsl/zNNEA+dh 1g87pnBrk58Eai49n+Ck1pb132Mro8aUSKOLjqna6npADAhIQ0wkj+L8Fv9yFa6V+lqL fzfXO8vjqc4zuBbDGkf1nVKNCQ3tbGLC3qEGyxKgN3X2PnWvWGgTd+J0dlfwxMGnkyEx mXkERBm10FI1QRLrGAUnujUa3I1FfpKkbf9RJUT9PbZc7xdSZr6bwUnhWZWjRU6Ew8xs ysyF3LkbLTOwENLniMElSwjmRODYKSSVbxONRsd09sfToQK+uwA/xa1qkPlI/5QrwyHl fe1w== X-Gm-Message-State: AOJu0YweaJUAfBCWd2a3NlrKkT6oYp34sntAFO4flwWZ3/A515c7QrpB 1NC5rBeGOGKvslUpz/juRhhg67lMxTe4HgGCEG6ELPl0tWgVIWfcU8l/rxxsCgDuwnqJhaTjZUD vVwo= X-Gm-Gg: ASbGncu1J0LD2uihG/yH3oM/mNkqLkW72dCk9D8+g+fWqSk94KpgMdwQcspXw4/DXRY osWDXWMDKln12Qa4haDkWzX+SlH7Rk+TSYmPa5rFKq7EJTHg+ni1hOy+sRBybnbmfvN3LxP6+ai 7ow1JpplNJFuBenf1ZCIsvNEz2G2yDYwRv3FB5+S4hVTjRCnq1c1K/hCs5YQ2suzW5NOT2seC8a 56Jff0+Qcn025trtArQv4c5pa0hEUHjhMrjRNqUlyjqSjyVlmUFngA+GUTYGpuoxyOQkJEZaUaA htOhyXLaUyL+WRDONDb7O7qoH7WQZCgwbL+VJRY0A8zL/A1ZH9VCf6AuMecW/6dSOszWSlbTfRJ c9LjF1lhwgoRyIdBNqKM= X-Google-Smtp-Source: AGHT+IFD3pgOlhis6f0S3UKzIuGTZWgOG/uOLqazzWAzAiVz/aQlZPTA3PivA+kPSv2VnG0oHSTbig== X-Received: by 2002:a5d:56c7:0:b0:390:f55b:baa4 with SMTP id ffacd0b85a97d-3911f7c3383mr449324f8f.42.1741137874653; Tue, 04 Mar 2025 17:24:34 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Keoseong Park , Fabiano Rosas , Jeuk Kim , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 32/41] tests/qtest/ufs-test: Add test code for the temperature feature Date: Wed, 5 Mar 2025 02:21:47 +0100 Message-ID: <20250305012157.96463-33-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741138512757019000 From: Keoseong Park This commit adds tests to verify the correctness of query attribute results related to the temperature feature. It ensures that querying temperature attributes returns expected values. Signed-off-by: Keoseong Park Acked-by: Fabiano Rosas Reviewed-by: Jeuk Kim Message-ID: <20250225064243epcms2p8b7b59e7bf381bd68d30a6f59b40dea9f@epcms2p= 8> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- tests/qtest/ufs-test.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/tests/qtest/ufs-test.c b/tests/qtest/ufs-test.c index d5076bdeb54..4867ccf08a1 100644 --- a/tests/qtest/ufs-test.c +++ b/tests/qtest/ufs-test.c @@ -784,6 +784,30 @@ static void ufstest_query_attr_request(void *obj, void= *data, g_assert_cmpuint(rsp_upiu.header.response, =3D=3D, UFS_COMMAND_RESULT_= SUCCESS); g_assert_cmpuint(rsp_upiu.qr.value, =3D=3D, cpu_to_be32(0x00)); =20 + ocs =3D ufs_send_query(ufs, UFS_UPIU_QUERY_FUNC_STANDARD_READ_REQUEST, + UFS_UPIU_QUERY_OPCODE_READ_ATTR, + UFS_QUERY_ATTR_IDN_CASE_ROUGH_TEMP, 0, 0, 0, + &rsp_upiu); + g_assert_cmpuint(ocs, =3D=3D, UFS_OCS_SUCCESS); + g_assert_cmpuint(rsp_upiu.header.response, =3D=3D, UFS_COMMAND_RESULT_= SUCCESS); + g_assert_cmpuint(rsp_upiu.qr.value, =3D=3D, cpu_to_be32(0x00)); + + ocs =3D ufs_send_query(ufs, UFS_UPIU_QUERY_FUNC_STANDARD_READ_REQUEST, + UFS_UPIU_QUERY_OPCODE_READ_ATTR, + UFS_QUERY_ATTR_IDN_HIGH_TEMP_BOUND, 0, 0, 0, + &rsp_upiu); + g_assert_cmpuint(ocs, =3D=3D, UFS_OCS_SUCCESS); + g_assert_cmpuint(rsp_upiu.header.response, =3D=3D, UFS_COMMAND_RESULT_= SUCCESS); + g_assert_cmpuint(rsp_upiu.qr.value, =3D=3D, cpu_to_be32(160)); + + ocs =3D ufs_send_query(ufs, UFS_UPIU_QUERY_FUNC_STANDARD_READ_REQUEST, + UFS_UPIU_QUERY_OPCODE_READ_ATTR, + UFS_QUERY_ATTR_IDN_LOW_TEMP_BOUND, 0, 0, 0, + &rsp_upiu); + g_assert_cmpuint(ocs, =3D=3D, UFS_OCS_SUCCESS); + g_assert_cmpuint(rsp_upiu.header.response, =3D=3D, UFS_COMMAND_RESULT_= SUCCESS); + g_assert_cmpuint(rsp_upiu.qr.value, =3D=3D, cpu_to_be32(60)); + /* Write Writable Attributes & Read Again */ ocs =3D ufs_send_query(ufs, UFS_UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST, UFS_UPIU_QUERY_OPCODE_WRITE_ATTR, --=20 2.47.1 From nobody Thu Apr 3 02:26:17 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138161; cv=none; d=zohomail.com; s=zohoarc; b=Y2RpU1Z0prlLy151u+CaeAcB8MPLvmktHCuYc3VyM5xuO4FBWVe/EQZiGO0Bh2xuq2ZXS5qdbzWhB74IFTLhUhfn0Epb4jhPzTlF7xbO71FQVSxy8a9hskqashb74QNhfUpZCh2yBeszkqtKWpqWIrttDyixuzdPmLDksS6ClNg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138161; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=uSWq8OG1UJ3+TSUQoJxemZJrVqGEUCcwykT7a0JIQRg=; b=PWpSazzKCZNpzoENN/qjCpmXd4ekdX3hAuA6UhOK34pacI0OOXysKW/H2tp95LUgvY+3njD/SSBdKyr5VIPoC5cc278qHxlhaGErg5Dp98mDEmKZrvP3gdpUTSeQJCoP8Yr4DIUd1x0pJ18kaiw6WAIm0UBZjyo3Wg9eU9jKtm0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138161004863.1429941892487; Tue, 4 Mar 2025 17:29:21 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdX3-0007kd-Qc; Tue, 04 Mar 2025 20:26:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdV5-00047S-Sp for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:47 -0500 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdV3-0007HI-Qw for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:24:43 -0500 Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-390cf7458f5so5799657f8f.2 for ; Tue, 04 Mar 2025 17:24:41 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43bd4292144sm2027895e9.13.2025.03.04.17.24.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:24:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137880; x=1741742680; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uSWq8OG1UJ3+TSUQoJxemZJrVqGEUCcwykT7a0JIQRg=; b=WFxCohIRaRdVAQHNJBEeEMHs8j2N1qAySc2y1z9aOAstpHGcQZtL3Ju+B/gQ+NRYLr GEh5dttlhtSX+jV2hA6j+B9s8U3hv28+jyNU9DIJlctiOJxchbRkwWGuSneZNcVuikij hJ9ih8lvYtKUJtibiwCg2avBYctzfJ2ssZfGrnxQpEP71Jxd0gIoPGigJl2Bvk7O44zJ 3QoWSmhWksqGsaiSm8+IPfaeakaG7EMdi/prGEouDUqF9UnqWJMzxkAtBtHcZtVRhdRQ W4D9KAHLd6hHtkS8BtQi2m0OBZv0iI5Y5a49mO4B55zUIzHG3sKhyRLL3LMmaWwDdpEg Zx0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137880; x=1741742680; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uSWq8OG1UJ3+TSUQoJxemZJrVqGEUCcwykT7a0JIQRg=; b=CdTXGn4FUdaWsPSkNyWyt5UKDFWWWCzqTrdsN59eDsG5Uh8aVrt1mNHhEfnUEzfYIg J7w59huGS962/TvffIMJGe5JbN7c7WedxdCKOxikSG2NBfSfU3VyTHA02R1bKNkMWJTg HgzYbYIH9QZ+AVAzm4LHy7Fyyoh79ZHiX3pRRom6ZH18wOmhSn31dYH8UGSKYsxNkpSz n9TONh7FFCiJuofSIQq6vw0PdABFUc0dZjVgo36mYlR9JfHrrkGG6n5n5qkmM6L176X3 dFV4iaKcCoUO4I/rwFAepsU+letV5zIJP+2YbO6suKc9IL7im5PWG8sn60Ctz4YFbZi3 nFxg== X-Gm-Message-State: AOJu0Yx/lfLozwPS/KV7WqpPBQr8TN0ipy45nlS2jaXaLCH0t42J9ih1 XqIm+eZSYiwnqADyoRK8U4KF4O6stjWZCAOosNstasN4nnEtrrjkwKDE7BHI4mCXeifztvcG8N6 RMYk= X-Gm-Gg: ASbGnctbIuExWCa0EDWLuxyzJ704zHNJ0v2f4H8gTbRbIauhhRmmuAbmBavdXd/TtCR Uji+/v1B9aSsnka/zSj4+Vc4zHFnED+xngZYYuw6RK1Nh9eDHhqrBJR/MNiUt7s/aa8aAFwQsIc 4YLede25j132zSH8CpueJmv+LmjkNkoe9Pvij8MRYXkZGXIiceP4YnZtghzEUVXLXXv4x8p8oQ5 LQtNP+KWXlleTSjjnhuP+ldaRkmOIy/6leqY9FKm7gb7m/HqqSwa8V8Ux1t05w1pRwZ9f8tWjgw gDMtZrWlpOnBZl15lduky88x+1BZmGOAZHN3oUtdgYoelqqjb6rg2Hu46d2TUjy8b17ib4rQo2Q MXX6dKi7UXkiEW59vCmI= X-Google-Smtp-Source: AGHT+IFBGJZqSVCmDqv59QnAKo6/f3VyL+ZmoFRmoxKd1kQoPqqYdDRJilPCcFXmWJSxHVhZ6OJhwA== X-Received: by 2002:a05:6000:401f:b0:391:4f9:a048 with SMTP id ffacd0b85a97d-3911f724a16mr570929f8f.4.1741137879989; Tue, 04 Mar 2025 17:24:39 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Peter Maydell , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 33/41] hw/arm/omap1: Convert raw printfs to qemu_log_mask() Date: Wed, 5 Mar 2025 02:21:48 +0100 Message-ID: <20250305012157.96463-34-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741138162650019100 From: Peter Maydell omap1.c is very old code, and it contains numerous calls direct to printf() for various error and information cases. In this commit, convert the printf() calls that are for either guest error or unimplemented functionality to qemu_log_mask() calls. This leaves the printf() calls that are informative or which are ifdeffed-out debug statements untouched. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20250227170117.1726895-2-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/omap1.c | 48 +++++++++++++++++++++++++++++++----------------- 1 file changed, 31 insertions(+), 17 deletions(-) diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index ca2eb0d1576..3c0ce5e0979 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -2559,8 +2559,9 @@ static void omap_rtc_interrupts_update(struct omap_rt= c_s *s) static void omap_rtc_alarm_update(struct omap_rtc_s *s) { s->alarm_ti =3D mktimegm(&s->alarm_tm); - if (s->alarm_ti =3D=3D -1) - printf("%s: conversion failed\n", __func__); + if (s->alarm_ti =3D=3D -1) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: conversion failed\n", __func__= ); + } } =20 static uint64_t omap_rtc_read(void *opaque, hwaddr addr, unsigned size) @@ -3024,8 +3025,9 @@ static void omap_mcbsp_source_tick(void *opaque) =20 if (!s->rx_rate) return; - if (s->rx_req) - printf("%s: Rx FIFO overrun\n", __func__); + if (s->rx_req) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: Rx FIFO overrun\n", __func__); + } =20 s->rx_req =3D s->rx_rate << bps[(s->rcr[0] >> 5) & 7]; =20 @@ -3070,8 +3072,9 @@ static void omap_mcbsp_sink_tick(void *opaque) =20 if (!s->tx_rate) return; - if (s->tx_req) - printf("%s: Tx FIFO underrun\n", __func__); + if (s->tx_req) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: Tx FIFO underrun\n", __func__); + } =20 s->tx_req =3D s->tx_rate << bps[(s->xcr[0] >> 5) & 7]; =20 @@ -3173,7 +3176,7 @@ static uint64_t omap_mcbsp_read(void *opaque, hwaddr = addr, /* Fall through. */ case 0x02: /* DRR1 */ if (s->rx_req < 2) { - printf("%s: Rx FIFO underrun\n", __func__); + qemu_log_mask(LOG_GUEST_ERROR, "%s: Rx FIFO underrun\n", __fun= c__); omap_mcbsp_rx_done(s); } else { s->tx_req -=3D 2; @@ -3278,8 +3281,9 @@ static void omap_mcbsp_writeh(void *opaque, hwaddr ad= dr, } if (s->tx_req < 2) omap_mcbsp_tx_done(s); - } else - printf("%s: Tx FIFO overrun\n", __func__); + } else { + qemu_log_mask(LOG_GUEST_ERROR, "%s: Tx FIFO overrun\n", __func= __); + } return; =20 case 0x08: /* SPCR2 */ @@ -3293,8 +3297,11 @@ static void omap_mcbsp_writeh(void *opaque, hwaddr a= ddr, case 0x0a: /* SPCR1 */ s->spcr[0] &=3D 0x0006; s->spcr[0] |=3D 0xf8f9 & value; - if (value & (1 << 15)) /* DLB */ - printf("%s: Digital Loopback mode enable attempt\n", __func__); + if (value & (1 << 15)) { /* DLB */ + qemu_log_mask(LOG_UNIMP, + "%s: Digital Loopback mode enable attempt\n", + __func__); + } if (~value & 1) { /* RRST */ s->spcr[0] &=3D ~6; s->rx_req =3D 0; @@ -3325,13 +3332,19 @@ static void omap_mcbsp_writeh(void *opaque, hwaddr = addr, return; case 0x18: /* MCR2 */ s->mcr[1] =3D value & 0x03e3; - if (value & 3) /* XMCM */ - printf("%s: Tx channel selection mode enable attempt\n", __fun= c__); + if (value & 3) { /* XMCM */ + qemu_log_mask(LOG_UNIMP, + "%s: Tx channel selection mode enable attempt\n", + __func__); + } return; case 0x1a: /* MCR1 */ s->mcr[0] =3D value & 0x03e1; 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ALMDEBUG is never set, so this is all dead code. It's not worth the effort of converting all of these to tracepoints; a modern tracepoint approach would probably have a single tracepoint covering all the register writes anyway. Just delete the printf()s. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20250227170117.1726895-3-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/omap1.c | 51 -------------------------------------------------- 1 file changed, 51 deletions(-) diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 3c0ce5e0979..8f5bb81c96a 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -2660,25 +2660,16 @@ static void omap_rtc_write(void *opaque, hwaddr add= r, =20 switch (offset) { case 0x00: /* SECONDS_REG */ -#ifdef ALMDEBUG - printf("RTC SEC_REG <-- %02x\n", value); -#endif s->ti -=3D s->current_tm.tm_sec; s->ti +=3D from_bcd(value); return; =20 case 0x04: /* MINUTES_REG */ -#ifdef ALMDEBUG - printf("RTC MIN_REG <-- %02x\n", value); -#endif s->ti -=3D s->current_tm.tm_min * 60; s->ti +=3D from_bcd(value) * 60; return; =20 case 0x08: /* HOURS_REG */ -#ifdef ALMDEBUG - printf("RTC HRS_REG <-- %02x\n", value); -#endif s->ti -=3D s->current_tm.tm_hour * 3600; if (s->pm_am) { s->ti +=3D (from_bcd(value & 0x3f) & 12) * 3600; @@ -2688,17 +2679,11 @@ static void omap_rtc_write(void *opaque, hwaddr add= r, return; =20 case 0x0c: /* DAYS_REG */ -#ifdef ALMDEBUG - printf("RTC DAY_REG <-- %02x\n", value); -#endif s->ti -=3D s->current_tm.tm_mday * 86400; s->ti +=3D from_bcd(value) * 86400; return; =20 case 0x10: /* MONTHS_REG */ -#ifdef ALMDEBUG - printf("RTC MTH_REG <-- %02x\n", value); -#endif memcpy(&new_tm, &s->current_tm, sizeof(new_tm)); new_tm.tm_mon =3D from_bcd(value); ti[0] =3D mktimegm(&s->current_tm); @@ -2715,9 +2700,6 @@ static void omap_rtc_write(void *opaque, hwaddr addr, return; =20 case 0x14: /* YEARS_REG */ -#ifdef ALMDEBUG - printf("RTC YRS_REG <-- %02x\n", value); -#endif memcpy(&new_tm, &s->current_tm, sizeof(new_tm)); new_tm.tm_year +=3D from_bcd(value) - (new_tm.tm_year % 100); ti[0] =3D mktimegm(&s->current_tm); @@ -2737,25 +2719,16 @@ static void omap_rtc_write(void *opaque, hwaddr add= r, return; /* Ignored */ =20 case 0x20: /* ALARM_SECONDS_REG */ -#ifdef ALMDEBUG - printf("ALM SEC_REG <-- %02x\n", value); -#endif s->alarm_tm.tm_sec =3D from_bcd(value); omap_rtc_alarm_update(s); return; =20 case 0x24: /* ALARM_MINUTES_REG */ -#ifdef ALMDEBUG - printf("ALM MIN_REG <-- %02x\n", value); -#endif s->alarm_tm.tm_min =3D from_bcd(value); omap_rtc_alarm_update(s); return; =20 case 0x28: /* ALARM_HOURS_REG */ -#ifdef ALMDEBUG - printf("ALM HRS_REG <-- %02x\n", value); -#endif if (s->pm_am) s->alarm_tm.tm_hour =3D ((from_bcd(value & 0x3f)) % 12) + @@ -2766,33 +2739,21 @@ static void omap_rtc_write(void *opaque, hwaddr add= r, return; =20 case 0x2c: /* ALARM_DAYS_REG */ -#ifdef ALMDEBUG - printf("ALM DAY_REG <-- %02x\n", value); -#endif s->alarm_tm.tm_mday =3D from_bcd(value); omap_rtc_alarm_update(s); return; =20 case 0x30: /* ALARM_MONTHS_REG */ -#ifdef ALMDEBUG - printf("ALM MON_REG <-- %02x\n", value); -#endif s->alarm_tm.tm_mon =3D from_bcd(value); omap_rtc_alarm_update(s); return; =20 case 0x34: /* ALARM_YEARS_REG */ -#ifdef ALMDEBUG - printf("ALM YRS_REG <-- %02x\n", value); -#endif s->alarm_tm.tm_year =3D from_bcd(value); omap_rtc_alarm_update(s); return; =20 case 0x40: /* RTC_CTRL_REG */ -#ifdef ALMDEBUG - printf("RTC CONTROL <-- %02x\n", value); -#endif s->pm_am =3D (value >> 3) & 1; s->auto_comp =3D (value >> 2) & 1; s->round =3D (value >> 1) & 1; @@ -2802,32 +2763,20 @@ static void omap_rtc_write(void *opaque, hwaddr add= r, return; =20 case 0x44: /* RTC_STATUS_REG */ -#ifdef ALMDEBUG - printf("RTC STATUSL <-- %02x\n", value); -#endif s->status &=3D ~((value & 0xc0) ^ 0x80); omap_rtc_interrupts_update(s); return; =20 case 0x48: /* RTC_INTERRUPTS_REG */ -#ifdef ALMDEBUG - printf("RTC INTRS <-- %02x\n", value); -#endif s->interrupts =3D value; return; =20 case 0x4c: /* RTC_COMP_LSB_REG */ -#ifdef ALMDEBUG - printf("RTC COMPLSB <-- %02x\n", value); -#endif s->comp_reg &=3D 0xff00; s->comp_reg |=3D 0x00ff & value; return; =20 case 0x50: /* RTC_COMP_MSB_REG */ -#ifdef ALMDEBUG - printf("RTC COMPMSB <-- %02x\n", value); -#endif s->comp_reg &=3D 0x00ff; s->comp_reg |=3D 0xff00 & (value << 8); return; --=20 2.47.1 From nobody Thu Apr 3 02:26:17 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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In particular, this will stop the functional test for the sx1 from printing the not-very-helpful note "omap_clkm_write: clocking scheme set to synchronous scalable" to the test's default.log. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20250227170117.1726895-4-peter.maydell@linaro.org> [PMD: Include component name (pwl/pwt/lpg) in trace events] Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/omap1.c | 26 ++++++++++++++------------ hw/arm/trace-events | 7 +++++++ 2 files changed, 21 insertions(+), 12 deletions(-) diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 8f5bb81c96a..3ee10b47770 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -42,6 +42,7 @@ #include "qemu/cutils.h" #include "qemu/bcd.h" #include "target/arm/cpu-qom.h" +#include "trace.h" =20 static inline void omap_log_badwidth(const char *funcname, hwaddr addr, in= t sz) { @@ -1731,7 +1732,7 @@ static void omap_clkm_write(void *opaque, hwaddr addr, case 0x18: /* ARM_SYSST */ if ((s->clkm.clocking_scheme ^ (value >> 11)) & 7) { s->clkm.clocking_scheme =3D (value >> 11) & 7; - printf("%s: clocking scheme set to %s\n", __func__, + trace_omap1_pwl_clocking_scheme( clkschemename[s->clkm.clocking_scheme]); } s->clkm.cold_start &=3D value & 0x3f; @@ -2335,7 +2336,7 @@ static void omap_pwl_update(struct omap_pwl_s *s) =20 if (output !=3D s->output) { s->output =3D output; - printf("%s: Backlight now at %i/256\n", __func__, output); + trace_omap1_pwl_backlight(output); } } =20 @@ -2470,8 +2471,8 @@ static void omap_pwt_write(void *opaque, hwaddr addr, break; case 0x04: /* VRC */ if ((value ^ s->vrc) & 1) { - if (value & 1) - printf("%s: %iHz buzz on\n", __func__, (int) + if (value & 1) { + trace_omap1_pwt_buzz( /* 1.5 MHz from a 12-MHz or 13-MHz PWT_CLK= */ ((omap_clk_getrate(s->clk) >> 3) / /* Pre-multiplexer divider */ @@ -2487,8 +2488,9 @@ static void omap_pwt_write(void *opaque, hwaddr addr, /* 80/127 divider */ ((value & (1 << 5)) ? 80 : 127) / (107 * 55 * 63 * 127))); - else - printf("%s: silence!\n", __func__); + } else { + trace_omap1_pwt_silence(); + } } s->vrc =3D value & 0x7f; break; @@ -3494,7 +3496,7 @@ static void omap_lpg_tick(void *opaque) timer_mod(s->tm, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + s->on); =20 s->cycle =3D !s->cycle; - printf("%s: LED is %s\n", __func__, s->cycle ? "on" : "off"); + trace_omap1_lpg_led(s->cycle ? "on" : "off"); } =20 static void omap_lpg_update(struct omap_lpg_s *s) @@ -3514,11 +3516,11 @@ static void omap_lpg_update(struct omap_lpg_s *s) } =20 timer_del(s->tm); - if (on =3D=3D period && s->on < s->period) - printf("%s: LED is on\n", __func__); - else if (on =3D=3D 0 && s->on) - printf("%s: LED is off\n", __func__); - else if (on && (on !=3D s->on || period !=3D s->period)) { + if (on =3D=3D period && s->on < s->period) { + trace_omap1_lpg_led("on"); + } else if (on =3D=3D 0 && s->on) { + trace_omap1_lpg_led("off"); + } else if (on && (on !=3D s->on || period !=3D s->period)) { s->cycle =3D 0; s->on =3D on; s->period =3D period; diff --git a/hw/arm/trace-events b/hw/arm/trace-events index 7790db780e0..f49cae1656e 100644 --- a/hw/arm/trace-events +++ b/hw/arm/trace-events @@ -1,5 +1,12 @@ # See docs/devel/tracing.rst for syntax documentation. =20 +# omap1.c +omap1_pwl_clocking_scheme(const char *scheme) "omap1 CLKM: clocking scheme= set to %s" +omap1_pwl_backlight(int output) "omap1 PWL: backlight now at %d/256" +omap1_pwt_buzz(int freq) "omap1 PWT: %dHz buzz on" +omap1_pwt_silence(void) "omap1 PWT: buzzer silenced" +omap1_lpg_led(const char *onoff) "omap1 LPG: LED is %s" + # virt-acpi-build.c virt_acpi_setup(void) "No fw cfg or ACPI disabled. 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In theory we could turn this into a tracepoint, but for code this old it doesn't seem worthwhile. We can add tracepoints if and when we have a reason to debug something. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-ID: <20250227170117.1726895-5-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/omap_sx1.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c index c6b0bed0796..24b40431832 100644 --- a/hw/arm/omap_sx1.c +++ b/hw/arm/omap_sx1.c @@ -76,10 +76,6 @@ static uint64_t static_read(void *opaque, hwaddr offset, static void static_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { -#ifdef SPY - printf("%s: value %" PRIx64 " %u bytes written at 0x%x\n", - __func__, value, size, (int)offset); -#endif } =20 static const MemoryRegionOps static_ops =3D { --=20 2.47.1 From nobody Thu Apr 3 02:26:17 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138560; cv=none; d=zohomail.com; s=zohoarc; b=fJW2076MJi94e7Zju81Q6YxiCn6lNeLROB0qM7GS452j6yrYETfnQ1gIP2BF13PaYtZVoOBCxGoxfOXxxC0wzw/znYrtu7bT9+bwT1Imlow+8A8td8K67tHktAUMhVMUKbPZ3hFBC7mPjzhZPPznHWRRYlrhSazGgJDDMNXbzew= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138560; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=FoS16jcofKMfC1p+Goa3uOwqWjbdT+vw3k8DI4uqp0A=; b=VgXbogStHkzVOnAIYIVTO8eHxOoSvG3Tny4GBu33LxbBORrXbBRbsYjE8BZ7IgBFZFX3thqrV/UagsR2UUsU6RhMTc5Nbo9LFgP4M8Fo4Atg7WGIuRHt9TW5ULIE5hPjWK+tZTJjIXjL8dYQBwSauWU+lu2a/NjrNDx4vfeCuP4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138560234994.2663802485445; Tue, 4 Mar 2025 17:36:00 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdX0-0007O8-RU; Tue, 04 Mar 2025 20:26:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdVV-0004QP-6H for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:25:13 -0500 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdVN-0007KP-3X for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:25:03 -0500 Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-43bc48ff815so2009845e9.0 for ; Tue, 04 Mar 2025 17:25:00 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20250227170117.1726895-6-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/versatilepb.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 941616cd25b..35766445fa4 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -27,6 +27,7 @@ #include "qom/object.h" #include "audio/audio.h" #include "target/arm/cpu-qom.h" +#include "qemu/log.h" =20 #define VERSATILE_FLASH_ADDR 0x34000000 #define VERSATILE_FLASH_SIZE (64 * 1024 * 1024) @@ -110,7 +111,8 @@ static uint64_t vpb_sic_read(void *opaque, hwaddr offse= t, case 8: /* PICENABLE */ return s->pic_enable; default: - printf ("vpb_sic_read: Bad register offset 0x%x\n", (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "vpb_sic_read: Bad register offset 0x%x\n", (int)off= set); return 0; } } @@ -144,7 +146,8 @@ static void vpb_sic_write(void *opaque, hwaddr offset, vpb_sic_update_pic(s); break; default: - printf ("vpb_sic_write: Bad register offset 0x%x\n", (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "vpb_sic_write: Bad register offset 0x%x\n", (int)of= fset); return; } vpb_sic_update(s); --=20 2.47.1 From nobody Thu Apr 3 02:26:17 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138577; cv=none; d=zohomail.com; s=zohoarc; b=Nvwh3XiffqWw9z83XCKNetwDM96dA7hM7/ZiYgW9Kp8Oq3qPZg0qmsPnFDUAgRFdkyAHUZAL5TkZ2kJ18D79CVlV/dm7spz1dCIHtUwXDpTgBU3L/WwsL+tanBAWc0YLgYEci7akzOssVPl4s3Cpv8yC+9jfslZaWMlyLL3oqNI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138577; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=fBKaSdciz4vWObThuGuztLYugPKsPiaANZDROnbbSag=; b=e8DM/z6vjTWLGQNBcQ7VDF+Jfk2CwBR6PiW+9aMQludwC4lvVNbZO8Vunbvl6B0OVaZxSHZelDS/xEKQ3jleIRpBq+5JSWyg998qE3aDw7IPpbEgu+ZMN32iXqB74J1VL4WwkaSRGRqvZMaxSoajpVkpqrYbCvPYufWI91c8JT4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138577527930.5867337943076; Tue, 4 Mar 2025 17:36:17 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdWu-0006q4-CW; Tue, 04 Mar 2025 20:26:37 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdVe-0004Tl-4Y for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:25:21 -0500 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdVR-0007L4-PK for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:25:07 -0500 Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-43bc63876f1so21515215e9.3 for ; Tue, 04 Mar 2025 17:25:05 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e4795983sm19153614f8f.6.2025.03.04.17.25.03 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:25:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137904; x=1741742704; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fBKaSdciz4vWObThuGuztLYugPKsPiaANZDROnbbSag=; b=f7vv46wcHJziPk1i4fP4WQSugpG4FTyl9MJLFjIT6RldKP+9D+hR4iNDQiChuhYU5b HmeBgZJGfr5yVtB7tp5HRSPF6E6pbG9Wk4dAqm1EPa0p/xq9hx1pbSKAkY4YXTSe5bEQ 9oLzdpYsX7J3f5U4XUD/z5XLWgicfiy1SnmfJIlNLFjQdu/FSrT9sdtnaD30RzvuTtun 6IZpQ4TXIKTUg6mWPJZtw7ca3xrlr/f2eS/44iz6caiL8g1rMPMiww0E4dvs4UcX5cHE uZQ1LJyfGesYg5rG7IHXT2S0gVOk1gJ4zgeDN2v1P/z3lZPJOiK0D+kRLLJ6o+pbWpun h83Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137904; x=1741742704; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fBKaSdciz4vWObThuGuztLYugPKsPiaANZDROnbbSag=; b=iwJKyfHpIyHLGqbAPljtcoD54adWUuxbMALsZXOHdu9asITN+Q1KXDcLG50wIwbiOQ YaSW9Ir1Ar+mzN5FJzSVXSMeOZ4DU+4FVi8Lvadzqm5QsRy+E5kH8dfFUJo7BkO7LHeW BBZFUR9Ij5y84UP86hRfld6T0QrQdFSZq1nvpsvX2PraJpo81ghL6io6X4WEG8Erqr6S uFH6g9i71JWgJOFvm/aYS8TQJeDXCZ2n+XkSX5MimiMStFMHH1SL/fcp7x9ZoyHiD6tX ktSTTjMTsb+3/YIChEbqihuCWIdTryoQRj9MF1gmwX9KWqXNBamgt7UWtTOr4WzThFb6 x56w== X-Gm-Message-State: AOJu0YzjUANriqBBOxxp/yLB314jlIcOAypx98xFASU3nru5bmzn6QF5 eyu7fRP9qG00UQ7ZPcoAGyMm3YT6b/yQ4uXwtK0jsrqzsQu9NtTkNmhR6bGi9dutUQ2p4wTrN56 GU48= X-Gm-Gg: ASbGnctRwGtVAtgiTl+/2w+sIweKKqxVLpMBXepVCwU/98S9uDjNeelBSTxaQf6eT1V 6kImeaFzBnGy1iBANJgXaYU2bumjrLAs4IuZscZv119vX9dNHKfGA9xOT1y8+9UYnjcH5cMq6Zf 1zo74UbEhLt8KzMi2Rd92Pn+geIaFVbWid7rnvepshmeW2IiKAs8bSRJeCwDPRvcByv+WCsO7g8 zo9z4frXHwcd0ETfAie/gkaE+Izyyn8oYchYlycTUwf4FEBCR0Ohk7IWpyUebyLc+FjlfW7fmlS oESVaeiKwbumUIuV3Y3WCmumPJCeN1m7VriDk9a/Kzg5v3KSkRL1DZlcyUsDeC7P4ocqkQTIL6I DfE5nPVkdfMpV8OJ/mOQ= X-Google-Smtp-Source: AGHT+IGQlstr4QKzVtgWdZq8j7qDheTdAWqwVZT6dBgKI8NoqRkvrhgRtkXpntsEVCd8+Y0mzmW8gA== X-Received: by 2002:a5d:64a6:0:b0:390:eb32:3fd2 with SMTP id ffacd0b85a97d-3911f57cc31mr912485f8f.0.1741137903706; Tue, 04 Mar 2025 17:25:03 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: BALATON Zoltan , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 38/41] hw/nvram/eeprom_at24c: Use OBJECT_DECLARE_SIMPLE_TYPE Date: Wed, 5 Mar 2025 02:21:53 +0100 Message-ID: <20250305012157.96463-39-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741138580471019100 From: BALATON Zoltan No need to open code it so use the simple object type declaration. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <08d9900af04789ede485942c8072eaa58bf52f80.1740839457.git.balato= n@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/nvram/eeprom_at24c.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c index a40cc5dd15a..2ae03935d47 100644 --- a/hw/nvram/eeprom_at24c.c +++ b/hw/nvram/eeprom_at24c.c @@ -30,9 +30,7 @@ ## __VA_ARGS__) =20 #define TYPE_AT24C_EE "at24c-eeprom" -typedef struct EEPROMState EEPROMState; -DECLARE_INSTANCE_CHECKER(EEPROMState, AT24C_EE, - TYPE_AT24C_EE) +OBJECT_DECLARE_SIMPLE_TYPE(EEPROMState, AT24C_EE) =20 struct EEPROMState { I2CSlave parent_obj; --=20 2.47.1 From nobody Thu Apr 3 02:26:17 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138253; cv=none; d=zohomail.com; s=zohoarc; b=XcZxGvNmLWECF1OQ857SHD61U5kQPPkLfUw/MDRWvWMzgOaN8bmP2vB8ubyU93m5vonFe9ilmvNWLPUgG9jlsM97EHTleiZMyuMk0dbEoey9aahwo2+WMbhQOQ/MJw1/xwo+tKjIKi3oqsZO+10tstvYFvOs7lk3QWUIH79DKvs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138253; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=BfDhx6dXYnykeldUX+NORiuKe1+4dgkAJvvKMJwXJlA=; b=KqHeLDDAaNoGXqGB754fji8Ze691qo5kNTt3xSP2hRlHnPtpmxYN029rCi4IqvbgCAxiCJGpnNMXtPdUIqM+SwYL+wRpdkPAs2dFKfQEBq/WmGvm+LQVEzN05/iQWLUqYISJKNKfSvN110w7YBHkiFf+EHCyIcmgsvdf6Plnt2E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 174113825350528.818378649099827; Tue, 4 Mar 2025 17:30:53 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdXI-0000NW-MZ; Tue, 04 Mar 2025 20:27:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdVe-0004To-4e for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:25:21 -0500 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdVW-0007QL-BS for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:25:12 -0500 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-3910e101d0fso1839209f8f.2 for ; Tue, 04 Mar 2025 17:25:09 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e4844a16sm19320417f8f.79.2025.03.04.17.25.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:25:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137908; x=1741742708; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BfDhx6dXYnykeldUX+NORiuKe1+4dgkAJvvKMJwXJlA=; b=uoxAaEA/mgd0E0DYys9gVHhJB2TvbpFZvKsMDgaAfjE1JAlIBkQA+IkAv5SQV4lV8+ LCfZ0OAJVXHEzGVTTf4N8Bem3LX6+fMLY9kIMm2O8kcg/b27iICtLXtXBadrRJcDG8Cn KTu7IOs/SXSvZzmQHddsMNoa2YAk4cALFYvqhJGzHa3keU22CPD7Fch24EfywnbwSQ0q qdGiTqRhevqH4UbBLkbEB1KDCLtygw5mJcrlCm6LsfX6eekpUT9m2nVYmlfwVFKIjlzh qANwUyPXaOuHMPRa8yzkX4Oh9HMrHaWZHKuI82JPhNEcR3uia9WAo11EFJgMwj/FmXRN GFTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137908; x=1741742708; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BfDhx6dXYnykeldUX+NORiuKe1+4dgkAJvvKMJwXJlA=; b=ElqtnIhjwRW6MIEsaZlH+FTBv2F7s4KXtKgaz9gj6WDE/KvPp9QiV/VatQL2rb/hqr FjwPsAEslHT9WZGvDm81J/IkVxeewVWn5UBzKh3mvmBB4UnD7qwoTpDlWSUnra2RGvUn Mrf2kgOVJbEsTtlVbs9q70Uy/tOMCCd6BE5G4uIKFxSt3X/wRXaztRNkW8o9tzeCdReF c4WpcYychQBU2kB+93I8iBTtyBuQrsyiqBH3hwedpHYZ7lXQIxlIp9uTEyya9a4vaeBC YrsRNt+7XcN8sw+dxRcUcETc8z+CDgSikJyeuP21U7kTUqWOIsZ1DFjCiKej9x8e3XjH K5CQ== X-Gm-Message-State: AOJu0Yxz7avBqlj70oNDhLbDxe86FUTC1U6kik1hIZKv8EZVbIwrpYGY ifdC+i34luz9KidvWFnn04m8CgYm3UlI7e7VQoX0pVFOhbBbkCLao7+S+PnJRVBpe9KDArP3+o+ JPnU= X-Gm-Gg: ASbGncsbjsG9TygWz7M9qGGyViGoemWKgZwZNeZ1qqaLwZwCyV71FP5LdgyKytPfeZr uo4neqYmSaehcDqQSYAkCa/BRKgc/GlVQqy5brx0z+2I7Tqwz8975k1c6aiyYGzoFSRMUz4+zw4 Zgmm0cvjgHw/82N+yxYo46r1JIm/4GkPSnEMI7ft4uAUmhi873r9Ts8iZeI6LfGQfWKBRT7+hLJ CLF18/GvtY4UBNeD508nJLKntWPvr+M6GhiozcEZbwqbRHa74I8uETPaeqt5ozTh54iTAbdBvDr My+de9HkjN5AnBb2nUo9I80Weytq6Kktt++DA4nwYeEPul78pACl58TgvarnMdMemccsDYjgRBE DkNVxI9eCkveJ1BUPlQk= X-Google-Smtp-Source: AGHT+IFdaDJC26axO68WBbQYWgB5Uxwn5n2ntVK/vCHtuezXOnVByz5M4l4YaOKWNvOKy8oicfsviw== X-Received: by 2002:a5d:47a7:0:b0:38f:3224:6615 with SMTP id ffacd0b85a97d-3911f7265d2mr608397f8f.7.1741137908148; Tue, 04 Mar 2025 17:25:08 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: BALATON Zoltan , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 39/41] hw/nvram/eeprom_at24c: Remove ERR macro that calls fprintf to stderr Date: Wed, 5 Mar 2025 02:21:54 +0100 Message-ID: <20250305012157.96463-40-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741138254003019000 From: BALATON Zoltan In the realize method error_setg can be used like other places there already do. The other usage can be replaced with error_report which is the preferred way instead of directly printing to stderr. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <637b92984795a385b648a84208f093947cc261e4.1740839457.git.balato= n@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/nvram/eeprom_at24c.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c index 2ae03935d47..9f606842eb6 100644 --- a/hw/nvram/eeprom_at24c.c +++ b/hw/nvram/eeprom_at24c.c @@ -10,6 +10,7 @@ #include "qemu/osdep.h" =20 #include "qapi/error.h" +#include "qemu/error-report.h" #include "qemu/module.h" #include "hw/i2c/i2c.h" #include "hw/nvram/eeprom_at24c.h" @@ -26,9 +27,6 @@ #define DPRINTK(FMT, ...) do {} while (0) #endif =20 -#define ERR(FMT, ...) fprintf(stderr, TYPE_AT24C_EE " : " FMT, \ - ## __VA_ARGS__) - #define TYPE_AT24C_EE "at24c-eeprom" OBJECT_DECLARE_SIMPLE_TYPE(EEPROMState, AT24C_EE) =20 @@ -75,8 +73,7 @@ int at24c_eeprom_event(I2CSlave *s, enum i2c_event event) if (ee->blk && ee->changed) { int ret =3D blk_pwrite(ee->blk, 0, ee->rsize, ee->mem, 0); if (ret < 0) { - ERR(TYPE_AT24C_EE - " : failed to write backing file\n"); + error_report("%s: failed to write backing file", __func__); } DPRINTK("Wrote to backing file\n"); } @@ -203,8 +200,9 @@ static void at24c_eeprom_realize(DeviceState *dev, Erro= r **errp) int ret =3D blk_pread(ee->blk, 0, ee->rsize, ee->mem, 0); =20 if (ret < 0) { - ERR(TYPE_AT24C_EE - " : Failed initial sync with backing file\n"); + error_setg(errp, "%s: Failed initial sync with backing file", + TYPE_AT24C_EE); + return; } DPRINTK("Reset read backing file\n"); } --=20 2.47.1 From nobody Thu Apr 3 02:26:17 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138581; cv=none; d=zohomail.com; s=zohoarc; b=Lx/eoT+ep0BMcoXtNQftX2+IKmMTd9KC7ltFoqM7/Hh1J69EJqtXtXShLoofKkyDIPUzzPzopTr2Tu3HyYPYTFBnsQtcHOYFWS7E17fB4ny+08cwVJXst6x1Pp2IncWvEuwVg16A/wqoM0x2xfp59DNof0hYuz3XQCUOTSUnZs0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138581; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=zNYmKdmAkSe74tv/hM9qGRHhB0/eo8ytTK5WDBjYNps=; b=YarKTlJ7nwc91LTHVHLwcsSHc4NiDjHNm2ZzqhmK9iE2rPs2MQ8/Q0Brk+UhbZ6TW0QL580j85ZggzzHs0TUOus/4sXuHcw1xw2+KvPHgbkZyam2zUHrHkxgUW8xREoWeUV3mKan2MEr/wBHMm98622gnA4/CdywuflmHbqU80I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138581051522.4227785580825; Tue, 4 Mar 2025 17:36:21 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdWm-00065R-2T; Tue, 04 Mar 2025 20:26:28 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdVe-0004Tq-4Y for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:25:21 -0500 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdVa-0007XW-Ho for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:25:16 -0500 Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-3910e101d0fso1839227f8f.2 for ; Tue, 04 Mar 2025 17:25:13 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e485e03asm19626906f8f.95.2025.03.04.17.25.11 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:25:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137913; x=1741742713; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zNYmKdmAkSe74tv/hM9qGRHhB0/eo8ytTK5WDBjYNps=; b=vQQfY9jgOF3N27M2LmAJimAt22HJRbBmZkLexoiPUTTC96GoFEx5aZgDT5et57GrEG txGeceelQVXCLhDyaIRUFcuFW8Ke6D91f3iM91CACgxh9GeGp2HhzHeYGot5PsQvqyst IyyZFMCQ036U371z+nu/yssKk1p3UEAMoBOBYtFABHxGpWYKFHBpG9gS3f+lV7KECtu/ aeZMqX+Vv5+ybnKiIYkDof1sGlZPQPCZbKTtJJ8n8dZ8Q8XcoUQCpWGa1SfHi3nnUcXg Ua2EtFRTEv/+8IxCVodK3hAbrM7F+ryVu1OrA9muicFd67dgqcBCfTM4AKG3tdwJ4CuX 1X8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137913; x=1741742713; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zNYmKdmAkSe74tv/hM9qGRHhB0/eo8ytTK5WDBjYNps=; b=Trol7ZGIDUPzI5Wjok+f5hkHo1/xFDbhVLkrNwC2+TLRM5pZdkBn67/vKwJFsDLQEZ u/jPQ4wSFxALSuWRUdXxhd2dS1m2ubqFxuZsaL1rPsCERy4UWoxRNdpFzMhY1sp2iwsg yoHH7SqX2qsz38V2YLoihCfO6+ncjgJ222Y7EGA3lpta2CaOwqEPLxJNmOtWHSxT4oMP egX7WE6LwO4kXKDVwFmsmObUruRFUQCnPJjZDAmwXXxi/SOYoHqxSzhy/y8wUQbDU4nY ZFLax3Efsvh0YWQvbEaCDoltjvUmUObxqrcTEL0vatUywqdUgI3qMsqYW64HT9P9GRbv 4QBw== X-Gm-Message-State: AOJu0YwwKtQXRmAWWOVidcOLPSP+pYE2qfbnb5qRMcH4e0BzLmt56UWC TUVvBKkP/+OQITSTs1xrl2YWVxpBzIlH9M0jzar91zgoZ64vJKzxe8Qq6UfmKFeKDPvgh8gkmCm 8UJ8= X-Gm-Gg: ASbGncs5I/3eOVvS4mX1kyoeQieXQkJy5OPOrsCx/9Qhp7CIZf6dMK8eWoEE751nr64 h7fM4I7V/n62xcAtLg1REi+qsew0Izcb5IkiQpZmlKFSB14kRiK5Pp0LsEfID+vpZWd4LjIhthQ be/Z3tIV+7wiOueMUok2D7gkGbItwWKBcWCxKmYd/xGzQ5ywFWsqXr7w/omce1huPx2cBcBAfZw d6aIJLYzfZ5ISL6gV9lTugMUn8RguhGj9cHYLit8JwXY4o7rYETrn9g+pube2wegKP336DIG9iv muKb5+0LqsA0OPLtGlBdTe4wMXQxYt/kJLmMVEkbjaz9K6BewbDmaQeu53lxcCT2RZwIkCqrH/e xBZFtAoUcXZaUEsKyvZc= X-Google-Smtp-Source: AGHT+IF/Aq1E6HYWY3+62q3IhdcMlhTsymuc5Adu1vrnYudPtzpupQTtly/2q4Cr8h8MIyFdiiwrjg== X-Received: by 2002:a5d:59ad:0:b0:391:8a3:d943 with SMTP id ffacd0b85a97d-3911f73f9f3mr787266f8f.13.1741137912683; Tue, 04 Mar 2025 17:25:12 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: BALATON Zoltan , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 40/41] hw/nvram/eeprom_at24c: Remove memset after g_malloc0 Date: Wed, 5 Mar 2025 02:21:55 +0100 Message-ID: <20250305012157.96463-41-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741138582512019100 From: BALATON Zoltan Calling memset to zero memory is not needed after g_malloc0 which already clears memory. These used to be in separate functions but after some patches the memset ended up after g_malloc0 and thus can be dropped. Fixes: 4f2c6448c3 (hw/nvram/eeprom_at24c: Make reset behavior more like har= dware) Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/nvram/eeprom_at24c.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c index 9f606842eb6..78c81bea77f 100644 --- a/hw/nvram/eeprom_at24c.c +++ b/hw/nvram/eeprom_at24c.c @@ -190,7 +190,6 @@ static void at24c_eeprom_realize(DeviceState *dev, Erro= r **errp) } =20 ee->mem =3D g_malloc0(ee->rsize); - memset(ee->mem, 0, ee->rsize); =20 if (ee->init_rom) { memcpy(ee->mem, ee->init_rom, MIN(ee->init_rom_size, ee->rsize)); --=20 2.47.1 From nobody Thu Apr 3 02:26:17 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1741138321; cv=none; d=zohomail.com; s=zohoarc; b=SvIi/mD+ucdzx9INNNZIdPEgD2ND7u3WRxcRGqVZ2KEOrUPx1DdWA+MH74czXLmBRxeNoZihXhRCuQ43vvRhACTt/1JbpG/vl2tGNkiHDaeQzZzYWU+oxGZJ/FZJBkDPbqmuzGywAp5I/kGVyaxcuB6MpqgaveABU1XmhAT0eQg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1741138321; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=JT3mCpufvIuWr8BVM5sYDayVdvf5uoSCrbbGB14l/A8=; b=nQy0c9IJQitJqGu8Nb7OMAoq+Wg9FnLxtEEebIFfbEXsYb9jZZovQAaKLUz89/P2euuQ4Y3j4hmmLdcofCbchXbg3o5neRqPkUu28+Csz2WTUbOiQMj0igIjRBAZWTAfnzPf9o+w75BRpd5L7BbpN5F0OOz0ibK4jngzQpoFyF4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1741138321506443.88286530163964; Tue, 4 Mar 2025 17:32:01 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tpdWr-0006VR-5u; Tue, 04 Mar 2025 20:26:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tpdVi-0004bw-8y for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:25:28 -0500 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tpdVg-0007Yh-KD for qemu-devel@nongnu.org; Tue, 04 Mar 2025 20:25:22 -0500 Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-439a4fc2d65so66721705e9.3 for ; Tue, 04 Mar 2025 17:25:20 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43bd429375fsm2018015e9.10.2025.03.04.17.25.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Mar 2025 17:25:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1741137919; x=1741742719; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JT3mCpufvIuWr8BVM5sYDayVdvf5uoSCrbbGB14l/A8=; b=pZaCGHpCED2gvXOOGqzKab5OS8z+/vtjFTiEY/QBWcAn+zECcXovbLu1V7ANK9Y1+A ZZQ3sNqU4/aQrqzZm5r3fQS794yo/Wa+v66vbfGN1U1BQo9fmIwf68A9aiHzCJSUXWgf Sj3Tj0jsuBepcuMK808aismpA8FNwl3xt58YLh67qW98BjgZlk3+Qabw+Q2Zmw+SnyS/ 1RYCNJdLY1rrUs/gVnA5yvFmaArCy6Lempr8xtBLHLVVVxAv7zO9k8NeV9rstWL5ous2 axCYKnp0/lh1EXL1RZogQ1/RZEZFkNsE7GtlHA6uFsoot0FcKmwGXlHAWQ3Llt2rjRQH 8kPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1741137919; x=1741742719; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JT3mCpufvIuWr8BVM5sYDayVdvf5uoSCrbbGB14l/A8=; b=hnqhiM9U1YnZIjkoKf/D+NRdGEklnzjQPZG2UY+E/vvTpf+Txnzbq9AYoKNr1tyER9 LzdDzO+iKl1QkHHbWzhFtY6b6eOyjdtfR9bO164ZrQ2ACP7FMzHvd1jx7o+Vbx1lUqXH 4BWHwXZk1bQbAVJXwu6RQ0Qk0uwvecLftlLtTD+fEwTnpFQibg7JP4o0NCxSaEa3/x6P BmHBKcIqV48e58G8D5MG0zMtFRybIgCks2t8day4MMF6lYT3cK8JXs6KZKycYiCzv/MC YcA8paRFpPaEOtfSv0ZcqNS576kk1JAjk5mm6n080IcbXWeVCD49epMOhM3Ufl2Lc3m8 f4RA== X-Gm-Message-State: AOJu0Yyz7PXESq0gmZ4yLkswQJuMTvaKzpEIQTVLoaOcVEygF4N91U0i ZIT4/dN5lcbTDp70PMEfCLxSHGFIGsOXJCpX+CmC/jE3zNhu901F2Ud3xSDdqPquWkr23pW5Jn9 zP+8= X-Gm-Gg: ASbGncswmWwK5KsNSQKFh5VC2c23ogAa6cO+dV5TCVSMlHksFtDGsFgV7iXhN1qZRgs GSy7dC+7NFhu4IlkVC4jGr/CCqFMR3OLJm4r8pn2q2QC++/ShFCT8sBJH6m9RlcX3pbTsNSuQNx B1hz/ivq4YJTxTTG5e1Xc2s2+36wv8jhuRyBmkkMnA7piF7fuhc9CMRA95uo3RbJ9eOKbaF+9rn lHCyAZ49XwZc03KHYCntx7ksr/ebc4DiXpl3wdg80aiL34oQkCa11BjfDGhOzKz9Gx7t9ARW35Q TWd6CKVQiuzWnAe9Vk/SV5fkyCZmwawnEywsjKemawSsB/SkCd5en7P42mwswMsmASShWeAS/5Q I9UTuN2o6a1LxweJqiac= X-Google-Smtp-Source: AGHT+IEbSpdl7IDdjNfclOU3aa8iGxhBPbwTaibTF4bgxSFgtVp3aMl5+aMrUYQhClS+Y4Mg+tLHUA== X-Received: by 2002:a05:600c:35ca:b0:43b:ce86:b31a with SMTP id 5b1f17b1804b1-43bd29bd205mr5545765e9.22.1741137918695; Tue, 04 Mar 2025 17:25:18 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: BALATON Zoltan , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 41/41] hw/nvram/eeprom_at24c: Reorganise init to avoid overwriting values Date: Wed, 5 Mar 2025 02:21:56 +0100 Message-ID: <20250305012157.96463-42-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305012157.96463-1-philmd@linaro.org> References: <20250305012157.96463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1741138322385019000 From: BALATON Zoltan The init_rom[] can write values to the beginning of the memory but these are overwritten by values from a backing file that covers the whole memory. init_rom[] is used only if there's no backing file (provides default content) but should not overwrite backing file content (especially leaving the file unchanged and only change it in memory). Do the init_rom[] handling only if it would not be overwritten. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/nvram/eeprom_at24c.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c index 78c81bea77f..ff7a21eee7f 100644 --- a/hw/nvram/eeprom_at24c.c +++ b/hw/nvram/eeprom_at24c.c @@ -191,10 +191,6 @@ static void at24c_eeprom_realize(DeviceState *dev, Err= or **errp) =20 ee->mem =3D g_malloc0(ee->rsize); =20 - if (ee->init_rom) { - memcpy(ee->mem, ee->init_rom, MIN(ee->init_rom_size, ee->rsize)); - } - if (ee->blk) { int ret =3D blk_pread(ee->blk, 0, ee->rsize, ee->mem, 0); =20 @@ -204,6 +200,8 @@ static void at24c_eeprom_realize(DeviceState *dev, Erro= r **errp) return; } DPRINTK("Reset read backing file\n"); + } else if (ee->init_rom) { + memcpy(ee->mem, ee->init_rom, MIN(ee->init_rom_size, ee->rsize)); } =20 /* --=20 2.47.1