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a="52148197" X-IronPort-AV: E=Sophos;i="6.13,319,1732608000"; d="scan'208";a="52148197" X-CSE-ConnectionGUID: XXADOOOaRJeC3CINS2+gTw== X-CSE-MsgGUID: cgPca28VTTGR4xRTkLqNkA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,319,1732608000"; d="scan'208";a="121938313" From: Zhao Liu To: Paolo Bonzini , Igor Mammedov , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Chuang Xu , Xiaoyao Li , Isaku Yamahata , Babu Moger Cc: qemu-devel@nongnu.org, Zhao Liu Subject: [PATCH 4/4] i386/cpu: Honor maximum value for CPUID.8000001DH.EAX[25:14] Date: Thu, 27 Feb 2025 14:25:23 +0800 Message-Id: <20250227062523.124601-5-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250227062523.124601-1-zhao1.liu@intel.com> References: <20250227062523.124601-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.198.163.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -47 X-Spam_score: -4.8 X-Spam_bar: ---- X-Spam_report: (-4.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.44, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1740636404658019100 Content-Type: text/plain; charset="utf-8" CPUID.8000001DH:EAX[25:14] is "NumSharingCache", and the number of logical processors sharing this cache is the value of this field incremented by 1. Because of its width limitation, the maximum value currently supported is 4095. Though at present Q35 supports up to 4096 CPUs, to prevent potential overflow issues from further increasing the number of CPUs in the future, check and honor the maximum value as CPUID.04H did. Cc: Babu Moger Signed-off-by: Zhao Liu --- RFC: * Although there are currently no overflow cases, to avoid any potential issue, add the overflow check, just as I did for Intel. --- target/i386/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d75175b0850a..7ca9740e8c97 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -493,7 +493,8 @@ static void encode_cache_cpuid8000001d(CPUCacheInfo *ca= che, =20 *eax =3D CACHE_TYPE(cache->type) | CACHE_LEVEL(cache->level) | (cache->self_init ? CACHE_SELF_INIT_LEVEL : 0); - *eax |=3D max_thread_ids_for_cache(topo_info, cache->share_level) << 1= 4; + /* Bits 25:14 - NumSharingCache: maximum 4095. */ + *eax |=3D MIN(max_thread_ids_for_cache(topo_info, cache->share_level),= 4095) << 14; =20 assert(cache->line_size > 0); assert(cache->partitions > 0); --=20 2.34.1