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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: laurent@vivier.eu
Subject: [PATCH v4 24/24] target/m68k: Implement FPIAR
Date: Mon, 24 Feb 2025 09:14:44 -0800
Message-ID: <20250224171444.440135-25-richard.henderson@linaro.org>
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So far, this is only read-as-written.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2497
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
---
target/m68k/cpu.h | 1 +
target/m68k/cpu.c | 23 ++++++++++++++++++++++-
target/m68k/helper.c | 14 ++++++++------
target/m68k/translate.c | 3 ++-
4 files changed, 33 insertions(+), 8 deletions(-)
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index c22d5223f0..0bb26720cf 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -110,6 +110,7 @@ typedef struct CPUArchState {
uint32_t fpsr;
bool fpsr_inex1; /* live only with an in-flight decimal operand */
float_status fp_status;
+ uint32_t fpiar;
=20
uint64_t mactmp;
/*
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 21ebc198cd..18d5e6a98c 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -412,6 +412,23 @@ static const VMStateDescription vmstate_freg =3D {
}
};
=20
+static bool fpu_fpiar_needed(void *opaque)
+{
+ M68kCPU *s =3D opaque;
+ return s->env.fpiar !=3D 0;
+}
+
+static const VMStateDescription vmstate_fpiar =3D {
+ .name =3D "cpu/fpu/fpiar",
+ .version_id =3D 1,
+ .minimum_version_id =3D 1,
+ .needed =3D fpu_fpiar_needed,
+ .fields =3D (const VMStateField[]) {
+ VMSTATE_UINT32(env.fpiar, M68kCPU),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static int fpu_post_load(void *opaque, int version)
{
M68kCPU *s =3D opaque;
@@ -432,7 +449,11 @@ static const VMStateDescription vmstate_fpu =3D {
VMSTATE_STRUCT_ARRAY(env.fregs, M68kCPU, 8, 0, vmstate_freg, FPReg=
),
VMSTATE_STRUCT(env.fp_result, M68kCPU, 0, vmstate_freg, FPReg),
VMSTATE_END_OF_LIST()
- }
+ },
+ .subsections =3D (const VMStateDescription * const []) {
+ &vmstate_fpiar,
+ NULL
+ },
};
=20
static bool cf_spregs_needed(void *opaque)
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index 6e3bb96762..bc787cbf05 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -45,8 +45,8 @@ static int cf_fpu_gdb_get_reg(CPUState *cs, GByteArray *m=
em_buf, int n)
return gdb_get_reg32(mem_buf, env->fpcr);
case 9: /* fpstatus */
return gdb_get_reg32(mem_buf, env->fpsr);
- case 10: /* fpiar, not implemented */
- return gdb_get_reg32(mem_buf, 0);
+ case 10: /* fpiar */
+ return gdb_get_reg32(mem_buf, env->fpiar);
}
return 0;
}
@@ -69,7 +69,8 @@ static int cf_fpu_gdb_set_reg(CPUState *cs, uint8_t *mem_=
buf, int n)
case 9: /* fpstatus */
env->fpsr =3D ldl_be_p(mem_buf);
return 4;
- case 10: /* fpiar, not implemented */
+ case 10: /* fpiar */
+ env->fpiar =3D ldl_p(mem_buf);
return 4;
}
return 0;
@@ -91,8 +92,8 @@ static int m68k_fpu_gdb_get_reg(CPUState *cs, GByteArray =
*mem_buf, int n)
return gdb_get_reg32(mem_buf, env->fpcr);
case 9: /* fpstatus */
return gdb_get_reg32(mem_buf, env->fpsr);
- case 10: /* fpiar, not implemented */
- return gdb_get_reg32(mem_buf, 0);
+ case 10: /* fpiar */
+ return gdb_get_reg32(mem_buf, env->fpiar);
}
return 0;
}
@@ -114,7 +115,8 @@ static int m68k_fpu_gdb_set_reg(CPUState *cs, uint8_t *=
mem_buf, int n)
case 9: /* fpstatus */
env->fpsr =3D ldl_be_p(mem_buf);
return 4;
- case 10: /* fpiar, not implemented */
+ case 10: /* fpiar */
+ env->fpiar =3D ldl_p(mem_buf);
return 4;
}
return 0;
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 29e64d3908..fdda7aeb99 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4674,7 +4674,7 @@ static void gen_load_fcr(DisasContext *s, TCGv res, i=
nt reg)
{
switch (reg) {
case M68K_FPIAR:
- tcg_gen_movi_i32(res, 0);
+ tcg_gen_ld_i32(res, tcg_env, offsetof(CPUM68KState, fpiar));
break;
case M68K_FPSR:
tcg_gen_ld_i32(res, tcg_env, offsetof(CPUM68KState, fpsr));
@@ -4689,6 +4689,7 @@ static void gen_store_fcr(DisasContext *s, TCGv val, =
int reg)
{
switch (reg) {
case M68K_FPIAR:
+ tcg_gen_st_i32(val, tcg_env, offsetof(CPUM68KState, fpiar));
break;
case M68K_FPSR:
tcg_gen_st_i32(val, tcg_env, offsetof(CPUM68KState, fpsr));
--=20
2.43.0