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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: laurent@vivier.eu,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v4 18/24] target/m68k: Move gen_addr_fault into gen_{load,
store}_mode_fp
Date: Mon, 24 Feb 2025 09:14:38 -0800
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Move the exception to be raised into the helpers.
This in preparation for raising other exceptions,
and still wanting to return failure.
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/m68k/translate.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 78d9f24970..69e1118aa1 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -1024,6 +1024,7 @@ static bool gen_load_mode_fp(DisasContext *s, uint16_=
t insn, int opsize,
return true;
=20
case 1: /* Address register direct. */
+ gen_addr_fault(s);
return false;
=20
case 7: /* Other */
@@ -1080,6 +1081,7 @@ static bool gen_load_mode_fp(DisasContext *s, uint16_=
t insn, int opsize,
case 6: /* Indirect index + displacement. */
addr =3D gen_lea_mode(s, mode, reg0, opsize);
if (IS_NULL_QREG(addr)) {
+ gen_addr_fault(s);
return false;
}
gen_load_fp(s, opsize, addr, fp, index);
@@ -1113,6 +1115,7 @@ static bool gen_store_mode_fp(DisasContext *s, uint16=
_t insn, int opsize,
return true;
=20
case 1: /* Address register direct. */
+ gen_addr_fault(s);
return false;
=20
case 2: /* Indirect register */
@@ -1123,6 +1126,7 @@ static bool gen_store_mode_fp(DisasContext *s, uint16=
_t insn, int opsize,
case 7: /* Other */
addr =3D gen_lea_mode(s, mode, reg0, opsize);
if (IS_NULL_QREG(addr)) {
+ gen_addr_fault(s);
return false;
}
gen_store_fp(s, opsize, addr, fp, index);
@@ -4887,10 +4891,9 @@ DISAS_INSN(fpu)
case 3: /* fmove out */
cpu_src =3D gen_fp_ptr(REG(ext, 7));
opsize =3D ext_opsize(ext, 10);
- if (!gen_store_mode_fp(s, insn, opsize, cpu_src, IS_USER(s))) {
- gen_addr_fault(s);
+ if (gen_store_mode_fp(s, insn, opsize, cpu_src, IS_USER(s))) {
+ gen_helper_ftst(tcg_env, cpu_src);
}
- gen_helper_ftst(tcg_env, cpu_src);
return;
case 4: /* fmove to control register. */
case 5: /* fmove from control register. */
@@ -4909,7 +4912,6 @@ DISAS_INSN(fpu)
opsize =3D ext_opsize(ext, 10);
cpu_src =3D gen_fp_result_ptr();
if (!gen_load_mode_fp(s, insn, opsize, cpu_src, IS_USER(s))) {
- gen_addr_fault(s);
return;
}
} else {
--=20
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