From nobody Thu May  8 14:49:24 2025
Delivered-To: importer@patchew.org
Authentication-Results: mx.zohomail.com;
	dkim=fail;
	spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as
 permitted sender)
  smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org;
	dmarc=pass(p=none dis=none)  header.from=nongnu.org
ARC-Seal: i=1; a=rsa-sha256; t=1739913737; cv=none;
	d=zohomail.com; s=zohoarc;
	b=H+B91HBhi60Ho0Xka2REy/nJBi6XB5OXlrY8AQJCR7ARRxE/VQkHfwdlvJ2NnxvqwdSNHK1Y9f6JsOJeRRzEIgItdZM/9mWQvnTX6qU90GpAUXAPELOKb9VpYp5Ysqv7fMLl2tFiAXCOQy6z56cXGN618XRwMBbx3HQc1LPjGkg=
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com;
 s=zohoarc;
	t=1739913737;
 h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id;
	bh=HbbAO2q/OMePzzI7m7UpUr/gJpXIsTOAtwc7B4InJkg=;
	b=OkxVH6znPO1g+cbCYCCjgbfHMzW2eC8Ef2sDdxpwCGZQja8momjKW3YYWxr7kVcfkXBlBBv+0YiOs99xl0j6TH3KDQ11fYAMcsZWpnZcVc0NEoGnK9YdqXd70tv6m0q/5lq9ClT0pD1+tLjZTKnrLQ2bZQxxuHo54n1MUUFEvXw=
ARC-Authentication-Results: i=1; mx.zohomail.com;
	dkim=fail;
	spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as
 permitted sender)
  smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org;
	dmarc=pass header.from=<qemu-devel@nongnu.org> (p=none dis=none)
Return-Path: <qemu-devel-bounces+importer=patchew.org@nongnu.org>
Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by
 mx.zohomail.com
	with SMTPS id 17399137375971017.2879919139053;
 Tue, 18 Feb 2025 13:22:17 -0800 (PST)
Received: from localhost ([::1] helo=lists1p.gnu.org)
	by lists.gnu.org with esmtp (Exim 4.90_1)
	(envelope-from <qemu-devel-bounces@nongnu.org>)
	id 1tkV2E-00032b-Jv; Tue, 18 Feb 2025 16:21:42 -0500
Received: from eggs.gnu.org ([2001:470:142:3::10])
 by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)
 (Exim 4.90_1) (envelope-from <keithp@keithp.com>) id 1tkV2D-00032M-FX
 for qemu-devel@nongnu.org; Tue, 18 Feb 2025 16:21:41 -0500
Received: from home.keithp.com ([63.227.221.253] helo=elaine.keithp.com)
 by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)
 (Exim 4.90_1) (envelope-from <keithp@keithp.com>) id 1tkV2A-00033B-Sh
 for qemu-devel@nongnu.org; Tue, 18 Feb 2025 16:21:41 -0500
Received: from localhost (localhost [127.0.0.1])
 by elaine.keithp.com (Postfix) with ESMTP id 428253F20D3C
 for <qemu-devel@nongnu.org>; Tue, 18 Feb 2025 13:21:37 -0800 (PST)
Received: from elaine.keithp.com ([127.0.0.1])
 by localhost (elaine.keithp.com [127.0.0.1]) (amavis, port 10024) with LMTP
 id kI16fiP6pMAe; Tue, 18 Feb 2025 13:21:36 -0800 (PST)
Received: from keithp.com (koto.keithp.com [192.168.11.2])
 by elaine.keithp.com (Postfix) with ESMTPSA id E7EBE3F20DB1;
 Tue, 18 Feb 2025 13:21:34 -0800 (PST)
Received: by keithp.com (Postfix, from userid 1000)
 id BDBC21E6009E; Tue, 18 Feb 2025 13:21:34 -0800 (PST)
DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=keithp.com; s=mail;
 t=1739913697; bh=teoTsh+CvtnyfxlQFH0EO7DMOroSayuJqtpkRTSKTfg=;
 h=From:To:Cc:Subject:Date:In-Reply-To:References:From;
 b=n3NvL8NiPH/rHw8FKMJbdXIIFYgY/Dn/528dNZloXwAR0nZk7aqo4EQNDLQAT5qYO
 oDcrJt1ge11oux8z2WSAzNC2H5woJhxDudH50rTicVRO5LM8hTVQgSB9h6FpbH6Coh
 oHj+sRo98S9Bg0R6t3WA2nIz2dOm888vUldBemsRzUM89N6d96jnaNjiH2C48LhGtU
 yzEzApIseB0Putu4AOwbMCnOB5/bmxWl4qDsFLg9SM2Ql9EspwcGTNszhe8xz06grq
 W/1HcVZURLsE09jiluxgsBP/RQhRuBCPyKYSEvxEiagwkdL0AshxlMjjUSnKcNo4nK
 zCMzyas+cdiyg==
X-Virus-Scanned: Debian amavis at keithp.com
DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=keithp.com; s=mail;
 t=1739913694; bh=teoTsh+CvtnyfxlQFH0EO7DMOroSayuJqtpkRTSKTfg=;
 h=From:To:Cc:Subject:Date:In-Reply-To:References:From;
 b=K2w1gBLPfGrank0tzejcTv8+SNqFbR80HEIxJXYTmi+ZZhpROaKFjVScIn0DID26Q
 0lYczHqQthQebWpzUNqV8eY32wLg/NfqoDsqvNA3aHHF9NRaqGdq3pA4ZuECLcBLXb
 V3hrCRCvJDKkjgPMhx0P0//bVsEXqOFwS1e1TZu3iSLgM6LfedQr1YSp78ymffHzVU
 msFeuns179kYgC/LGzzqYFgkoDxLPOFkaOjvYh8nwvmG7GoAXgf3lN6gOX9T9jJYbm
 iQMpkUaiL02nQ8d+CIXCl6g/m15195BPJLTrOFKU/kWPtrTBLRYO1rmT2TIcXxvy5o
 Kz2jGhVZYVHVA==
To: qemu-devel@nongnu.org
Cc: Keith Packard <keithp@keithp.com>
Subject: [PATCH 3/4] hw/rx: Reset the CPU at qemu reset time
Date: Tue, 18 Feb 2025 13:21:02 -0800
Message-ID: <20250218212103.2024039-4-keithp@keithp.com>
X-Mailer: git-send-email 2.47.2
In-Reply-To: <20250218212103.2024039-1-keithp@keithp.com>
References: <20250215021654.1786679-1-keithp@keithp.com>
 <20250218212103.2024039-1-keithp@keithp.com>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17
 as permitted sender) client-ip=209.51.188.17;
 envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org;
 helo=lists.gnu.org;
Received-SPF: pass client-ip=63.227.221.253; envelope-from=keithp@keithp.com;
 helo=elaine.keithp.com
X-Spam_score_int: -20
X-Spam_score: -2.1
X-Spam_bar: --
X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,
 DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,
 RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,
 SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no
X-Spam_action: no action
X-BeenThere: qemu-devel@nongnu.org
X-Mailman-Version: 2.1.29
Precedence: list
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
 <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
 <mailto:qemu-devel-request@nongnu.org?subject=subscribe>
Reply-to: Keith Packard <keithp@keithp.com>
From: Keith Packard via <qemu-devel@nongnu.org>
Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org
Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org
X-ZohoMail-DKIM: fail (found 2 invalid signatures)
X-ZM-MESSAGEID: 1739913742227019100
Content-Type: text/plain; charset="utf-8"

This ensure that the CPU gets reset every time QEMU resets. Use either
the kernel entry point or the reset vector if no kernel was loaded.

Signed-off-by: Keith Packard <keithp@keithp.com>
---
 hw/rx/rx-gdbsim.c | 36 +++++++++++++++++++++++++++++++++++-
 target/rx/cpu.c   |  9 ++-------
 target/rx/cpu.h   |  3 +++
 3 files changed, 40 insertions(+), 8 deletions(-)

diff --git a/hw/rx/rx-gdbsim.c b/hw/rx/rx-gdbsim.c
index 4afd77efd5..9e395ae345 100644
--- a/hw/rx/rx-gdbsim.c
+++ b/hw/rx/rx-gdbsim.c
@@ -22,6 +22,7 @@
 #include "qemu/guest-random.h"
 #include "qemu/units.h"
 #include "qapi/error.h"
+#include "exec/cpu_ldst.h"
 #include "hw/loader.h"
 #include "hw/rx/rx62n.h"
 #include "system/qtest.h"
@@ -56,6 +57,34 @@ DECLARE_OBJ_CHECKERS(RxGdbSimMachineState, RxGdbSimMachi=
neClass,
                      RX_GDBSIM_MACHINE, TYPE_RX_GDBSIM_MACHINE)
=20
=20
+static void rx_cpu_reset(void *opaque)
+{
+    RXCPU *cpu =3D opaque;
+    CPUState *cs =3D CPU(cpu);
+    CPURXState *env =3D cpu_env(cs);
+
+    cpu_reset(cs);
+
+    if (env->use_reset_pc) {
+        /*
+         * Load the PC with the starting address for the kernel
+         */
+        env->pc =3D env->reset_pc;
+    } else {
+        /*
+         * Load the initial PC from the reset vector. If there is
+         * a ROM containing that vector use that, otherwise read
+         * it from target memory.
+         */
+        uint32_t *resetvec_p =3D rom_ptr_for_as(cs->as, 0xfffffffc, 4);
+        if (resetvec_p) {
+            env->pc =3D ldl_p(resetvec_p);
+        } else {
+            env->pc =3D cpu_ldl_data(env, 0xfffffffc);
+        }
+    }
+}
+
 static void rx_load_image(RXCPU *cpu, const char *filename,
                           uint32_t start, uint32_t size)
 {
@@ -68,7 +97,8 @@ static void rx_load_image(RXCPU *cpu, const char *filenam=
e,
         fprintf(stderr, "qemu: could not load kernel '%s'\n", filename);
         exit(1);
     }
-    cpu->env.pc =3D start;
+    cpu->env.reset_pc =3D start;
+    cpu->env.use_reset_pc =3D true;
=20
     /* setup exception trap trampoline */
     /* linux kernel only works little-endian mode */
@@ -87,6 +117,7 @@ static void rx_gdbsim_init(MachineState *machine)
     const char *kernel_filename =3D machine->kernel_filename;
     const char *dtb_filename =3D machine->dtb;
     uint8_t rng_seed[32];
+    CPUState *cs;
=20
     if (machine->ram_size < mc->default_ram_size) {
         char *sz =3D size_to_str(mc->default_ram_size);
@@ -153,6 +184,9 @@ static void rx_gdbsim_init(MachineState *machine)
             s->mcu.cpu.env.regs[1] =3D SDRAM_BASE + dtb_offset;
         }
     }
+    for (cs =3D first_cpu; cs; cs =3D CPU_NEXT(cs)) {
+        qemu_register_reset(rx_cpu_reset, RX_CPU(cs));
+    }
 }
=20
 static void rx_gdbsim_class_init(ObjectClass *oc, void *data)
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index 37a6fdd569..528cda486c 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -76,7 +76,6 @@ static void rx_cpu_reset_hold(Object *obj, ResetType type)
     CPUState *cs =3D CPU(obj);
     RXCPUClass *rcc =3D RX_CPU_GET_CLASS(obj);
     CPURXState *env =3D cpu_env(cs);
-    uint32_t *resetvec;
=20
     if (rcc->parent_phases.hold) {
         rcc->parent_phases.hold(obj, type);
@@ -84,11 +83,6 @@ static void rx_cpu_reset_hold(Object *obj, ResetType typ=
e)
=20
     memset(env, 0, offsetof(CPURXState, end_reset_fields));
=20
-    resetvec =3D rom_ptr(0xfffffffc, 4);
-    if (resetvec) {
-        /* In the case of kernel, it is ignored because it is not set. */
-        env->pc =3D ldl_p(resetvec);
-    }
     rx_cpu_unpack_psw(env, 0, 1);
     env->regs[0] =3D env->isp =3D env->usp =3D 0;
     env->fpsw =3D 0;
@@ -142,7 +136,6 @@ static void rx_cpu_realize(DeviceState *dev, Error **er=
rp)
     }
=20
     qemu_init_vcpu(cs);
-    cpu_reset(cs);
=20
     rcc->parent_realize(dev, errp);
 }
@@ -189,6 +182,8 @@ static void rx_cpu_init(Object *obj)
 {
     RXCPU *cpu =3D RX_CPU(obj);
=20
+    cpu->env.reset_pc =3D 0;
+    cpu->env.use_reset_pc =3D false;
     qdev_init_gpio_in(DEVICE(cpu), rx_cpu_set_irq, 2);
 }
=20
diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index 5ba1874bd7..c42a03efb3 100644
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -98,6 +98,9 @@ typedef struct CPUArchState {
     uint32_t ack_ipl;           /* execute ipl */
     float_status fp_status;
     qemu_irq ack;               /* Interrupt acknowledge */
+
+    bool use_reset_pc;          /* Use reset_pc instead of reset vector */
+    uint32_t reset_pc;          /* PC reset value when use_reset_pc */
 } CPURXState;
=20
 /*
--=20
2.47.2