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[201.68.240.180]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73278d09228sm4595533b3a.117.2025.02.18.08.39.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Feb 2025 08:39:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1739896746; x=1740501546; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TYUkm0URlvt/fEHggYoxirTMYLe7QUj525r8nmoUuyU=; b=HSLKx+9/NxxZQJ6O2m27KiDT7MWeehDia9ORGxWrm57Qdo/gAMA3wLGzm+aVToA8lr uD/j25MJfdnK+42QKTVkHENg8R9f0T743TIXfgLO4VdRdT5ovbbHJ9ioTX5IUT+OyoGF 9NhCnp0GduUnzy1lwIJC9kzb7qT1yebVfPvbgTezBcLD9dv+4hqYblzUD5l1STX1XoVk 660sH08Z+mwc3WYbJqMsYc3kAZQOhWA/OogKm0PeIO/vR/L+p7CzMloF55oiC+bcBycm lsxrE0Tp09QO2pfnBXukNYP/UxcNG2UVy79ykyHNKt1XbWYEvGfthYfiGnXc6Huh+QRt trVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1739896746; x=1740501546; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TYUkm0URlvt/fEHggYoxirTMYLe7QUj525r8nmoUuyU=; b=Tjnhmrt81I1Ihi1g162WxjsiDaxNjs+qUVEkrIPwY83EfdRVEddO9fhEVIidih3e0O uX+m+D9v+jCFml0kSt7Y6B7kEYl8WTr5KjxcwjN4bTOViPMQZb7JkVMlb6bMCJwSuYnl f547QPsX1TbwI1k3n4x9DV0IVIHVxub/tw494BU+GYSn24JnjI/ce6GXbxEDeXHS/Knu HQLaxX73SoJm2Ykl40mLwXctV9JHmRyD//uSQs4Asyani8ox2e1zvVX23pVwHEhx0+oe /UKc5LMPCBaLHSMnSSy9G5R1jbNaQWaHwAduZh+F3Gz847OKgVu/jIVhu+1ENqRTrAxh yQeA== X-Gm-Message-State: AOJu0YwfJHuCG2B59KWZOwMXebacXHiNOLEyRrQj1yBcxcIb2WHPevuK pfvL64c8fI+C2CDKKdspbMZ9WCsmdqmiTfRGAQRqA5BpWLIXcFbn3amg3KPgZl4yrUvim5xQ+fZ 6 X-Gm-Gg: ASbGncu9lKaeShzjc7VHYhBZSqzJS0sN1FTsJ2Sv8iS7n9mqb4tjrnjIkT5g3udILQ/ kUNuVMYTugdKOre9A1U7TCOHO6nhxuE8J9MuDKzW2Oy52KsU8pu+buSgb89YGiayjIJ/txyvqDy ITuYVCo9FEcFCgC6EZbCgAZycu3KdmLSgGJkh6/oUSGWMPkzq2Ho6mgoIPorXjzzDq+21XsovGS hlDA91IXvaK32ztdbSSP3WDd5bRO8AKuqQEf8by0x9iU2mhvm5yaH5TRh7j6a7mxH7KNWXcZCl+ 7RTvMyW2dHvh8ZT7mmRU5dsncrqKI/01Vo/NAykAkzpg3KnMiy6e X-Google-Smtp-Source: AGHT+IHtTeK7YiNntz8FIcfbRLXiFgTpoBDoe3qIcisBZRjXMGXrcSzcH+qOvAHyc2QRheznYF6HsA== X-Received: by 2002:a05:6a00:3d06:b0:730:9204:f0c6 with SMTP id d2e1a72fcca58-732618c2a69mr24657445b3a.16.1739896745820; Tue, 18 Feb 2025 08:39:05 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza Subject: [PATCH 2/3] target/riscv/cpu.c: create flag for ziccrse Date: Tue, 18 Feb 2025 13:38:53 -0300 Message-ID: <20250218163854.425607-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250218163854.425607-1-dbarboza@ventanamicro.com> References: <20250218163854.425607-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1739896798940019100 Content-Type: text/plain; charset="utf-8" At this moment ziccrse is a TCG always enable ext that has no flag. KVM will expose ziccrse to users, allowing them to turn it on/off. Signed-off-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 5 +++++ target/riscv/cpu_cfg.h | 3 +++ 2 files changed, 8 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 522d6584e4..0b8d2c0c25 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1711,6 +1711,11 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = =3D { MULTI_EXT_CFG_BOOL("zvksc", ext_zvksc, false), MULTI_EXT_CFG_BOOL("zvksg", ext_zvksg, false), =20 + /* + * KVM can turn it on/off. For TCG this is always + * enabled if priv_ver >=3D 1.11. + */ + MULTI_EXT_CFG_BOOL("ziccrse", ext_ziccrse, true), { }, }; =20 diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h index 3f3c1118c0..88565e29fd 100644 --- a/target/riscv/cpu_cfg.h +++ b/target/riscv/cpu_cfg.h @@ -157,6 +157,9 @@ struct RISCVCPUConfig { bool ext_ssstateen; bool ext_sha; =20 + /* Always enabled for TCG, KVM wants to switch it on/off */ + bool ext_ziccrse; + /* * Always 'true' booleans for named features * TCG always implement/can't be user disabled, --=20 2.48.1