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b=U8QZqUwDz++UEAw9oz9yD4DipW4DImBLO pge6bP8fk5xpGC81V2bnlJgq1pkeXpFcR0aBSBKvc6C6lScZiv7LpSv6YhXDFUtu zM7qVSGInPYHe/DnFz4vamX739fW/k0sOK8PQ4JCV1s94qIUW7HrK7rESfOXfRMQ 2vRnOqxvt6ccPsLmwJ+9yunZH0jFBq3HIbHZwpYLfZ3QWPr4xBA6LlNTYdQRvWfZ +uSNZwpCgXtWC1pwu+0ntTfIAPK6c1Mfv76C7kkw2Dqi6Rat9yXp6Sa57eT857i6 BwwpUq2zSDfC1KcTUKXQIWIJ0HQhXGKvM0u9rqRHbVpjxj4tbZIjg== From: Aditya Gupta To: Cc: , Nicholas Piggin , =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Barrat?= , Sourabh Jain , Mahesh J Salgaonkar , Hari Bathini Subject: [PATCH 3/7] hw/ppc: Handle stash command in PowerNV SBE Date: Mon, 17 Feb 2025 12:49:30 +0530 Message-ID: <20250217071934.86131-4-adityag@linux.ibm.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250217071934.86131-1-adityag@linux.ibm.com> References: <20250217071934.86131-1-adityag@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 6wY_fItFNPK-jBm_uTvrMfMXPb-MYnWv X-Proofpoint-ORIG-GUID: kqtqYAR6KnuDlgrnr7b3sVsibkZyQauC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-17_03,2025-02-13_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 mlxlogscore=999 bulkscore=0 spamscore=0 priorityscore=1501 suspectscore=0 malwarescore=0 adultscore=0 impostorscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502170060 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=adityag@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.01, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1739776824109019000 Content-Type: text/plain; charset="utf-8" Earlier since the SBE_CMD_STASH_MPIPL_CONFIG command was not handled, so skiboot used to not get any response from SBE: [ 106.350742821,3] SBE: Message timeout [chip id =3D 0], cmd =3D d7, s= ubcmd =3D 7 [ 106.352067746,3] SBE: Failed to send stash MPIPL config [chip id =3D= 0x0, rc =3D 254] Fix this by handling the command in PowerNV SBE, and sending a response so skiboot knows SBE has handled the STASH command The stashed skiboot base is later used to access the relocated MDST/MDDT tables when MPIPL is implemented. The purpose of stashing relocated base address is explained in following skiboot commit: author Vasant Hegde Fri Jul 12 16:47:5= 1 2019 +0530 committer Oliver O'Halloran Thu Aug 15 17:53:39 2019= +1000 SBE: Send OPAL relocated base address to SBE OPAL relocates itself during boot. During memory preserving IPL hostb= oot needs to access relocated OPAL base address to get MDST, MDDT tables. Hence= send relocated base address to SBE via 'stash MPIPL config' chip-op. Durin= g next IPL SBE will send stashed data to hostboot... so that hostboot can ac= cess these data. Signed-off-by: Aditya Gupta --- hw/ppc/pnv_sbe.c | 25 +++++++++++++++++++++++++ include/hw/ppc/pnv_sbe.h | 3 +++ 2 files changed, 28 insertions(+) diff --git a/hw/ppc/pnv_sbe.c b/hw/ppc/pnv_sbe.c index a6bf13650f2d..79818177fc36 100644 --- a/hw/ppc/pnv_sbe.c +++ b/hw/ppc/pnv_sbe.c @@ -82,6 +82,8 @@ #define SBE_CONTROL_REG_S0 PPC_BIT(14) #define SBE_CONTROL_REG_S1 PPC_BIT(15) =20 +static uint64_t mpipl_skiboot_base =3D 0x30000000 /*default SKIBOOT_BASE*/; + static void pnv_sbe_set_host_doorbell(PnvSBE *sbe, uint64_t val) { val &=3D SBE_HOST_RESPONSE_MASK; /* Is this right? What does HW do? */ @@ -281,6 +283,29 @@ static void do_sbe_msg(PnvSBE *sbe) timer_del(sbe->timer); } break; + case SBE_CMD_STASH_MPIPL_CONFIG: + /* key =3D sbe->mbox[1] */ + switch (sbe->mbox[1]) { + case SBE_STASH_KEY_SKIBOOT_BASE: + mpipl_skiboot_base =3D sbe->mbox[2]; + qemu_log_mask(LOG_UNIMP, + "Stashing skiboot base: 0x%lx\n", mpipl_skiboot_base); + + /* + * Set the response register. + * + * Currently setting the same sequence number in + * response as we got in the request. + */ + sbe->mbox[4] =3D sbe->mbox[0]; /* sequence number */ + pnv_sbe_set_host_doorbell(sbe, + sbe->host_doorbell | SBE_HOST_RESPONSE_WAITING); + + break; + default: + qemu_log_mask(LOG_UNIMP, "SBE Unimplemented command: 0x%x\n", = cmd); + } + break; default: qemu_log_mask(LOG_UNIMP, "SBE Unimplemented command: 0x%x\n", cmd); } diff --git a/include/hw/ppc/pnv_sbe.h b/include/hw/ppc/pnv_sbe.h index b6b378ad14c7..f6cbcf990ed9 100644 --- a/include/hw/ppc/pnv_sbe.h +++ b/include/hw/ppc/pnv_sbe.h @@ -53,4 +53,7 @@ struct PnvSBEClass { const MemoryRegionOps *xscom_mbox_ops; }; =20 +/* Helper to access stashed SKIBOOT_BASE */ +bool pnv_sbe_mpipl_skiboot_base(void); + #endif /* PPC_PNV_SBE_H */ --=20 2.48.1