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From: Sebastian Huber <sebastian.huber@embedded-brains.de>
To: qemu-devel@nongnu.org
Cc: Conor Dooley <conor.dooley@microchip.com>,
Bin Meng <bin.meng@windriver.com>
Subject: [PATCH 4/5] hw/riscv: Allow direct start of kernel for MPFS
Date: Fri, 14 Feb 2025 07:24:41 +0100
Message-ID: <20250214062443.9936-5-sebastian.huber@embedded-brains.de>
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Further customize the -bios and -kernel options behaviour for the
microchip-icicle-kit machine. If "-bios none -kernel filename" is
specified, then do not load a firmware and instead only load and start
the kernel image.
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
---
hw/riscv/microchip_pfsoc.c | 56 ++++++++++++++++++++++++++------------
1 file changed, 39 insertions(+), 17 deletions(-)
diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
index f9e256df52..76a2c56419 100644
--- a/hw/riscv/microchip_pfsoc.c
+++ b/hw/riscv/microchip_pfsoc.c
@@ -578,29 +578,44 @@ static void microchip_icicle_kit_machine_init(Machine=
State *machine)
}
=20
/*
- * We follow the following table to select which payload we execute.
+ * We follow the following table to select which firmware we use.
*
- * -bios | -kernel | payload
- * -------+------------+--------
- * N | N | HSS
- * Y | don't care | HSS
- * N | Y | kernel
- *
- * This ensures backwards compatibility with how we used to expose -bi=
os
- * to users but allows them to run through direct kernel booting as we=
ll.
+ * -bios | -kernel | firmware
+ * --------------+------------+--------
+ * none | N | error
+ * none | Y | kernel
+ * NULL, default | N | BIOS_FILENAME
+ * NULL, default | Y | RISCV64_BIOS_BIN
+ * other | don't care | other
*/
+ if (machine->firmware && !strcmp(machine->firmware, "none")) {
+ if (!machine->kernel_filename) {
+ error_report("for -bios none, a kernel is required");
+ exit(1);
+ }
=20
- if (machine->kernel_filename) {
- firmware_name =3D RISCV64_BIOS_BIN;
- firmware_load_addr =3D memmap[MICROCHIP_PFSOC_DRAM_LO].base;
+ firmware_name =3D NULL;
+ firmware_load_addr =3D RESET_VECTOR;
+ } else if (!machine->firmware || !strcmp(machine->firmware, "default")=
) {
+ if (machine->kernel_filename) {
+ firmware_name =3D RISCV64_BIOS_BIN;
+ firmware_load_addr =3D memmap[MICROCHIP_PFSOC_DRAM_LO].base;
+ } else {
+ firmware_name =3D BIOS_FILENAME;
+ firmware_load_addr =3D RESET_VECTOR;
+ }
} else {
- firmware_name =3D BIOS_FILENAME;
+ firmware_name =3D machine->firmware;
firmware_load_addr =3D RESET_VECTOR;
}
=20
- /* Load the firmware */
- firmware_end_addr =3D riscv_find_and_load_firmware(machine, firmware_n=
ame,
- &firmware_load_addr, =
NULL);
+ /* Load the firmware if necessary */
+ if (firmware_name) {
+ firmware_end_addr =3D riscv_load_firmware(firmware_name,
+ &firmware_load_addr, NULL);
+ } else {
+ firmware_end_addr =3D firmware_load_addr;
+ }
=20
riscv_boot_info_init(&boot_info, &s->soc.u_cpus);
if (machine->kernel_filename) {
@@ -635,8 +650,15 @@ static void microchip_icicle_kit_machine_init(MachineS=
tate *machine)
fdt_load_addr =3D 0;
}
=20
+ hwaddr start_addr;
+ if (firmware_name) {
+ start_addr =3D firmware_load_addr;
+ } else {
+ start_addr =3D kernel_entry;
+ }
+
/* Load the reset vector */
- riscv_setup_rom_reset_vec(machine, &s->soc.u_cpus, firmware_load_a=
ddr,
+ riscv_setup_rom_reset_vec(machine, &s->soc.u_cpus, start_addr,
memmap[MICROCHIP_PFSOC_ENVM_DATA].base,
memmap[MICROCHIP_PFSOC_ENVM_DATA].size,
kernel_entry, fdt_load_addr);
--=20
2.43.0