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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dc5839877sm15541563f8f.3.2025.02.12.03.24.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 12 Feb 2025 03:24:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1739359475; x=1739964275; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5sBJFg/2U3gLaznSuaixmYZ3AuMYFa/wvF5v+/9TO7s=; b=UCuySHPHXCYpTq5su3ihQ9KJ+jcbi078VqspFqiK4IovfLttDyBmUO6OxFFBf7R0uq gg0v2ZXZVLg3FMm8TfE2yy4biPnPvtUffjx/T9m8SyAs7d7ygkGMOnE/lsv33Zpg9UwD vPM+Q5DDlSD6NENsL54che5x4GTeLeqQgXTViDKwt/Q0mI6cm9/nPS3hAA4EDisch167 y0J107TKP3knTVn1EdeKfSbelMFyPaq/uY3jIfGWDVv1l0yHAdyoJQIr/kASTgUgU7Vw ZsCtCFDFnR9eEB9ruGi8Cw2WypXNwxElPBNCZxKNh5HmFiZyrLV1FwY19StAdZGKxhhP +Dnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1739359475; x=1739964275; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5sBJFg/2U3gLaznSuaixmYZ3AuMYFa/wvF5v+/9TO7s=; b=Z3m9WOxKs8OWzh9GASXE/nl9yShl9ig2dBEqxU2W9ZNFjHWsdxZR2ewqIL+u6w5REf acA8GuWUydYgwmxl9JdfhwRXPR9+FSFxXL20X5fGNMmR481O09F522Hp0Q4op7uP2y8O UaAy+YU+2hnnRoRA9daYV+0nGRpbH9c/JnvjNERCzf51H0mBJELlf0vaGcGrA9b8krzK TGuLSe004uIzoAVWM6ydQUaQGnYzj4K2RbwOltESp1sUuwIK0m5JKMho5jzSwUYLiBlB f9xF82p0jBYQJuYQBjs/UMQCEwRzjyTo0xW/H6vfFbTGL3XOIiIcbDK9/KEGkft6MR0k ZITg== X-Gm-Message-State: AOJu0Yw0LEEd4Og05jPMgdEfD3QtVbXOqGVMvx6ZhSkDa9jW+YI28EVq /DdpcpzPQgXMbZAIn2y3U8ptLd8EWKuVG4bYAlOrHYgb+8RWplxpYQY4N5KDs82LC2O+CAhANph F8T4= X-Gm-Gg: ASbGncu60rmf638xqmQRgTbybAhXO0wYxi+iU5GPBRF9EV/S0cZ2kp/M5MM7idsX7Sj m8lI2UrZkFqx3KizKKIVZF3pJggpYoteGqp7DwUmU5IbBjVOYCi45BqtzNTGa0vbgfrO+BugFw5 /75WDJue+ry+fHRRaU+V0r49UtylEytZIewEKaZ8Od9HylWs0rQHn/jsTPCXXXo9TURjMDbAALH djPLQAoi+5Xicwl5Cj7yJdR44JsAcjkUx+2attOMC7J3oU/jeUvA3QorNgvz+xZ4svIwU9ettqh qQDj7YLut2W/T8Bhzo3jtWGdxqUraeYKVXdCmekjLligx8zEb/8AdwvqL/OUP0uJtA== X-Google-Smtp-Source: AGHT+IEURfDFVJ/dO2Ysfdkjk5ZK5+eBFiptzfiwsTd3i0r/Wum23xpwmZ7z5LqDnPWav+q0CTmkaA== X-Received: by 2002:adf:f08c:0:b0:38d:dce7:86cd with SMTP id ffacd0b85a97d-38dea28f6d6mr1798830f8f.24.1739359475092; Wed, 12 Feb 2025 03:24:35 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, "Edgar E. Iglesias" , Alistair Francis , Richard Henderson , Thomas Huth , Markus Armbruster , qemu-arm@nongnu.org, =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v6 04/11] hw/timer/xilinx_timer: Make device endianness configurable Date: Wed, 12 Feb 2025 12:24:06 +0100 Message-ID: <20250212112413.37553-5-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250212112413.37553-1-philmd@linaro.org> References: <20250212112413.37553-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1739359536892019100 Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair of DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN. Add the "little-endian" property to select the device endianness, defaulting to little endian. Set the proper endianness for each machine using the device. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/microblaze/petalogix_ml605_mmu.c | 1 + hw/microblaze/petalogix_s3adsp1800_mmu.c | 1 + hw/ppc/virtex_ml507.c | 1 + hw/riscv/microblaze-v-generic.c | 2 ++ hw/timer/xilinx_timer.c | 43 +++++++++++++++++------- 5 files changed, 35 insertions(+), 13 deletions(-) diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_= ml605_mmu.c index 55398cc67d1..490640e9428 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -127,6 +127,7 @@ petalogix_ml605_init(MachineState *machine) =20 /* 2 timers at irq 2 @ 100 Mhz. */ dev =3D qdev_new("xlnx.xps-timer"); + qdev_prop_set_enum(dev, "endianness", ENDIAN_MODE_LITTLE); qdev_prop_set_uint32(dev, "one-timer-only", 0); qdev_prop_set_uint32(dev, "clock-frequency", 100 * 1000000); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petal= ogix_s3adsp1800_mmu.c index d419dc49a25..caaea222a8c 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -116,6 +116,7 @@ petalogix_s3adsp1800_init(MachineState *machine) =20 /* 2 timers at irq 2 @ 62 Mhz. */ dev =3D qdev_new("xlnx.xps-timer"); + qdev_prop_set_enum(dev, "endianness", endianness); qdev_prop_set_uint32(dev, "one-timer-only", 0); qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index df8f9644829..a01354d991d 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -231,6 +231,7 @@ static void virtex_init(MachineState *machine) =20 /* 2 timers at irq 2 @ 62 Mhz. */ dev =3D qdev_new("xlnx.xps-timer"); + qdev_prop_set_enum(dev, "endianness", ENDIAN_MODE_BIG); qdev_prop_set_uint32(dev, "one-timer-only", 0); qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); diff --git a/hw/riscv/microblaze-v-generic.c b/hw/riscv/microblaze-v-generi= c.c index a21fdfbe6db..3c79f5733b2 100644 --- a/hw/riscv/microblaze-v-generic.c +++ b/hw/riscv/microblaze-v-generic.c @@ -104,6 +104,7 @@ static void mb_v_generic_init(MachineState *machine) =20 /* 2 timers at irq 0 @ 100 Mhz. */ dev =3D qdev_new("xlnx.xps-timer"); + qdev_prop_set_enum(dev, "endianness", ENDIAN_MODE_LITTLE); qdev_prop_set_uint32(dev, "one-timer-only", 0); qdev_prop_set_uint32(dev, "clock-frequency", 100000000); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); @@ -112,6 +113,7 @@ static void mb_v_generic_init(MachineState *machine) =20 /* 2 timers at irq 3 @ 100 Mhz. */ dev =3D qdev_new("xlnx.xps-timer"); + qdev_prop_set_enum(dev, "endianness", ENDIAN_MODE_LITTLE); qdev_prop_set_uint32(dev, "one-timer-only", 0); qdev_prop_set_uint32(dev, "clock-frequency", 100000000); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c index 6595cf5f517..8cd44fd6925 100644 --- a/hw/timer/xilinx_timer.c +++ b/hw/timer/xilinx_timer.c @@ -3,6 +3,9 @@ * * Copyright (c) 2009 Edgar E. Iglesias. * + * DS573: https://docs.amd.com/v/u/en-US/xps_timer + * LogiCORE IP XPS Timer/Counter (v1.02a) + * * Permission is hereby granted, free of charge, to any person obtaining a= copy * of this software and associated documentation files (the "Software"), t= o deal * in the Software without restriction, including without limitation the r= ights @@ -23,10 +26,12 @@ */ =20 #include "qemu/osdep.h" +#include "qapi/error.h" #include "hw/sysbus.h" #include "hw/irq.h" #include "hw/ptimer.h" #include "hw/qdev-properties.h" +#include "hw/qdev-properties-system.h" #include "qemu/log.h" #include "qemu/module.h" #include "qom/object.h" @@ -69,6 +74,7 @@ struct XpsTimerState { SysBusDevice parent_obj; =20 + EndianMode model_endianness; MemoryRegion mmio; qemu_irq irq; uint8_t one_timer_only; @@ -189,18 +195,21 @@ timer_write(void *opaque, hwaddr addr, timer_update_irq(t); } =20 -static const MemoryRegionOps timer_ops =3D { - .read =3D timer_read, - .write =3D timer_write, - .endianness =3D DEVICE_NATIVE_ENDIAN, - .impl =3D { - .min_access_size =3D 4, - .max_access_size =3D 4, +static const MemoryRegionOps timer_ops[2] =3D { + [0 ... 1] =3D { + .read =3D timer_read, + .write =3D timer_write, + .impl =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + }, + .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + }, }, - .valid =3D { - .min_access_size =3D 4, - .max_access_size =3D 4 - } + [ENDIAN_MODE_BIG].endianness =3D DEVICE_BIG_ENDIAN, + [ENDIAN_MODE_LITTLE].endianness =3D DEVICE_LITTLE_ENDIAN, }; =20 static void timer_hit(void *opaque) @@ -220,6 +229,12 @@ static void xilinx_timer_realize(DeviceState *dev, Err= or **errp) XpsTimerState *t =3D XILINX_TIMER(dev); unsigned int i; =20 + if (t->model_endianness =3D=3D ENDIAN_MODE_UNSPECIFIED) { + error_setg(errp, TYPE_XILINX_TIMER " property 'endianness'" + " must be set to 'big' or 'little'"); + return; + } + /* Init all the ptimers. */ t->timers =3D g_malloc0(sizeof t->timers[0] * num_timers(t)); for (i =3D 0; i < num_timers(t); i++) { @@ -233,8 +248,9 @@ static void xilinx_timer_realize(DeviceState *dev, Erro= r **errp) ptimer_transaction_commit(xt->ptimer); } =20 - memory_region_init_io(&t->mmio, OBJECT(t), &timer_ops, t, "xlnx.xps-ti= mer", - R_MAX * 4 * num_timers(t)); + memory_region_init_io(&t->mmio, OBJECT(t), + &timer_ops[t->model_endianness], t, + "xlnx.xps-timer", R_MAX * 4 * num_timers(t)); sysbus_init_mmio(SYS_BUS_DEVICE(dev), &t->mmio); } =20 @@ -247,6 +263,7 @@ static void xilinx_timer_init(Object *obj) } =20 static const Property xilinx_timer_properties[] =3D { + DEFINE_PROP_ENDIAN_NODEFAULT("endianness", XpsTimerState, model_endian= ness), DEFINE_PROP_UINT32("clock-frequency", XpsTimerState, freq_hz, 62 * 100= 0000), DEFINE_PROP_UINT8("one-timer-only", XpsTimerState, one_timer_only, 0), }; --=20 2.47.1