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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1739284438; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=nuZgyJJ6uzrMusuF8NKNoMLEnL5jN1exIdsO7K2P/NI=; b=aIPwXz9Pky2OVHaSLqTg/zGg8EsUOHNmBkT5IBrFLKZpxwHVkMkrW/fusx1N5IwNrwWO3+ gfIMvejrFRfdWcZAXQxc6Q2yT+elCDEdGmZIDvvcl3GneAbpIxICfkrbIMUhBI/t36G+8c i42CYDMDq52FXBX6TlUZg0YNqXNVgTQ= X-MC-Unique: ieB-94FdPpOq7OQIHRLixQ-1 X-Mimecast-MFC-AGG-ID: ieB-94FdPpOq7OQIHRLixQ From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-devel@nongnu.org Cc: Alex Williamson , Tomita Moeko , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PULL 04/12] vfio/igd: use VFIOConfigMirrorQuirk for mirrored registers Date: Tue, 11 Feb 2025 15:33:32 +0100 Message-ID: <20250211143340.787996-5-clg@redhat.com> In-Reply-To: <20250211143340.787996-1-clg@redhat.com> References: <20250211143340.787996-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.54, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1739284509292019000 From: Tomita Moeko With the introduction of config_offset field, VFIOConfigMirrorQuirk can now be used for those mirrored register in igd bar0. This eliminates the need for the macro intoduced in 1a2623b5c9e7 ("vfio/igd: add macro for declaring mirrored registers"). Signed-off-by: Tomita Moeko Reviewed-by: Alex Williamson Link: https://lore.kernel.org/r/20250104154219.7209-4-tomitamoeko@gmail.com Signed-off-by: C=C3=A9dric Le Goater --- hw/vfio/igd.c | 125 +++++++++++++------------------------------------- 1 file changed, 31 insertions(+), 94 deletions(-) diff --git a/hw/vfio/igd.c b/hw/vfio/igd.c index b5303ea565d6a344d0a43273f288bbb4a7f48327..b1a237edd6608aab71c03036abe= f5c5d3cbcf12f 100644 --- a/hw/vfio/igd.c +++ b/hw/vfio/igd.c @@ -18,6 +18,7 @@ #include "hw/hw.h" #include "hw/nvram/fw_cfg.h" #include "pci.h" +#include "pci-quirks.h" #include "trace.h" =20 /* @@ -422,83 +423,13 @@ static const MemoryRegionOps vfio_igd_index_quirk =3D= { .endianness =3D DEVICE_LITTLE_ENDIAN, }; =20 -static uint64_t vfio_igd_pci_config_read(VFIOPCIDevice *vdev, uint64_t off= set, - unsigned size) -{ - switch (size) { - case 1: - return pci_get_byte(vdev->pdev.config + offset); - case 2: - return pci_get_word(vdev->pdev.config + offset); - case 4: - return pci_get_long(vdev->pdev.config + offset); - case 8: - return pci_get_quad(vdev->pdev.config + offset); - default: - hw_error("igd: unsupported pci config read at %"PRIx64", size %u", - offset, size); - break; - } - - return 0; -} - -static void vfio_igd_pci_config_write(VFIOPCIDevice *vdev, uint64_t offset, - uint64_t data, unsigned size) -{ - switch (size) { - case 1: - pci_set_byte(vdev->pdev.config + offset, data); - break; - case 2: - pci_set_word(vdev->pdev.config + offset, data); - break; - case 4: - pci_set_long(vdev->pdev.config + offset, data); - break; - case 8: - pci_set_quad(vdev->pdev.config + offset, data); - break; - default: - hw_error("igd: unsupported pci config write at %"PRIx64", size %u", - offset, size); - break; - } -} - -#define VFIO_IGD_QUIRK_MIRROR_REG(reg, name) \ -static uint64_t vfio_igd_quirk_read_##name(void *opaque, \ - hwaddr addr, unsigned size) \ -{ \ - VFIOPCIDevice *vdev =3D opaque; \ - \ - return vfio_igd_pci_config_read(vdev, reg + addr, size); \ -} \ - \ -static void vfio_igd_quirk_write_##name(void *opaque, hwaddr addr, \ - uint64_t data, unsigned size) \ -{ \ - VFIOPCIDevice *vdev =3D opaque; \ - \ - vfio_igd_pci_config_write(vdev, reg + addr, data, size); \ -} \ - \ -static const MemoryRegionOps vfio_igd_quirk_mirror_##name =3D { \ - .read =3D vfio_igd_quirk_read_##name, \ - .write =3D vfio_igd_quirk_write_##name, \ - .endianness =3D DEVICE_LITTLE_ENDIAN, \ -}; - -VFIO_IGD_QUIRK_MIRROR_REG(IGD_GMCH, ggc) -VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM, bdsm) -VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM_GEN11, bdsm64) - #define IGD_GGC_MMIO_OFFSET 0x108040 #define IGD_BDSM_MMIO_OFFSET 0x1080C0 =20 void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr) { - VFIOQuirk *quirk; + VFIOQuirk *ggc_quirk, *bdsm_quirk; + VFIOConfigMirrorQuirk *ggc_mirror, *bdsm_mirror; int gen; =20 /* @@ -522,33 +453,39 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, i= nt nr) return; } =20 - quirk =3D vfio_quirk_alloc(2); - quirk->data =3D vdev; + ggc_quirk =3D vfio_quirk_alloc(1); + ggc_mirror =3D ggc_quirk->data =3D g_malloc0(sizeof(*ggc_mirror)); + ggc_mirror->mem =3D ggc_quirk->mem; + ggc_mirror->vdev =3D vdev; + ggc_mirror->bar =3D nr; + ggc_mirror->offset =3D IGD_GGC_MMIO_OFFSET; + ggc_mirror->config_offset =3D IGD_GMCH; =20 - memory_region_init_io(&quirk->mem[0], OBJECT(vdev), - &vfio_igd_quirk_mirror_ggc, vdev, + memory_region_init_io(ggc_mirror->mem, OBJECT(vdev), + &vfio_generic_mirror_quirk, ggc_mirror, "vfio-igd-ggc-quirk", 2); - memory_region_add_subregion_overlap(vdev->bars[0].region.mem, - IGD_GGC_MMIO_OFFSET, &quirk->mem[0= ], + memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, + ggc_mirror->offset, ggc_mirror->me= m, 1); =20 - if (gen < 11) { - memory_region_init_io(&quirk->mem[1], OBJECT(vdev), - &vfio_igd_quirk_mirror_bdsm, vdev, - "vfio-igd-bdsm-quirk", 4); - memory_region_add_subregion_overlap(vdev->bars[0].region.mem, - IGD_BDSM_MMIO_OFFSET, - &quirk->mem[1], 1); - } else { - memory_region_init_io(&quirk->mem[1], OBJECT(vdev), - &vfio_igd_quirk_mirror_bdsm64, vdev, - "vfio-igd-bdsm-quirk", 8); - memory_region_add_subregion_overlap(vdev->bars[0].region.mem, - IGD_BDSM_MMIO_OFFSET, - &quirk->mem[1], 1); - } + QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, ggc_quirk, next); =20 - QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next); + bdsm_quirk =3D vfio_quirk_alloc(1); + bdsm_mirror =3D bdsm_quirk->data =3D g_malloc0(sizeof(*bdsm_mirror)); + bdsm_mirror->mem =3D bdsm_quirk->mem; + bdsm_mirror->vdev =3D vdev; + bdsm_mirror->bar =3D nr; + bdsm_mirror->offset =3D IGD_BDSM_MMIO_OFFSET; + bdsm_mirror->config_offset =3D (gen < 11) ? IGD_BDSM : IGD_BDSM_GEN11; + + memory_region_init_io(bdsm_mirror->mem, OBJECT(vdev), + &vfio_generic_mirror_quirk, bdsm_mirror, + "vfio-igd-bdsm-quirk", (gen < 11) ? 4 : 8); + memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, + bdsm_mirror->offset, bdsm_mirror->= mem, + 1); + + QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, bdsm_quirk, next); } =20 void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr) --=20 2.48.1