From nobody Fri Apr 4 21:40:14 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1739243350026715.4079674412757; Mon, 10 Feb 2025 19:09:10 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thgdo-0007BW-QL; Mon, 10 Feb 2025 22:08:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1thgdm-0007AQ-Ni for qemu-devel@nongnu.org; Mon, 10 Feb 2025 22:08:50 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thgdj-0000Lj-2A for qemu-devel@nongnu.org; Mon, 10 Feb 2025 22:08:49 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8CxeXE2v6pn_tZxAA--.1529S3; Tue, 11 Feb 2025 11:08:38 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCxbsUyv6pnL1YLAA--.43924S3; Tue, 11 Feb 2025 11:08:37 +0800 (CST) From: Bibo Mao To: Song Gao , Paolo Bonzini , Zhao Liu , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Cc: Jiaxun Yang , Xianglai Li , qemu-devel@nongnu.org Subject: [PATCH v5 1/7] hw/loongarch/virt: Add CPU topology support Date: Tue, 11 Feb 2025 11:08:28 +0800 Message-Id: <20250211030834.3276732-2-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250211030834.3276732-1-maobibo@loongson.cn> References: <20250211030834.3276732-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCxbsUyv6pnL1YLAA--.43924S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1739243353996019000 Content-Type: text/plain; charset="utf-8" Add topological relationships for Loongarch VCPU and initialize topology member variables. On LoongArch system there is socket/core/thread topo information, physical CPU id is calculated from CPU topo, every topo sub-field is aligned by power of 2. So it is different from logical cpu index. Co-developed-by: Xianglai Li Signed-off-by: Bibo Mao --- hw/loongarch/virt.c | 59 ++++++++++++++++++++++++++++++++++++------ target/loongarch/cpu.h | 6 +++++ 2 files changed, 57 insertions(+), 8 deletions(-) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 355be14ccc..cc53cf0b4a 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -782,6 +782,48 @@ static void virt_initfn(Object *obj) virt_flash_create(lvms); } =20 +static void virt_get_topo_from_index(MachineState *ms, + LoongArchCPUTopo *topo, int index) +{ + topo->socket_id =3D index / (ms->smp.cores * ms->smp.threads); + topo->core_id =3D index / ms->smp.threads % ms->smp.cores; + topo->thread_id =3D index % ms->smp.threads; +} + +static unsigned int topo_align_up(unsigned int count) +{ + g_assert(count >=3D 1); + count -=3D 1; + return BIT(count ? 32 - clz32(count) : 0); +} + +/* + * LoongArch Reference Manual Vol1, Chapter 7.4.12 CPU Identity + * For CPU architecture, bit0 .. bit8 is valid for CPU id, max cpuid is 5= 12 + * However for IPI/Eiointc interrupt controller, max supported cpu id for + * irq routingis 256 + * + * Here max cpu id is 256 for virt machine + */ +static int virt_get_arch_id_from_topo(MachineState *ms, LoongArchCPUTopo *= topo) +{ + int arch_id, threads, cores, sockets; + + threads =3D topo_align_up(ms->smp.threads); + cores =3D topo_align_up(ms->smp.cores); + sockets =3D topo_align_up(ms->smp.sockets); + if ((threads * cores * sockets) > 256) { + error_report("Exceeding max cpuid 256 with sockets[%d] cores[%d]" + " threads[%d]", ms->smp.sockets, ms->smp.cores, + ms->smp.threads); + exit(1); + } + + arch_id =3D topo->thread_id + topo->core_id * threads; + arch_id +=3D topo->socket_id * threads * cores; + return arch_id; +} + static bool memhp_type_supported(DeviceState *dev) { /* we only support pc dimm now */ @@ -881,8 +923,9 @@ static HotplugHandler *virt_get_hotplug_handler(Machine= State *machine, =20 static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms) { - int n; + int n, arch_id; unsigned int max_cpus =3D ms->smp.max_cpus; + LoongArchCPUTopo topo; =20 if (ms->possible_cpus) { assert(ms->possible_cpus->len =3D=3D max_cpus); @@ -893,17 +936,17 @@ static const CPUArchIdList *virt_possible_cpu_arch_id= s(MachineState *ms) sizeof(CPUArchId) * max_cpus); ms->possible_cpus->len =3D max_cpus; for (n =3D 0; n < ms->possible_cpus->len; n++) { + virt_get_topo_from_index(ms, &topo, n); + arch_id =3D virt_get_arch_id_from_topo(ms, &topo); ms->possible_cpus->cpus[n].type =3D ms->cpu_type; - ms->possible_cpus->cpus[n].arch_id =3D n; - + ms->possible_cpus->cpus[n].arch_id =3D arch_id; + ms->possible_cpus->cpus[n].vcpus_count =3D 1; ms->possible_cpus->cpus[n].props.has_socket_id =3D true; - ms->possible_cpus->cpus[n].props.socket_id =3D - n / (ms->smp.cores * ms->smp.threads); + ms->possible_cpus->cpus[n].props.socket_id =3D topo.socket_id; ms->possible_cpus->cpus[n].props.has_core_id =3D true; - ms->possible_cpus->cpus[n].props.core_id =3D - n / ms->smp.threads % ms->smp.cores; + ms->possible_cpus->cpus[n].props.core_id =3D topo.core_id; ms->possible_cpus->cpus[n].props.has_thread_id =3D true; - ms->possible_cpus->cpus[n].props.thread_id =3D n % ms->smp.threads; + ms->possible_cpus->cpus[n].props.thread_id =3D topo.thread_id; } return ms->possible_cpus; } diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index f2a23b7a43..8c13ee6bd8 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -390,6 +390,12 @@ typedef struct CPUArchState { #endif } CPULoongArchState; =20 +typedef struct LoongArchCPUTopo { + int32_t socket_id; /* socket-id of this VCPU */ + int32_t core_id; /* core-id of this VCPU */ + int32_t thread_id; /* thread-id of this VCPU */ +} LoongArchCPUTopo; + /** * LoongArchCPU: * @env: #CPULoongArchState --=20 2.39.3 From nobody Fri Apr 4 21:40:14 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1739243366121299.1888045857702; Mon, 10 Feb 2025 19:09:26 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thgdq-0007Ch-BM; Mon, 10 Feb 2025 22:08:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1thgdm-0007AP-N9 for qemu-devel@nongnu.org; Mon, 10 Feb 2025 22:08:50 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thgdj-0000Lk-29 for qemu-devel@nongnu.org; Mon, 10 Feb 2025 22:08:49 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxOGo2v6pnA9dxAA--.1616S3; Tue, 11 Feb 2025 11:08:38 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCxbsUyv6pnL1YLAA--.43924S4; Tue, 11 Feb 2025 11:08:37 +0800 (CST) From: Bibo Mao To: Song Gao , Paolo Bonzini , Zhao Liu , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Cc: Jiaxun Yang , Xianglai Li , qemu-devel@nongnu.org Subject: [PATCH v5 2/7] hw/loongarch/virt: Add topo properties on CPU object Date: Tue, 11 Feb 2025 11:08:29 +0800 Message-Id: <20250211030834.3276732-3-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250211030834.3276732-1-maobibo@loongson.cn> References: <20250211030834.3276732-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCxbsUyv6pnL1YLAA--.43924S4 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1739243368972019100 Content-Type: text/plain; charset="utf-8" Add some properties such as socket_id, core_id, thread_id and node_id on LoongArch CPU object. Co-developed-by: Xianglai Li Signed-off-by: Bibo Mao --- target/loongarch/cpu.c | 9 +++++++++ target/loongarch/cpu.h | 4 ++++ 2 files changed, 13 insertions(+) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index e91f4a5239..3c877312cd 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -14,6 +14,7 @@ #include "system/tcg.h" #include "system/kvm.h" #include "kvm/kvm_loongarch.h" +#include "hw/qdev-properties.h" #include "exec/exec-all.h" #include "exec/translation-block.h" #include "cpu.h" @@ -909,6 +910,13 @@ static int64_t loongarch_cpu_get_arch_id(CPUState *cs) } #endif =20 +static const Property loongarch_cpu_properties[] =3D { + DEFINE_PROP_INT32("socket-id", LoongArchCPU, socket_id, 0), + DEFINE_PROP_INT32("core-id", LoongArchCPU, core_id, 0), + DEFINE_PROP_INT32("thread-id", LoongArchCPU, thread_id, 0), + DEFINE_PROP_INT32("node-id", LoongArchCPU, node_id, CPU_UNSET_NUMA_NOD= E_ID), +}; + static void loongarch_cpu_class_init(ObjectClass *c, void *data) { LoongArchCPUClass *lacc =3D LOONGARCH_CPU_CLASS(c); @@ -916,6 +924,7 @@ static void loongarch_cpu_class_init(ObjectClass *c, vo= id *data) DeviceClass *dc =3D DEVICE_CLASS(c); ResettableClass *rc =3D RESETTABLE_CLASS(c); =20 + device_class_set_props(dc, loongarch_cpu_properties); device_class_set_parent_realize(dc, loongarch_cpu_realizefn, &lacc->parent_realize); resettable_class_set_parent_phases(rc, NULL, loongarch_cpu_reset_hold,= NULL, diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 8c13ee6bd8..0fb82a218b 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -412,6 +412,10 @@ struct ArchCPU { OnOffAuto pmu; OnOffAuto lsx; OnOffAuto lasx; + int32_t socket_id; /* socket-id of this VCPU */ + int32_t core_id; /* core-id of this VCPU */ + int32_t thread_id; /* thread-id of this VCPU */ + int32_t node_id; /* NUMA node of this VCPU */ =20 /* 'compatible' string for this CPU for Linux device trees */ const char *dtb_compatible; --=20 2.39.3 From nobody Fri Apr 4 21:40:14 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1739243420972101.87128492446834; Mon, 10 Feb 2025 19:10:20 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thgdq-0007Cf-7f; Mon, 10 Feb 2025 22:08:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1thgdm-0007AT-Oj for qemu-devel@nongnu.org; Mon, 10 Feb 2025 22:08:50 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thgdi-0000Lz-K8 for qemu-devel@nongnu.org; Mon, 10 Feb 2025 22:08:50 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8Bx3642v6pnC9dxAA--.49439S3; Tue, 11 Feb 2025 11:08:38 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCxbsUyv6pnL1YLAA--.43924S5; Tue, 11 Feb 2025 11:08:38 +0800 (CST) From: Bibo Mao To: Song Gao , Paolo Bonzini , Zhao Liu , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Cc: Jiaxun Yang , Xianglai Li , qemu-devel@nongnu.org Subject: [PATCH v5 3/7] hw/loongarch/virt: Add basic cpu plug interface framework Date: Tue, 11 Feb 2025 11:08:30 +0800 Message-Id: <20250211030834.3276732-4-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250211030834.3276732-1-maobibo@loongson.cn> References: <20250211030834.3276732-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCxbsUyv6pnL1YLAA--.43924S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1739243423163019000 Content-Type: text/plain; charset="utf-8" Add basic cpu hotplug interface framework, cpu hotplug interface is stub function and only framework is added here. Co-developed-by: Xianglai Li Signed-off-by: Bibo Mao --- hw/loongarch/virt.c | 29 +++++++++++++++++++++++++++++ target/loongarch/cpu.c | 13 +++++++++++++ target/loongarch/cpu.h | 1 + 3 files changed, 43 insertions(+) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index cc53cf0b4a..a36b66c64d 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -824,6 +824,26 @@ static int virt_get_arch_id_from_topo(MachineState *ms= , LoongArchCPUTopo *topo) return arch_id; } =20 +static void virt_cpu_pre_plug(HotplugHandler *hotplug_dev, + DeviceState *dev, Error **errp) +{ +} + +static void virt_cpu_unplug_request(HotplugHandler *hotplug_dev, + DeviceState *dev, Error **errp) +{ +} + +static void virt_cpu_unplug(HotplugHandler *hotplug_dev, + DeviceState *dev, Error **errp) +{ +} + +static void virt_cpu_plug(HotplugHandler *hotplug_dev, + DeviceState *dev, Error **errp) +{ +} + static bool memhp_type_supported(DeviceState *dev) { /* we only support pc dimm now */ @@ -842,6 +862,8 @@ static void virt_device_pre_plug(HotplugHandler *hotplu= g_dev, { if (memhp_type_supported(dev)) { virt_mem_pre_plug(hotplug_dev, dev, errp); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { + virt_cpu_pre_plug(hotplug_dev, dev, errp); } } =20 @@ -860,6 +882,8 @@ static void virt_device_unplug_request(HotplugHandler *= hotplug_dev, { if (memhp_type_supported(dev)) { virt_mem_unplug_request(hotplug_dev, dev, errp); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { + virt_cpu_unplug_request(hotplug_dev, dev, errp); } } =20 @@ -878,6 +902,8 @@ static void virt_device_unplug(HotplugHandler *hotplug_= dev, { if (memhp_type_supported(dev)) { virt_mem_unplug(hotplug_dev, dev, errp); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { + virt_cpu_unplug(hotplug_dev, dev, errp); } } =20 @@ -905,6 +931,8 @@ static void virt_device_plug_cb(HotplugHandler *hotplug= _dev, } } else if (memhp_type_supported(dev)) { virt_mem_plug(hotplug_dev, dev, errp); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { + virt_cpu_plug(hotplug_dev, dev, errp); } } =20 @@ -914,6 +942,7 @@ static HotplugHandler *virt_get_hotplug_handler(Machine= State *machine, MachineClass *mc =3D MACHINE_GET_CLASS(machine); =20 if (device_is_dynamic_sysbus(mc, dev) || + object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU) || object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) || memhp_type_supported(dev)) { return HOTPLUG_HANDLER(machine); diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 3c877312cd..7e38949c56 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -641,6 +641,17 @@ static void loongarch_cpu_realizefn(DeviceState *dev, = Error **errp) lacc->parent_realize(dev, errp); } =20 +static void loongarch_cpu_unrealizefn(DeviceState *dev) +{ + LoongArchCPUClass *lacc =3D LOONGARCH_CPU_GET_CLASS(dev); + +#ifndef CONFIG_USER_ONLY + cpu_remove_sync(CPU(dev)); +#endif + + lacc->parent_unrealize(dev); +} + static bool loongarch_get_lsx(Object *obj, Error **errp) { return LOONGARCH_CPU(obj)->lsx !=3D ON_OFF_AUTO_OFF; @@ -927,6 +938,8 @@ static void loongarch_cpu_class_init(ObjectClass *c, vo= id *data) device_class_set_props(dc, loongarch_cpu_properties); device_class_set_parent_realize(dc, loongarch_cpu_realizefn, &lacc->parent_realize); + device_class_set_parent_unrealize(dc, loongarch_cpu_unrealizefn, + &lacc->parent_unrealize); resettable_class_set_parent_phases(rc, NULL, loongarch_cpu_reset_hold,= NULL, &lacc->parent_phases); =20 diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 0fb82a218b..cf93a0e7ad 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -434,6 +434,7 @@ struct LoongArchCPUClass { CPUClass parent_class; =20 DeviceRealize parent_realize; + DeviceUnrealize parent_unrealize; ResettablePhases parent_phases; }; =20 --=20 2.39.3 From nobody Fri Apr 4 21:40:14 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1739243363296170.73099330963953; Mon, 10 Feb 2025 19:09:23 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thgdp-0007C8-5s; Mon, 10 Feb 2025 22:08:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1thgdk-0007AB-NC for qemu-devel@nongnu.org; Mon, 10 Feb 2025 22:08:48 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thgdg-0000Lv-W6 for qemu-devel@nongnu.org; Mon, 10 Feb 2025 22:08:48 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8BxrnI2v6pnDddxAA--.1576S3; Tue, 11 Feb 2025 11:08:38 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCxbsUyv6pnL1YLAA--.43924S6; Tue, 11 Feb 2025 11:08:38 +0800 (CST) From: Bibo Mao To: Song Gao , Paolo Bonzini , Zhao Liu , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Cc: Jiaxun Yang , Xianglai Li , qemu-devel@nongnu.org Subject: [PATCH v5 4/7] hw/loongarch/virt: Implement cpu unplug interface Date: Tue, 11 Feb 2025 11:08:31 +0800 Message-Id: <20250211030834.3276732-5-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250211030834.3276732-1-maobibo@loongson.cn> References: <20250211030834.3276732-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCxbsUyv6pnL1YLAA--.43924S6 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1739243366490019100 Content-Type: text/plain; charset="utf-8" Implement cpu unplug interfaces including virt_cpu_unplug_request() and virt_cpu_unplug(). Co-developed-by: Xianglai Li Signed-off-by: Bibo Mao --- hw/loongarch/virt.c | 58 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index a36b66c64d..44c2a277f8 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -824,6 +824,19 @@ static int virt_get_arch_id_from_topo(MachineState *ms= , LoongArchCPUTopo *topo) return arch_id; } =20 +/* Find cpu slot in machine->possible_cpus by arch_id */ +static CPUArchId *virt_find_cpu_slot(MachineState *ms, int arch_id) +{ + int n; + for (n =3D 0; n < ms->possible_cpus->len; n++) { + if (ms->possible_cpus->cpus[n].arch_id =3D=3D arch_id) { + return &ms->possible_cpus->cpus[n]; + } + } + + return NULL; +} + static void virt_cpu_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { @@ -832,11 +845,56 @@ static void virt_cpu_pre_plug(HotplugHandler *hotplug= _dev, static void virt_cpu_unplug_request(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { + LoongArchVirtMachineState *lvms =3D LOONGARCH_VIRT_MACHINE(hotplug_dev= ); + Error *err =3D NULL; + LoongArchCPU *cpu =3D LOONGARCH_CPU(dev); + CPUState *cs =3D CPU(dev); + + if (cs->cpu_index =3D=3D 0) { + error_setg(&err, "hot-unplug of boot cpu(id%d=3D%d:%d:%d) not supp= orted", + cs->cpu_index, cpu->socket_id, + cpu->core_id, cpu->thread_id); + error_propagate(errp, err); + return; + } + + hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &= err); + if (err) { + error_propagate(errp, err); + } } =20 static void virt_cpu_unplug(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { + CPUArchId *cpu_slot; + Error *err =3D NULL; + LoongArchCPU *cpu =3D LOONGARCH_CPU(dev); + LoongArchVirtMachineState *lvms =3D LOONGARCH_VIRT_MACHINE(hotplug_dev= ); + + /* Notify ipi and extioi irqchip to remove interrupt routing to CPU */ + hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->ipi), dev, &err); + if (err) { + error_propagate(errp, err); + return; + } + + hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->extioi), dev, &err); + if (err) { + error_propagate(errp, err); + return; + } + + /* Notify acpi ged CPU removed */ + hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &err); + if (err) { + error_propagate(errp, err); + return; + } + + cpu_slot =3D virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id); + cpu_slot->cpu =3D NULL; + return; } =20 static void virt_cpu_plug(HotplugHandler *hotplug_dev, --=20 2.39.3 From nobody Fri Apr 4 21:40:14 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1739243378612806.6052129157401; Mon, 10 Feb 2025 19:09:38 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thgdp-0007C9-9U; Mon, 10 Feb 2025 22:08:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1thgdm-0007AO-NA for qemu-devel@nongnu.org; Mon, 10 Feb 2025 22:08:50 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thgdi-0000M1-Kq for qemu-devel@nongnu.org; Mon, 10 Feb 2025 22:08:50 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxjXI3v6pnEtdxAA--.1578S3; Tue, 11 Feb 2025 11:08:39 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCxbsUyv6pnL1YLAA--.43924S7; Tue, 11 Feb 2025 11:08:38 +0800 (CST) From: Bibo Mao To: Song Gao , Paolo Bonzini , Zhao Liu , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Cc: Jiaxun Yang , Xianglai Li , qemu-devel@nongnu.org Subject: [PATCH v5 5/7] hw/loongarch/virt: Implement cpu plug interface Date: Tue, 11 Feb 2025 11:08:32 +0800 Message-Id: <20250211030834.3276732-6-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250211030834.3276732-1-maobibo@loongson.cn> References: <20250211030834.3276732-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCxbsUyv6pnL1YLAA--.43924S7 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1739243380237019100 Content-Type: text/plain; charset="utf-8" Implement cpu plug interface, and cold-plug cpu uses plug interface when cpu object is created. Co-developed-by: Xianglai Li Signed-off-by: Bibo Mao --- hw/loongarch/virt.c | 88 ++++++++++++++++++++++++++++++++++++------ target/loongarch/cpu.c | 1 + 2 files changed, 78 insertions(+), 11 deletions(-) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 44c2a277f8..917b13a58a 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -655,15 +655,13 @@ static void fw_cfg_add_memory(MachineState *ms) =20 static void virt_init(MachineState *machine) { - LoongArchCPU *lacpu; const char *cpu_model =3D machine->cpu_type; MemoryRegion *address_space_mem =3D get_system_memory(); LoongArchVirtMachineState *lvms =3D LOONGARCH_VIRT_MACHINE(machine); int i; hwaddr base, size, ram_size =3D machine->ram_size; - const CPUArchIdList *possible_cpus; MachineClass *mc =3D MACHINE_GET_CLASS(machine); - CPUState *cpu; + Object *cpuobj; =20 if (!cpu_model) { cpu_model =3D LOONGARCH_CPU_TYPE_NAME("la464"); @@ -679,14 +677,15 @@ static void virt_init(MachineState *machine) memory_region_add_subregion(&lvms->system_iocsr, 0, &lvms->iocsr_mem); =20 /* Init CPUs */ - possible_cpus =3D mc->possible_cpu_arch_ids(machine); - for (i =3D 0; i < possible_cpus->len; i++) { - cpu =3D cpu_create(machine->cpu_type); - cpu->cpu_index =3D i; - machine->possible_cpus->cpus[i].cpu =3D cpu; - lacpu =3D LOONGARCH_CPU(cpu); - lacpu->phy_id =3D machine->possible_cpus->cpus[i].arch_id; - lacpu->env.address_space_iocsr =3D &lvms->as_iocsr; + mc->possible_cpu_arch_ids(machine); + for (i =3D 0; i < machine->smp.cpus; i++) { + cpuobj =3D object_new(machine->cpu_type); + if (cpuobj =3D=3D NULL) { + error_report("Fail to create object with type %s ", + machine->cpu_type); + exit(EXIT_FAILURE); + } + qdev_realize_and_unref(DEVICE(cpuobj), NULL, &error_fatal); } fw_cfg_add_memory(machine); =20 @@ -837,9 +836,52 @@ static CPUArchId *virt_find_cpu_slot(MachineState *ms,= int arch_id) return NULL; } =20 +/* Find cpu slot for cold-plut CPU object where cpu is NULL */ +static CPUArchId *virt_find_empty_cpu_slot(MachineState *ms) +{ + int n; + for (n =3D 0; n < ms->possible_cpus->len; n++) { + if (ms->possible_cpus->cpus[n].cpu =3D=3D NULL) { + return &ms->possible_cpus->cpus[n]; + } + } + + return NULL; +} + static void virt_cpu_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { + LoongArchVirtMachineState *lvms =3D LOONGARCH_VIRT_MACHINE(hotplug_dev= ); + MachineState *ms =3D MACHINE(OBJECT(hotplug_dev)); + LoongArchCPU *cpu =3D LOONGARCH_CPU(dev); + CPUState *cs =3D CPU(dev); + CPUArchId *cpu_slot; + Error *err =3D NULL; + LoongArchCPUTopo topo; + + if (lvms->acpi_ged) { + error_setg(&err, "CPU hotplug not supported"); + goto out; + } else { + /* For cold-add cpu, find empty cpu slot */ + cpu_slot =3D virt_find_empty_cpu_slot(ms); + topo.socket_id =3D cpu_slot->props.socket_id; + topo.core_id =3D cpu_slot->props.core_id; + topo.thread_id =3D cpu_slot->props.thread_id; + object_property_set_int(OBJECT(dev), "socket-id", topo.socket_id, = NULL); + object_property_set_int(OBJECT(dev), "core-id", topo.core_id, NULL= ); + object_property_set_int(OBJECT(dev), "thread-id", topo.thread_id, = NULL); + } + + cpu->env.address_space_iocsr =3D &lvms->as_iocsr; + cpu->phy_id =3D cpu_slot->arch_id; + cs->cpu_index =3D cpu_slot - ms->possible_cpus->cpus; + numa_cpu_pre_plug(cpu_slot, dev, &err); +out: + if (err) { + error_propagate(errp, err); + } } =20 static void virt_cpu_unplug_request(HotplugHandler *hotplug_dev, @@ -900,6 +942,30 @@ static void virt_cpu_unplug(HotplugHandler *hotplug_de= v, static void virt_cpu_plug(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { + CPUArchId *cpu_slot; + LoongArchCPU *cpu =3D LOONGARCH_CPU(dev); + LoongArchVirtMachineState *lvms =3D LOONGARCH_VIRT_MACHINE(hotplug_dev= ); + Error *err =3D NULL; + + cpu_slot =3D virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id); + cpu_slot->cpu =3D CPU(dev); + if (lvms->ipi) { + hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), dev, &err); + if (err) { + error_propagate(errp, err); + return; + } + } + + if (lvms->extioi) { + hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), dev, &err); + if (err) { + error_propagate(errp, err); + return; + } + } + + return; } =20 static bool memhp_type_supported(DeviceState *dev) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 7e38949c56..54b0da7492 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -962,6 +962,7 @@ static void loongarch_cpu_class_init(ObjectClass *c, vo= id *data) #ifdef CONFIG_TCG cc->tcg_ops =3D &loongarch_tcg_ops; #endif + dc->user_creatable =3D true; } =20 static const gchar *loongarch32_gdb_arch_name(CPUState *cs) --=20 2.39.3 From nobody Fri Apr 4 21:40:14 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1739243419166861.8470341776265; Mon, 10 Feb 2025 19:10:19 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thgdr-0007Dc-AN; Mon, 10 Feb 2025 22:08:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1thgdo-0007C0-AW for qemu-devel@nongnu.org; Mon, 10 Feb 2025 22:08:52 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thgdi-0000M2-Ko for qemu-devel@nongnu.org; Mon, 10 Feb 2025 22:08:51 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8Axz3M3v6pnGNdxAA--.1491S3; Tue, 11 Feb 2025 11:08:39 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCxbsUyv6pnL1YLAA--.43924S8; Tue, 11 Feb 2025 11:08:39 +0800 (CST) From: Bibo Mao To: Song Gao , Paolo Bonzini , Zhao Liu , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Cc: Jiaxun Yang , Xianglai Li , qemu-devel@nongnu.org Subject: [PATCH v5 6/7] hw/loongarch/virt: Update the ACPI table for hotplug cpu Date: Tue, 11 Feb 2025 11:08:33 +0800 Message-Id: <20250211030834.3276732-7-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250211030834.3276732-1-maobibo@loongson.cn> References: <20250211030834.3276732-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCxbsUyv6pnL1YLAA--.43924S8 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1739243420926019000 Content-Type: text/plain; charset="utf-8" On LoongArch virt machine, ACPI GED hardware is used for CPU hotplug handler, here CPU hotplug support feature is added based on GED handler, also CPU scan and reject method is added about CPU device in DSDT table. Co-developed-by: Xianglai Li Signed-off-by: Bibo Mao --- hw/loongarch/Kconfig | 1 + hw/loongarch/virt-acpi-build.c | 35 +++++++++++++++++++++++++++++++--- hw/loongarch/virt.c | 10 ++++++++++ include/hw/loongarch/virt.h | 1 + 4 files changed, 44 insertions(+), 3 deletions(-) diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig index fe1c6feac1..bb2838b7b5 100644 --- a/hw/loongarch/Kconfig +++ b/hw/loongarch/Kconfig @@ -17,6 +17,7 @@ config LOONGARCH_VIRT select LOONGARCH_EXTIOI select LS7A_RTC select SMBIOS + select ACPI_CPU_HOTPLUG select ACPI_PCI select ACPI_HW_REDUCED select FW_CFG_DMA diff --git a/hw/loongarch/virt-acpi-build.c b/hw/loongarch/virt-acpi-build.c index 9ca88d63ae..fced6c445a 100644 --- a/hw/loongarch/virt-acpi-build.c +++ b/hw/loongarch/virt-acpi-build.c @@ -47,6 +47,22 @@ #define ACPI_BUILD_DPRINTF(fmt, ...) #endif =20 +static void virt_madt_cpu_entry(int uid, + const CPUArchIdList *apic_ids, + GArray *entry, bool force_enabled) +{ + uint32_t flags, apic_id =3D apic_ids->cpus[uid].arch_id; + + flags =3D apic_ids->cpus[uid].cpu || force_enabled ? 1 /* Enabled */ := 0; + + /* Rev 1.0b, Table 5-13 Processor Local APIC Structure */ + build_append_int_noprefix(entry, 0, 1); /* Type */ + build_append_int_noprefix(entry, 8, 1); /* Length */ + build_append_int_noprefix(entry, uid, 1); /* ACPI Processor ID */ + build_append_int_noprefix(entry, apic_id, 1); /* APIC ID */ + build_append_int_noprefix(entry, flags, 4); /* Flags */ +} + /* build FADT */ static void init_common_fadt_data(AcpiFadtData *data) { @@ -112,7 +128,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, MachineState *ms =3D MACHINE(lvms); MachineClass *mc =3D MACHINE_GET_CLASS(ms); const CPUArchIdList *arch_ids =3D mc->possible_cpu_arch_ids(ms); - int i, arch_id; + int i, arch_id, flags; AcpiTable table =3D { .sig =3D "APIC", .rev =3D 1, .oem_id =3D lvms->o= em_id, .oem_table_id =3D lvms->oem_table_id }; =20 @@ -125,13 +141,13 @@ build_madt(GArray *table_data, BIOSLinker *linker, for (i =3D 0; i < arch_ids->len; i++) { /* Processor Core Interrupt Controller Structure */ arch_id =3D arch_ids->cpus[i].arch_id; - + flags =3D arch_ids->cpus[i].cpu ? 1 : 0; build_append_int_noprefix(table_data, 17, 1); /* Type */ build_append_int_noprefix(table_data, 15, 1); /* Length */ build_append_int_noprefix(table_data, 1, 1); /* Version */ build_append_int_noprefix(table_data, i, 4); /* ACPI Processor= ID */ build_append_int_noprefix(table_data, arch_id, 4); /* Core ID */ - build_append_int_noprefix(table_data, 1, 4); /* Flags */ + build_append_int_noprefix(table_data, flags, 4); /* Flags */ } =20 /* Extend I/O Interrupt Controller Structure */ @@ -338,6 +354,7 @@ build_la_ged_aml(Aml *dsdt, MachineState *machine) { uint32_t event; LoongArchVirtMachineState *lvms =3D LOONGARCH_VIRT_MACHINE(machine); + CPUHotplugFeatures opts; =20 build_ged_aml(dsdt, "\\_SB."GED_DEVICE, HOTPLUG_HANDLER(lvms->acpi_ged), @@ -350,6 +367,18 @@ build_la_ged_aml(Aml *dsdt, MachineState *machine) AML_SYSTEM_MEMORY, VIRT_GED_MEM_ADDR); } + + if (event & ACPI_GED_CPU_HOTPLUG_EVT) { + opts.acpi_1_compatible =3D false; + opts.has_legacy_cphp =3D false; + opts.fw_unplugs_cpu =3D false; + opts.smi_path =3D NULL; + + build_cpus_aml(dsdt, machine, opts, virt_madt_cpu_entry, + VIRT_GED_CPUHP_ADDR, "\\_SB", + AML_GED_EVT_CPU_SCAN_METHOD, AML_SYSTEM_MEMORY); + } + acpi_dsdt_add_power_button(dsdt); } =20 diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 917b13a58a..5619ce3c44 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -195,11 +195,17 @@ static DeviceState *create_acpi_ged(DeviceState *pch_= pic, { DeviceState *dev; MachineState *ms =3D MACHINE(lvms); + MachineClass *mc =3D MACHINE_GET_CLASS(lvms); uint32_t event =3D ACPI_GED_PWR_DOWN_EVT; =20 if (ms->ram_slots) { event |=3D ACPI_GED_MEM_HOTPLUG_EVT; } + + if (mc->has_hotpluggable_cpus) { + event |=3D ACPI_GED_CPU_HOTPLUG_EVT; + } + dev =3D qdev_new(TYPE_ACPI_GED); qdev_prop_set_uint32(dev, "ged-event", event); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); @@ -211,6 +217,10 @@ static DeviceState *create_acpi_ged(DeviceState *pch_p= ic, /* ged regs used for reset and power down */ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, VIRT_GED_REG_ADDR); =20 + if (mc->has_hotpluggable_cpus) { + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 3, VIRT_GED_CPUHP_ADDR); + } + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - VIRT_GSI_B= ASE)); return dev; diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h index 661efae61d..2692ba9544 100644 --- a/include/hw/loongarch/virt.h +++ b/include/hw/loongarch/virt.h @@ -30,6 +30,7 @@ #define VIRT_GED_EVT_ADDR 0x100e0000 #define VIRT_GED_MEM_ADDR (VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN) #define VIRT_GED_REG_ADDR (VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN) +#define VIRT_GED_CPUHP_ADDR (VIRT_GED_REG_ADDR + ACPI_GED_REG_COUNT) =20 #define COMMAND_LINE_SIZE 512 =20 --=20 2.39.3 From nobody Fri Apr 4 21:40:14 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1739256874833807.1326899858778; Mon, 10 Feb 2025 22:54:34 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thkA0-0007tq-RL; Tue, 11 Feb 2025 01:54:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1thk9r-0007sO-Br for qemu-devel@nongnu.org; Tue, 11 Feb 2025 01:54:12 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1thk9m-0001nh-J7 for qemu-devel@nongnu.org; Tue, 11 Feb 2025 01:54:10 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8AxaeEJ9KpnrfpxAA--.23445S3; Tue, 11 Feb 2025 14:54:01 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCxPscJ9KpnPqELAA--.46044S2; Tue, 11 Feb 2025 14:54:01 +0800 (CST) From: Bibo Mao To: Song Gao , Paolo Bonzini , Zhao Liu , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Cc: Jiaxun Yang , Xianglai Li , qemu-devel@nongnu.org Subject: [PATCH v5 7/7] hw/loongarch/virt: Enable cpu hotplug feature on virt machine Date: Tue, 11 Feb 2025 14:53:58 +0800 Message-Id: <20250211065358.3277168-1-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250211030834.3276732-1-maobibo@loongson.cn> References: <20250211030834.3276732-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCxPscJ9KpnPqELAA--.46044S2 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1739256877276019000 Content-Type: text/plain; charset="utf-8" On virt machine, enable CPU hotplug feature has_hotpluggable_cpus. For hot-added CPUs, there is socket-id/core-id/thread-id property set, arch_id can be caculated from these properties. So that cpu slot can be searched from its arch_id. Co-developed-by: Xianglai Li Signed-off-by: Bibo Mao --- hw/loongarch/virt.c | 44 ++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 42 insertions(+), 2 deletions(-) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 5619ce3c44..661c8a5446 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -869,10 +869,42 @@ static void virt_cpu_pre_plug(HotplugHandler *hotplug= _dev, CPUArchId *cpu_slot; Error *err =3D NULL; LoongArchCPUTopo topo; + int arch_id; =20 if (lvms->acpi_ged) { - error_setg(&err, "CPU hotplug not supported"); - goto out; + if ((cpu->thread_id < 0) || (cpu->thread_id >=3D ms->smp.threads))= { + error_setg(&err, + "Invalid thread-id %u specified, must be in range 1= :%u", + cpu->thread_id, ms->smp.threads - 1); + goto out; + } + + if ((cpu->core_id < 0) || (cpu->core_id >=3D ms->smp.cores)) { + error_setg(&err, + "Invalid core-id %u specified, must be in range 1:%= u", + cpu->core_id, ms->smp.cores - 1); + goto out; + } + + if ((cpu->socket_id < 0) || (cpu->socket_id >=3D ms->smp.sockets))= { + error_setg(&err, + "Invalid socket-id %u specified, must be in range 1= :%u", + cpu->socket_id, ms->smp.sockets - 1); + goto out; + } + + topo.socket_id =3D cpu->socket_id; + topo.core_id =3D cpu->core_id; + topo.thread_id =3D cpu->thread_id; + arch_id =3D virt_get_arch_id_from_topo(ms, &topo); + cpu_slot =3D virt_find_cpu_slot(ms, arch_id); + if (CPU(cpu_slot->cpu)) { + error_setg(&err, + "cpu(id%d=3D%d:%d:%d) with arch-id %" PRIu64 " exis= ts", + cs->cpu_index, cpu->socket_id, cpu->core_id, + cpu->thread_id, cpu_slot->arch_id); + goto out; + } } else { /* For cold-add cpu, find empty cpu slot */ cpu_slot =3D virt_find_empty_cpu_slot(ms); @@ -975,6 +1007,13 @@ static void virt_cpu_plug(HotplugHandler *hotplug_dev, } } =20 + if (lvms->acpi_ged) { + hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &err); + if (err) { + error_propagate(errp, err); + } + } + return; } =20 @@ -1157,6 +1196,7 @@ static void virt_class_init(ObjectClass *oc, void *da= ta) mc->numa_mem_supported =3D true; mc->auto_enable_numa_with_memhp =3D true; mc->auto_enable_numa_with_memdev =3D true; + mc->has_hotpluggable_cpus =3D true; mc->get_hotplug_handler =3D virt_get_hotplug_handler; mc->default_nic =3D "virtio-net-pci"; hc->plug =3D virt_device_plug_cb; --=20 2.39.3