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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>, qemu-ppc@nongnu.org,
qemu-riscv@nongnu.org, Thomas Huth <thuth@redhat.com>, qemu-arm@nongnu.org,
qemu-s390x@nongnu.org,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 01/10] target: Set disassemble_info::endian value for
little-endian targets
Date: Mon, 10 Feb 2025 23:18:21 +0100
Message-ID: <20250210221830.69129-2-philmd@linaro.org>
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Have the CPUClass::disas_set_info() callback set the
disassemble_info::endian field for little-endian targets.
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/alpha/cpu.c | 1 +
target/avr/cpu.c | 1 +
target/hexagon/cpu.c | 1 +
target/i386/cpu.c | 1 +
target/loongarch/cpu.c | 1 +
target/rx/cpu.c | 1 +
6 files changed, 6 insertions(+)
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index da21f99a6ac..acf81fda371 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -85,6 +85,7 @@ static int alpha_cpu_mmu_index(CPUState *cs, bool ifetch)
=20
static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
{
+ info->endian =3D BFD_ENDIAN_LITTLE;
info->mach =3D bfd_mach_alpha_ev6;
info->print_insn =3D print_insn_alpha;
}
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 5a0e21465e5..2871d30540a 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -102,6 +102,7 @@ static void avr_cpu_reset_hold(Object *obj, ResetType t=
ype)
=20
static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
{
+ info->endian =3D BFD_ENDIAN_LITTLE;
info->mach =3D bfd_arch_avr;
info->print_insn =3D avr_print_insn;
}
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 238e63bcea4..a9beb9a1757 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -293,6 +293,7 @@ static void hexagon_cpu_reset_hold(Object *obj, ResetTy=
pe type)
static void hexagon_cpu_disas_set_info(CPUState *s, disassemble_info *info)
{
info->print_insn =3D print_insn_hexagon;
+ info->endian =3D BFD_ENDIAN_LITTLE;
}
=20
static void hexagon_cpu_realize(DeviceState *dev, Error **errp)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index b5dd60d2812..85815c0805d 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -8497,6 +8497,7 @@ static void x86_disas_set_info(CPUState *cs, disassem=
ble_info *info)
X86CPU *cpu =3D X86_CPU(cs);
CPUX86State *env =3D &cpu->env;
=20
+ info->endian =3D BFD_ENDIAN_LITTLE;
info->mach =3D (env->hflags & HF_CS64_MASK ? bfd_mach_x86_64
: env->hflags & HF_CS32_MASK ? bfd_mach_i386_i386
: bfd_mach_i386_i8086);
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 227870e2856..cb9b9f909f3 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -617,6 +617,7 @@ static void loongarch_cpu_reset_hold(Object *obj, Reset=
Type type)
=20
static void loongarch_cpu_disas_set_info(CPUState *s, disassemble_info *in=
fo)
{
+ info->endian =3D BFD_ENDIAN_LITTLE;
info->print_insn =3D print_insn_loongarch;
}
=20
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index 154906ef5f4..acd5a6e12da 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -160,6 +160,7 @@ static void rx_cpu_set_irq(void *opaque, int no, int re=
quest)
=20
static void rx_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
{
+ info->endian =3D BFD_ENDIAN_LITTLE;
info->mach =3D bfd_mach_rx;
info->print_insn =3D print_insn_rx;
}
--=20
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>, qemu-ppc@nongnu.org,
qemu-riscv@nongnu.org, Thomas Huth <thuth@redhat.com>, qemu-arm@nongnu.org,
qemu-s390x@nongnu.org,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 02/10] target: Set disassemble_info::endian value for
big-endian targets
Date: Mon, 10 Feb 2025 23:18:22 +0100
Message-ID: <20250210221830.69129-3-philmd@linaro.org>
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Have the CPUClass::disas_set_info() callback set the
disassemble_info::endian field for big-endian targets.
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/cpu.c | 1 +
target/m68k/cpu.c | 1 +
target/openrisc/cpu.c | 1 +
target/s390x/cpu.c | 1 +
target/sparc/cpu.c | 1 +
5 files changed, 5 insertions(+)
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 4bb5cff624e..d15f8c9c217 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -150,6 +150,7 @@ static int hppa_cpu_mmu_index(CPUState *cs, bool ifetch)
static void hppa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
{
info->mach =3D bfd_mach_hppa20;
+ info->endian =3D BFD_ENDIAN_BIG;
info->print_insn =3D print_insn_hppa;
}
=20
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 5eac4a38c62..ff167aaea71 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -122,6 +122,7 @@ static void m68k_cpu_reset_hold(Object *obj, ResetType =
type)
static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info)
{
info->print_insn =3D print_insn_m68k;
+ info->endian =3D BFD_ENDIAN_BIG;
info->mach =3D 0;
}
=20
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index a74fab43a91..33c81928370 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -83,6 +83,7 @@ static int openrisc_cpu_mmu_index(CPUState *cs, bool ifet=
ch)
=20
static void openrisc_disas_set_info(CPUState *cpu, disassemble_info *info)
{
+ info->endian =3D BFD_ENDIAN_BIG;
info->print_insn =3D print_insn_or1k;
}
=20
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 3bea014f9ee..972d265478d 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -243,6 +243,7 @@ static void s390_cpu_disas_set_info(CPUState *cpu, disa=
ssemble_info *info)
{
info->mach =3D bfd_mach_s390_64;
info->cap_arch =3D CS_ARCH_SYSZ;
+ info->endian =3D BFD_ENDIAN_BIG;
info->cap_insn_unit =3D 2;
info->cap_insn_split =3D 6;
}
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index e3b46137178..9fd222e4c82 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -106,6 +106,7 @@ static bool sparc_cpu_exec_interrupt(CPUState *cs, int =
interrupt_request)
static void cpu_sparc_disas_set_info(CPUState *cpu, disassemble_info *info)
{
info->print_insn =3D print_insn_sparc;
+ info->endian =3D BFD_ENDIAN_BIG;
#ifdef TARGET_SPARC64
info->mach =3D bfd_mach_sparc_v9b;
#endif
--=20
2.47.1
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>, qemu-ppc@nongnu.org,
qemu-riscv@nongnu.org, Thomas Huth <thuth@redhat.com>, qemu-arm@nongnu.org,
qemu-s390x@nongnu.org,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 03/10] target/arm: Set disassemble_info::endian value in
disas_set_info()
Date: Mon, 10 Feb 2025 23:18:23 +0100
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Have the CPUClass::disas_set_info() callback set the
disassemble_info::endian field.
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.c | 10 +++-------
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 94f1c55622b..68b3a9d3ab0 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1188,7 +1188,7 @@ static void arm_disas_set_info(CPUState *cpu, disasse=
mble_info *info)
{
ARMCPU *ac =3D ARM_CPU(cpu);
CPUARMState *env =3D &ac->env;
- bool sctlr_b;
+ bool sctlr_b =3D arm_sctlr_b(env);
=20
if (is_a64(env)) {
info->cap_arch =3D CS_ARCH_ARM64;
@@ -1215,13 +1215,9 @@ static void arm_disas_set_info(CPUState *cpu, disass=
emble_info *info)
info->cap_mode =3D cap_mode;
}
=20
- sctlr_b =3D arm_sctlr_b(env);
+ info->endian =3D BFD_ENDIAN_LITTLE;
if (bswap_code(sctlr_b)) {
-#if TARGET_BIG_ENDIAN
- info->endian =3D BFD_ENDIAN_LITTLE;
-#else
- info->endian =3D BFD_ENDIAN_BIG;
-#endif
+ info->endian =3D TARGET_BIG_ENDIAN ? BFD_ENDIAN_LITTLE : BFD_ENDIA=
N_BIG;
}
info->flags &=3D ~INSN_ARM_BE32;
#ifndef CONFIG_USER_ONLY
--=20
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>, qemu-ppc@nongnu.org,
qemu-riscv@nongnu.org, Thomas Huth <thuth@redhat.com>, qemu-arm@nongnu.org,
qemu-s390x@nongnu.org,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 04/10] target/microblaze: Set disassemble_info::endian
value in disas_set_info
Date: Mon, 10 Feb 2025 23:18:24 +0100
Message-ID: <20250210221830.69129-5-philmd@linaro.org>
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Have the CPUClass::disas_set_info() callback set the
disassemble_info::endian field.
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/microblaze/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 13d194cef88..d5ee1244cad 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -224,6 +224,8 @@ static void mb_disas_set_info(CPUState *cpu, disassembl=
e_info *info)
{
info->mach =3D bfd_arch_microblaze;
info->print_insn =3D print_insn_microblaze;
+ info->endian =3D TARGET_BIG_ENDIAN ? BFD_ENDIAN_BIG
+ : BFD_ENDIAN_LITTLE;
}
=20
static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
--=20
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>, qemu-ppc@nongnu.org,
qemu-riscv@nongnu.org, Thomas Huth <thuth@redhat.com>, qemu-arm@nongnu.org,
qemu-s390x@nongnu.org,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 05/10] target/mips: Set disassemble_info::endian value in
disas_set_info()
Date: Mon, 10 Feb 2025 23:18:25 +0100
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X-ZM-MESSAGEID: 1739226028950019000
Have the CPUClass::disas_set_info() callback set the
disassemble_info::endian field.
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/mips/cpu.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 0b267d2e507..e76298699ab 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -428,13 +428,13 @@ static void mips_cpu_reset_hold(Object *obj, ResetTyp=
e type)
static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info)
{
if (!(cpu_env(s)->insn_flags & ISA_NANOMIPS32)) {
-#if TARGET_BIG_ENDIAN
- info->print_insn =3D print_insn_big_mips;
-#else
- info->print_insn =3D print_insn_little_mips;
-#endif
+ info->endian =3D TARGET_BIG_ENDIAN ? BFD_ENDIAN_BIG
+ : BFD_ENDIAN_LITTLE;
+ info->print_insn =3D TARGET_BIG_ENDIAN ? print_insn_big_mips
+ : print_insn_little_mips;
} else {
info->print_insn =3D print_insn_nanomips;
+ info->endian =3D BFD_ENDIAN_LITTLE;
}
}
=20
--=20
2.47.1
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>, qemu-ppc@nongnu.org,
qemu-riscv@nongnu.org, Thomas Huth <thuth@redhat.com>, qemu-arm@nongnu.org,
qemu-s390x@nongnu.org,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 06/10] target/ppc: Set disassemble_info::endian value in
disas_set_info()
Date: Mon, 10 Feb 2025 23:18:26 +0100
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Have the CPUClass::disas_set_info() callback always set\
the disassemble_info::endian field.
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/ppc/cpu_init.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 25e835d65e7..e816d30114b 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7398,6 +7398,8 @@ static void ppc_disas_set_info(CPUState *cs, disassem=
ble_info *info)
=20
if ((env->hflags >> MSR_LE) & 1) {
info->endian =3D BFD_ENDIAN_LITTLE;
+ } else {
+ info->endian =3D BFD_ENDIAN_BIG;
}
info->mach =3D env->bfd_mach;
if (!env->bfd_mach) {
--=20
2.47.1
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>, qemu-ppc@nongnu.org,
qemu-riscv@nongnu.org, Thomas Huth <thuth@redhat.com>, qemu-arm@nongnu.org,
qemu-s390x@nongnu.org,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 07/10] target/riscv: Set disassemble_info::endian value in
disas_set_info()
Date: Mon, 10 Feb 2025 23:18:27 +0100
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Have the CPUClass::disas_set_info() callback set the
disassemble_info::endian field.
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/riscv/cpu.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 3d4bd157d2c..b39a701d751 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1156,6 +1156,15 @@ static void riscv_cpu_disas_set_info(CPUState *s, di=
sassemble_info *info)
CPURISCVState *env =3D &cpu->env;
info->target_info =3D &cpu->cfg;
=20
+ /*
+ * A couple of bits in MSTATUS set the endianness:
+ * - MSTATUS_UBE (User-mode),
+ * - MSTATUS_SBE (Supervisor-mode),
+ * - MSTATUS_MBE (Machine-mode)
+ * but we don't implement that yet.
+ */
+ info->endian =3D BFD_ENDIAN_LITTLE;
+
switch (env->xl) {
case MXL_RV32:
info->print_insn =3D print_insn_riscv32;
--=20
2.47.1
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>, qemu-ppc@nongnu.org,
qemu-riscv@nongnu.org, Thomas Huth <thuth@redhat.com>, qemu-arm@nongnu.org,
qemu-s390x@nongnu.org,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 08/10] target/sh4: Set disassemble_info::endian value in
disas_set_info()
Date: Mon, 10 Feb 2025 23:18:28 +0100
Message-ID: <20250210221830.69129-9-philmd@linaro.org>
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Have the CPUClass::disas_set_info() callback set the
disassemble_info::endian field.
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sh4/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index e3c2aea1a64..4a50f2746ab 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -134,6 +134,8 @@ static void superh_cpu_reset_hold(Object *obj, ResetTyp=
e type)
=20
static void superh_cpu_disas_set_info(CPUState *cpu, disassemble_info *inf=
o)
{
+ info->endian =3D TARGET_BIG_ENDIAN ? BFD_ENDIAN_BIG
+ : BFD_ENDIAN_LITTLE;
info->mach =3D bfd_mach_sh4;
info->print_insn =3D print_insn_sh;
}
--=20
2.47.1
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>, qemu-ppc@nongnu.org,
qemu-riscv@nongnu.org, Thomas Huth <thuth@redhat.com>, qemu-arm@nongnu.org,
qemu-s390x@nongnu.org,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 09/10] target/xtensa: Set disassemble_info::endian value in
disas_set_info()
Date: Mon, 10 Feb 2025 23:18:29 +0100
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X-ZM-MESSAGEID: 1739226006121019100
Have the CPUClass::disas_set_info() callback set the
disassemble_info::endian field.
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/xtensa/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index efbfe73fcfb..f9e298ace45 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -159,6 +159,8 @@ static void xtensa_cpu_disas_set_info(CPUState *cs, dis=
assemble_info *info)
=20
info->private_data =3D cpu->env.config->isa;
info->print_insn =3D print_insn_xtensa;
+ info->endian =3D TARGET_BIG_ENDIAN ? BFD_ENDIAN_BIG
+ : BFD_ENDIAN_LITTLE;
}
=20
static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)
--=20
2.47.1
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>, qemu-ppc@nongnu.org,
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=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 10/10] disas: Remove target_words_bigendian() call in
initialize_debug_target()
Date: Mon, 10 Feb 2025 23:18:30 +0100
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All CPUClass implementating disas_set_info() must set the
disassemble_info::endian value.
Ensure that by setting %endian to BFD_ENDIAN_UNKNOWN before
calling the CPUClass::disas_set_info() handler, then asserting
%endian is not BFD_ENDIAN_UNKNOWN after the call.
This allows removing the target_words_bigendian() call in disas/.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
---
disas/disas-common.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/disas/disas-common.c b/disas/disas-common.c
index 57505823cb7..21c2f03430b 100644
--- a/disas/disas-common.c
+++ b/disas/disas-common.c
@@ -7,7 +7,6 @@
#include "disas/disas.h"
#include "disas/capstone.h"
#include "hw/core/cpu.h"
-#include "exec/tswap.h"
#include "disas-internal.h"
=20
=20
@@ -61,14 +60,11 @@ void disas_initialize_debug_target(CPUDebug *s, CPUStat=
e *cpu)
=20
s->cpu =3D cpu;
s->info.print_address_func =3D print_address;
- if (target_words_bigendian()) {
- s->info.endian =3D BFD_ENDIAN_BIG;
- } else {
- s->info.endian =3D BFD_ENDIAN_LITTLE;
- }
+ s->info.endian =3D BFD_ENDIAN_UNKNOWN;
=20
if (cpu->cc->disas_set_info) {
cpu->cc->disas_set_info(cpu, &s->info);
+ g_assert(s->info.endian !=3D BFD_ENDIAN_UNKNOWN);
}
}
=20
--=20
2.47.1