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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dbdd368c9sm12051181f8f.34.2025.02.10.02.26.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Feb 2025 02:26:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1739183191; x=1739787991; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xBCJMHcPe/iIrLZobFxGzbZ4tBIo/mQI53ey/01FGoU=; b=bMbHC/XJjZQZE+anDENSgs+Oxj/cF0MhoCrpjNkFZ7+3Dus7jmozeLgcvCKMz9tGW2 +1yAZLmw/Cq2w2mvqe/rG8z/SmcFBMN6gSXa/D6wn55s3t2Y5eaTL4h9qsc5mCC68jDu Mfrdx4EL/g0Jl0v9dyJKhkWQ67MNlRCAkUysZJJ8ZSSvW33Xq49R1zjDXnXu+bfdOzut eB2ede7S9FVE8XF5wp+HQEw6PfrXp8Gr3JWPimg+LeJJqOz18uJH1B4kddFfsqehbNfH Dc/gfU0K1a3O2chK4+2gSkrgkRIvbXFkZcInxu682SaZFdHdg6hPUICkcYzY5S9c0LyV UAug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1739183191; x=1739787991; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xBCJMHcPe/iIrLZobFxGzbZ4tBIo/mQI53ey/01FGoU=; b=RQpYJmEvb3BlWt4WlowqCRLaDiqLvOYnhKlq4qWHnwElzQITQ2uLGODuw0gz2DStjC /StDb5CX07Lr2Rp+x3wWbNoPbkKZH4Dk/XjtlcfN7wUduoUD4XUIf+xIMYj9xJguwY8+ 9jRmIowcmMst7uSX0YKpBM5djIzKunGMC8ME5POavlQ+CjH0TSyWepNkFonGg1qIkzEr iYmSP1T57cg5kfyDYG0eHFJS8jwUla4wsEkEZY1+saTETxUGH11VfzXebSrLXyNuACuf LJwkipJvHoc3WRfErWbSHhoN4WYUoHX3mPMJuUyB83Q/MqBXkU2jrTV1xwtay1PC6cZE 1uYA== X-Gm-Message-State: AOJu0YwZFRDIfhqyHceAw2RLhuUl6WFagfWPFxaCGlwfvYo8CI8P2Sme nzrYAuRa03jAVg9gQN3ZXW98JesUjeI0VCdecZyNw15SdTPV8/WLwwUZUt/mzn4dFTBAM6pf3Yk perk= X-Gm-Gg: ASbGncsmPvBllyPmmfTvEQEVyl3jVZht0lJWadYidRX/ULcebvFRWCTpt41Wenucn9w vcnNGcnavJDVc6bZrVG1d1kJNeyBayBcOpV0LkniUR1+VuDzJIfkNOlM8bYIIkvP+pSLC0XRyP1 UUyrlJCX+0vvDse94hg9DgDyS4LtQZTgnuthcYeAWEfwZWZ57DfuSjwbS93omtkpwABXu/5+Tvg nY6oMDtnXsvGNcvx/xNJU0/pypP6HbQLijwfKZ7MXPnxfXvKz7V/PV/+IS7TgTTZZcpprnp022Q UeC2O9y7gpwzYbI89llqrbkx7V6Syh7/Nywc8Ptx0qsqhGebPdDZACq3PAQlm1/X4vkY95o= X-Google-Smtp-Source: AGHT+IFsk4Sm5GtJcrljfyFdZDFfEzE6alyDValtScdGjuwRyLdffPNgRUGjpr98MaYFefZPsvEAQw== X-Received: by 2002:a5d:64ef:0:b0:38d:e092:3d0a with SMTP id ffacd0b85a97d-38de0923f1dmr1426772f8f.9.1739183190610; Mon, 10 Feb 2025 02:26:30 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org Subject: [PATCH 05/10] target/riscv: Convert misa_mxl_max using GLib macros Date: Mon, 10 Feb 2025 11:25:59 +0100 Message-ID: <20250210102604.34284-6-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250210102604.34284-1-philmd@linaro.org> References: <20250210102604.34284-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1739183217573019000 Use GLib conversion macros to pass misa_mxl_max as riscv_cpu_class_init() class data. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- Cc: qemu-riscv@nongnu.org --- target/riscv/cpu.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f3ad7f88f0e..9fe1b23a297 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2955,7 +2955,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void= *data) { RISCVCPUClass *mcc =3D RISCV_CPU_CLASS(c); =20 - mcc->misa_mxl_max =3D (RISCVMXL)(uintptr_t)data; + mcc->misa_mxl_max =3D (RISCVMXL)GPOINTER_TO_UINT(data); riscv_cpu_validate_misa_mxl(mcc); } =20 @@ -3057,7 +3057,7 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, ch= ar *nodename) .parent =3D TYPE_RISCV_CPU, \ .instance_init =3D (initfn), \ .class_init =3D riscv_cpu_class_init, \ - .class_data =3D (void *)(misa_mxl_max) \ + .class_data =3D GUINT_TO_POINTER(misa_mxl_max) \ } =20 #define DEFINE_DYNAMIC_CPU(type_name, misa_mxl_max, initfn) \ @@ -3066,7 +3066,7 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, ch= ar *nodename) .parent =3D TYPE_RISCV_DYNAMIC_CPU, \ .instance_init =3D (initfn), \ .class_init =3D riscv_cpu_class_init, \ - .class_data =3D (void *)(misa_mxl_max) \ + .class_data =3D GUINT_TO_POINTER(misa_mxl_max) \ } =20 #define DEFINE_VENDOR_CPU(type_name, misa_mxl_max, initfn) \ @@ -3075,7 +3075,7 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, ch= ar *nodename) .parent =3D TYPE_RISCV_VENDOR_CPU, \ .instance_init =3D (initfn), \ .class_init =3D riscv_cpu_class_init, \ - .class_data =3D (void *)(misa_mxl_max) \ + .class_data =3D GUINT_TO_POINTER(misa_mxl_max) \ } =20 #define DEFINE_BARE_CPU(type_name, misa_mxl_max, initfn) \ @@ -3084,7 +3084,7 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, ch= ar *nodename) .parent =3D TYPE_RISCV_BARE_CPU, \ .instance_init =3D (initfn), \ .class_init =3D riscv_cpu_class_init, \ - .class_data =3D (void *)(misa_mxl_max) \ + .class_data =3D GUINT_TO_POINTER(misa_mxl_max) \ } =20 #define DEFINE_PROFILE_CPU(type_name, misa_mxl_max, initfn) \ @@ -3093,7 +3093,7 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, ch= ar *nodename) .parent =3D TYPE_RISCV_BARE_CPU, \ .instance_init =3D (initfn), \ .class_init =3D riscv_cpu_class_init, \ - .class_data =3D (void *)(misa_mxl_max) \ + .class_data =3D GUINT_TO_POINTER(misa_mxl_max) \ } =20 static const TypeInfo riscv_cpu_type_infos[] =3D { --=20 2.47.1