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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org,
qemu-devel@nongnu.org
Subject: [PATCH v2 58/69] target/arm: Remove standard_fp_status_f16
Date: Sat, 1 Feb 2025 16:40:01 +0000
Message-Id: <20250201164012.1660228-59-peter.maydell@linaro.org>
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From: Richard Henderson <richard.henderson@linaro.org>
Replace with fp_status[FPST_STD_F16].
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Message-id: 20250129013857.135256-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.h | 1 -
target/arm/cpu.c | 4 ++--
target/arm/tcg/mve_helper.c | 24 ++++++++++++------------
target/arm/vfp_helper.c | 8 ++++----
4 files changed, 18 insertions(+), 19 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index c025649ff24..893a2cdd0a5 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -697,7 +697,6 @@ typedef struct CPUArchState {
float_status ah_fp_status;
float_status ah_fp_status_f16;
float_status standard_fp_status;
- float_status standard_fp_status_f16;
};
};
=20
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 8fa220a7165..b887edf1d19 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -549,13 +549,13 @@ static void arm_cpu_reset_hold(Object *obj, ResetType=
type)
set_flush_to_zero(1, &env->vfp.standard_fp_status);
set_flush_inputs_to_zero(1, &env->vfp.standard_fp_status);
set_default_nan_mode(1, &env->vfp.standard_fp_status);
- set_default_nan_mode(1, &env->vfp.standard_fp_status_f16);
+ set_default_nan_mode(1, &env->vfp.fp_status[FPST_STD_F16]);
arm_set_default_fp_behaviours(&env->vfp.fp_status_a32);
arm_set_default_fp_behaviours(&env->vfp.fp_status_a64);
arm_set_default_fp_behaviours(&env->vfp.standard_fp_status);
arm_set_default_fp_behaviours(&env->vfp.fp_status_f16_a32);
arm_set_default_fp_behaviours(&env->vfp.fp_status_f16_a64);
- arm_set_default_fp_behaviours(&env->vfp.standard_fp_status_f16);
+ arm_set_default_fp_behaviours(&env->vfp.fp_status[FPST_STD_F16]);
arm_set_ah_fp_behaviours(&env->vfp.ah_fp_status);
set_flush_to_zero(1, &env->vfp.ah_fp_status);
set_flush_inputs_to_zero(1, &env->vfp.ah_fp_status);
diff --git a/target/arm/tcg/mve_helper.c b/target/arm/tcg/mve_helper.c
index 03ebef5ef21..911a53a23a8 100644
--- a/target/arm/tcg/mve_helper.c
+++ b/target/arm/tcg/mve_helper.c
@@ -2814,7 +2814,7 @@ DO_VMAXMINA(vminaw, 4, int32_t, uint32_t, DO_MIN)
if ((mask & MAKE_64BIT_MASK(0, ESIZE)) =3D=3D 0) { =
\
continue; \
} \
- fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.standard_fp_status_f16 :=
\
+ fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.fp_status[FPST_STD_F16] =
: \
&env->vfp.standard_fp_status; \
if (!(mask & 1)) { \
/* We need the result but without updating flags */ \
@@ -2888,7 +2888,7 @@ DO_2OP_FP_ALL(vminnma, minnuma)
r[e] =3D 0; \
continue; \
} \
- fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.standard_fp_status_f16 :=
\
+ fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.fp_status[FPST_STD_F16] =
: \
&env->vfp.standard_fp_status; \
if (!(tm & 1)) { \
/* We need the result but without updating flags */ \
@@ -2926,7 +2926,7 @@ DO_VCADD_FP(vfcadd270s, 4, float32, float32_add, floa=
t32_sub)
if ((mask & MAKE_64BIT_MASK(0, ESIZE)) =3D=3D 0) { =
\
continue; \
} \
- fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.standard_fp_status_f16 :=
\
+ fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.fp_status[FPST_STD_F16] =
: \
&env->vfp.standard_fp_status; \
if (!(mask & 1)) { \
/* We need the result but without updating flags */ \
@@ -2964,7 +2964,7 @@ DO_VFMA(vfmss, 4, float32, true)
if ((mask & MAKE_64BIT_MASK(0, ESIZE * 2)) =3D=3D 0) { =
\
continue; \
} \
- fpst0 =3D (ESIZE =3D=3D 2) ? &env->vfp.standard_fp_status_f16 =
: \
+ fpst0 =3D (ESIZE =3D=3D 2) ? &env->vfp.fp_status[FPST_STD_F16]=
: \
&env->vfp.standard_fp_status; \
fpst1 =3D fpst0; \
if (!(mask & 1)) { \
@@ -3049,7 +3049,7 @@ DO_VCMLA(vcmla270s, 4, float32, 3, DO_VCMLAS)
if ((mask & MAKE_64BIT_MASK(0, ESIZE)) =3D=3D 0) { =
\
continue; \
} \
- fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.standard_fp_status_f16 :=
\
+ fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.fp_status[FPST_STD_F16] =
: \
&env->vfp.standard_fp_status; \
if (!(mask & 1)) { \
/* We need the result but without updating flags */ \
@@ -3084,7 +3084,7 @@ DO_2OP_FP_SCALAR_ALL(vfmul_scalar, mul)
if ((mask & MAKE_64BIT_MASK(0, ESIZE)) =3D=3D 0) { =
\
continue; \
} \
- fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.standard_fp_status_f16 :=
\
+ fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.fp_status[FPST_STD_F16] =
: \
&env->vfp.standard_fp_status; \
if (!(mask & 1)) { \
/* We need the result but without updating flags */ \
@@ -3117,7 +3117,7 @@ DO_2OP_FP_ACC_SCALAR(vfmas_scalars, 4, float32, DO_VF=
MAS_SCALARS)
TYPE *m =3D vm; \
TYPE ra =3D (TYPE)ra_in; \
float_status *fpst =3D (ESIZE =3D=3D 2) ? \
- &env->vfp.standard_fp_status_f16 : \
+ &env->vfp.fp_status[FPST_STD_F16] : \
&env->vfp.standard_fp_status; \
for (e =3D 0; e < 16 / ESIZE; e++, mask >>=3D ESIZE) { \
if (mask & 1) { \
@@ -3168,7 +3168,7 @@ DO_FP_VMAXMINV(vminnmavs, 4, float32, true, float32_m=
innum)
if ((mask & emask) =3D=3D 0) { =
\
continue; \
} \
- fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.standard_fp_status_f16 :=
\
+ fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.fp_status[FPST_STD_F16] =
: \
&env->vfp.standard_fp_status; \
if (!(mask & (1 << (e * ESIZE)))) { \
/* We need the result but without updating flags */ \
@@ -3202,7 +3202,7 @@ DO_FP_VMAXMINV(vminnmavs, 4, float32, true, float32_m=
innum)
if ((mask & emask) =3D=3D 0) { =
\
continue; \
} \
- fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.standard_fp_status_f16 :=
\
+ fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.fp_status[FPST_STD_F16] =
: \
&env->vfp.standard_fp_status; \
if (!(mask & (1 << (e * ESIZE)))) { \
/* We need the result but without updating flags */ \
@@ -3267,7 +3267,7 @@ DO_VCMP_FP_BOTH(vfcmples, vfcmple_scalars, 4, float32=
, !DO_GT32)
if ((mask & MAKE_64BIT_MASK(0, ESIZE)) =3D=3D 0) { =
\
continue; \
} \
- fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.standard_fp_status_f16 :=
\
+ fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.fp_status[FPST_STD_F16] =
: \
&env->vfp.standard_fp_status; \
if (!(mask & 1)) { \
/* We need the result but without updating flags */ \
@@ -3301,7 +3301,7 @@ DO_VCVT_FIXED(vcvt_fu, 4, uint32_t, helper_vfp_touls_=
round_to_zero)
float_status *fpst; \
float_status scratch_fpst; \
float_status *base_fpst =3D (ESIZE =3D=3D 2) ? =
\
- &env->vfp.standard_fp_status_f16 : \
+ &env->vfp.fp_status[FPST_STD_F16] : \
&env->vfp.standard_fp_status; \
uint32_t prev_rmode =3D get_float_rounding_mode(base_fpst); \
set_float_rounding_mode(rmode, base_fpst); \
@@ -3427,7 +3427,7 @@ void HELPER(mve_vcvtt_hs)(CPUARMState *env, void *vd,=
void *vm)
if ((mask & MAKE_64BIT_MASK(0, ESIZE)) =3D=3D 0) { =
\
continue; \
} \
- fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.standard_fp_status_f16 :=
\
+ fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.fp_status[FPST_STD_F16] =
: \
&env->vfp.standard_fp_status; \
if (!(mask & 1)) { \
/* We need the result but without updating flags */ \
diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c
index 66a482a9add..4920afeb012 100644
--- a/target/arm/vfp_helper.c
+++ b/target/arm/vfp_helper.c
@@ -122,7 +122,7 @@ static uint32_t vfp_get_fpsr_from_host(CPUARMState *env)
/* FZ16 does not generate an input denormal exception. */
a32_flags |=3D (get_float_exception_flags(&env->vfp.fp_status_f16_a32)
& ~float_flag_input_denormal_flushed);
- a32_flags |=3D (get_float_exception_flags(&env->vfp.standard_fp_status=
_f16)
+ a32_flags |=3D (get_float_exception_flags(&env->vfp.fp_status[FPST_STD=
_F16])
& ~float_flag_input_denormal_flushed);
=20
a64_flags |=3D get_float_exception_flags(&env->vfp.fp_status_a64);
@@ -160,7 +160,7 @@ static void vfp_clear_float_status_exc_flags(CPUARMStat=
e *env)
set_float_exception_flags(0, &env->vfp.fp_status_f16_a32);
set_float_exception_flags(0, &env->vfp.fp_status_f16_a64);
set_float_exception_flags(0, &env->vfp.standard_fp_status);
- set_float_exception_flags(0, &env->vfp.standard_fp_status_f16);
+ set_float_exception_flags(0, &env->vfp.fp_status[FPST_STD_F16]);
set_float_exception_flags(0, &env->vfp.ah_fp_status);
set_float_exception_flags(0, &env->vfp.ah_fp_status_f16);
}
@@ -207,11 +207,11 @@ static void vfp_set_fpcr_to_host(CPUARMState *env, ui=
nt32_t val, uint32_t mask)
bool ftz_enabled =3D val & FPCR_FZ16;
set_flush_to_zero(ftz_enabled, &env->vfp.fp_status_f16_a32);
set_flush_to_zero(ftz_enabled, &env->vfp.fp_status_f16_a64);
- set_flush_to_zero(ftz_enabled, &env->vfp.standard_fp_status_f16);
+ set_flush_to_zero(ftz_enabled, &env->vfp.fp_status[FPST_STD_F16]);
set_flush_to_zero(ftz_enabled, &env->vfp.ah_fp_status_f16);
set_flush_inputs_to_zero(ftz_enabled, &env->vfp.fp_status_f16_a32);
set_flush_inputs_to_zero(ftz_enabled, &env->vfp.fp_status_f16_a64);
- set_flush_inputs_to_zero(ftz_enabled, &env->vfp.standard_fp_status=
_f16);
+ set_flush_inputs_to_zero(ftz_enabled, &env->vfp.fp_status[FPST_STD=
_F16]);
set_flush_inputs_to_zero(ftz_enabled, &env->vfp.ah_fp_status_f16);
}
if (changed & FPCR_FZ) {
--=20
2.34.1