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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org,
qemu-devel@nongnu.org
Subject: [PATCH v2 23/69] target/arm: Handle FPCR.NEP for NEP for FMUL,
FMULX scalar by element
Date: Sat, 1 Feb 2025 16:39:26 +0000
Message-Id: <20250201164012.1660228-24-peter.maydell@linaro.org>
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do_fp3_scalar_idx() is used only for the FMUL and FMULX scalar by
element instructions; these both need to merge the result with the Rn
register when FPCR.NEP is set.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/translate-a64.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 73054b6137f..334aff42753 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -6307,7 +6307,7 @@ static bool do_fp3_scalar_idx(DisasContext *s, arg_rr=
x_e *a, const FPScalar *f)
=20
read_vec_element(s, t1, a->rm, a->idx, MO_64);
f->gen_d(t0, t0, t1, fpstatus_ptr(FPST_A64));
- write_fp_dreg(s, a->rd, t0);
+ write_fp_dreg_merging(s, a->rd, a->rn, t0);
}
break;
case MO_32:
@@ -6317,7 +6317,7 @@ static bool do_fp3_scalar_idx(DisasContext *s, arg_rr=
x_e *a, const FPScalar *f)
=20
read_vec_element_i32(s, t1, a->rm, a->idx, MO_32);
f->gen_s(t0, t0, t1, fpstatus_ptr(FPST_A64));
- write_fp_sreg(s, a->rd, t0);
+ write_fp_sreg_merging(s, a->rd, a->rn, t0);
}
break;
case MO_16:
@@ -6330,7 +6330,7 @@ static bool do_fp3_scalar_idx(DisasContext *s, arg_rr=
x_e *a, const FPScalar *f)
=20
read_vec_element_i32(s, t1, a->rm, a->idx, MO_16);
f->gen_h(t0, t0, t1, fpstatus_ptr(FPST_A64_F16));
- write_fp_sreg(s, a->rd, t0);
+ write_fp_hreg_merging(s, a->rd, a->rn, t0);
}
break;
default:
--=20
2.34.1