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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org,
qemu-devel@nongnu.org
Subject: [PATCH v2 21/69] target/arm: Handle FPCR.NEP for scalar FABS and FNEG
Date: Sat, 1 Feb 2025 16:39:24 +0000
Message-Id: <20250201164012.1660228-22-peter.maydell@linaro.org>
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Handle FPCR.NEP merging for scalar FABS and FNEG; this requires
an extra parameter to do_fp1_scalar_int(), since FMOV scalar
does not have the merging behaviour.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/translate-a64.c | 27 ++++++++++++++++++++-------
1 file changed, 20 insertions(+), 7 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index f31ac3b9549..35db806d0b7 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -8437,21 +8437,30 @@ typedef struct FPScalar1Int {
} FPScalar1Int;
=20
static bool do_fp1_scalar_int(DisasContext *s, arg_rr_e *a,
- const FPScalar1Int *f)
+ const FPScalar1Int *f,
+ bool merging)
{
switch (a->esz) {
case MO_64:
if (fp_access_check(s)) {
TCGv_i64 t =3D read_fp_dreg(s, a->rn);
f->gen_d(t, t);
- write_fp_dreg(s, a->rd, t);
+ if (merging) {
+ write_fp_dreg_merging(s, a->rd, a->rd, t);
+ } else {
+ write_fp_dreg(s, a->rd, t);
+ }
}
break;
case MO_32:
if (fp_access_check(s)) {
TCGv_i32 t =3D read_fp_sreg(s, a->rn);
f->gen_s(t, t);
- write_fp_sreg(s, a->rd, t);
+ if (merging) {
+ write_fp_sreg_merging(s, a->rd, a->rd, t);
+ } else {
+ write_fp_sreg(s, a->rd, t);
+ }
}
break;
case MO_16:
@@ -8461,7 +8470,11 @@ static bool do_fp1_scalar_int(DisasContext *s, arg_r=
r_e *a,
if (fp_access_check(s)) {
TCGv_i32 t =3D read_fp_hreg(s, a->rn);
f->gen_h(t, t);
- write_fp_sreg(s, a->rd, t);
+ if (merging) {
+ write_fp_hreg_merging(s, a->rd, a->rd, t);
+ } else {
+ write_fp_sreg(s, a->rd, t);
+ }
}
break;
default:
@@ -8475,21 +8488,21 @@ static const FPScalar1Int f_scalar_fmov =3D {
tcg_gen_mov_i32,
tcg_gen_mov_i64,
};
-TRANS(FMOV_s, do_fp1_scalar_int, a, &f_scalar_fmov)
+TRANS(FMOV_s, do_fp1_scalar_int, a, &f_scalar_fmov, false)
=20
static const FPScalar1Int f_scalar_fabs =3D {
gen_vfp_absh,
gen_vfp_abss,
gen_vfp_absd,
};
-TRANS(FABS_s, do_fp1_scalar_int, a, &f_scalar_fabs)
+TRANS(FABS_s, do_fp1_scalar_int, a, &f_scalar_fabs, true)
=20
static const FPScalar1Int f_scalar_fneg =3D {
gen_vfp_negh,
gen_vfp_negs,
gen_vfp_negd,
};
-TRANS(FNEG_s, do_fp1_scalar_int, a, &f_scalar_fneg)
+TRANS(FNEG_s, do_fp1_scalar_int, a, &f_scalar_fneg, true)
=20
typedef struct FPScalar1 {
void (*gen_h)(TCGv_i32, TCGv_i32, TCGv_ptr);
--=20
2.34.1