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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c2a1c418esm13920133f8f.95.2025.01.28.02.45.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jan 2025 02:45:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1738061125; x=1738665925; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kVKf2PwS8I38xe+s6q6G1j7KxzUeSwKx/0XZ7RVEtQ4=; b=nob02JZdE4dkqFMj/PwL5Ut1kCqXGMSZmVj9wVeFYkUyr6HsIth3iWovEq10Rm7YrJ dAG/xmrcTJNc2m3FCNQz2s1CQDSOyURpsnQ/lRdN2X5IBY7R3GPMDNSfzJ8gNaJkEbKD HAgpFG7pBBEKh44500gFTUE6k8hx6sC9FoApJNOeu18uFy3dhZD5tjYhj9Jt7MDHo3c4 UNS+CWmtFo6KLD1jCYm0h1J2bjk7jTHGg+rrYM0py8/3VF4pR8ZKtwaIqzpnWT8/ms9C G4EBfRPi+U+A4U3idfJmHKhPhnuJZOh1oNku/XzAHRWSkDPoWPsRcOkLtPxlKZWp/e3r jHMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738061125; x=1738665925; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kVKf2PwS8I38xe+s6q6G1j7KxzUeSwKx/0XZ7RVEtQ4=; b=pEks02IkmCwi/atkLlr5sBexZJwarSSyG3IIEvpZCmEOUYz+eMBo/QxFtq3PVVxBpM Lq4G++DHOHaSqrk9iZQ0po3R7U7t+qhuiWPyKqs0zKPZPopJ3gG065gXChyRTV8hGqcX rHeZ2pxiHuSHhJWSOsRdP52UB174q2sQ3iLjEu7ZWF+ik9w5g65YJG53wclMmoCBsRyH GK8pUGiw+TCopkefHtOKG686544kMTY6gM+wRDUv9N7yFwXcbgXbDoD2BhrGfn2D5FRU k2PbaXd1ZSYINAaAmZKQwKzm49KBg8SHSHLkXkjpPQ/UNQ/NecFrUbQUjErdC2Ut5bD5 tNDw== X-Forwarded-Encrypted: i=1; AJvYcCX2jAxcPJIHdv/EYG8+MpXlyDF8NfyAKWuFlyD1FWEawsMZN3EcC4MJIz91iMbeXU7XJnjWmeW11ei2@nongnu.org X-Gm-Message-State: AOJu0Yz0n55ZKP5IAo3+F8g/K56bhWT085bIajnr08xRDTxkgziVB+ot tCtkizUHOtT2IJgFXGBRLt8GKG/BBohfDCj9xwEmcynrvZnp9An1jXZs+AR0L4w= X-Gm-Gg: ASbGncvO8DtrfnDKPhpQ6XlnTOL/RnM6mS2sp7UbDglRxBvMkfGWUsEo7g56JaLo4Po RLdwqLxz1kpxALdw4vWThipmsJXQadyj41qK5Lmcp+X1JyxkE2Jz+PiSK2xNmm8IueYK+rwYLZt W+XrrYrh76W92oEGqMKPopOwvnu6aQVRhjAvEdA36uH2yXTalOGZWRb14VwAB/mcaW03xYOdK6w Kd1xLJcHc3mgRS0XWrmEepIW4Nj9qSMMlONZVKQsb+oAil3yq+t7sdCvq9qeh9R8ar5iDodpLrG u8zQJh2fDiGNlSd4roFj X-Google-Smtp-Source: AGHT+IEXNaaNlQMw+Wc6UbliAxDgGFEArnZqIVWC/vQY6e5FKfpMJKE9NtXc+tlfNZCNz2zi8fMsnA== X-Received: by 2002:a05:6000:144e:b0:38a:88bc:d57d with SMTP id ffacd0b85a97d-38bf56562e1mr36755509f8f.2.1738061124937; Tue, 28 Jan 2025 02:45:24 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: qemu-block@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Bin Meng , Bernhard Beschow Subject: [PATCH 03/11] hw/sd/omap_mmc: Convert output qemu_irqs to gpio and sysbus IRQ APIs Date: Tue, 28 Jan 2025 10:45:11 +0000 Message-Id: <20250128104519.3981448-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128104519.3981448-1-peter.maydell@linaro.org> References: <20250128104519.3981448-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1738061261440019000 Content-Type: text/plain; charset="utf-8" The omap_mmc device has three outbound qemu_irq lines: * one actual interrupt line * two which connect to the DMA controller and are signalled for TX and RX DMA Convert these to a sysbus IRQ and two named GPIO outputs. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- hw/sd/omap_mmc.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/hw/sd/omap_mmc.c b/hw/sd/omap_mmc.c index dd45abc075e..d497e31a6c5 100644 --- a/hw/sd/omap_mmc.c +++ b/hw/sd/omap_mmc.c @@ -31,7 +31,8 @@ typedef struct OMAPMMCState { SysBusDevice parent_obj; =20 qemu_irq irq; - qemu_irq *dma; + qemu_irq dma_tx_gpio; + qemu_irq dma_rx_gpio; qemu_irq coverswitch; MemoryRegion iomem; omap_clk clk; @@ -87,22 +88,22 @@ static void omap_mmc_fifolevel_update(OMAPMMCState *hos= t) if (host->fifo_len > host->af_level && host->ddir) { if (host->rx_dma) { host->status &=3D 0xfbff; - qemu_irq_raise(host->dma[1]); + qemu_irq_raise(host->dma_rx_gpio); } else host->status |=3D 0x0400; } else { host->status &=3D 0xfbff; - qemu_irq_lower(host->dma[1]); + qemu_irq_lower(host->dma_rx_gpio); } =20 if (host->fifo_len < host->ae_level && !host->ddir) { if (host->tx_dma) { host->status &=3D 0xf7ff; - qemu_irq_raise(host->dma[0]); + qemu_irq_raise(host->dma_tx_gpio); } else host->status |=3D 0x0800; } else { - qemu_irq_lower(host->dma[0]); + qemu_irq_lower(host->dma_tx_gpio); host->status &=3D 0xf7ff; } } @@ -601,12 +602,13 @@ DeviceState *omap_mmc_init(hwaddr base, s =3D OMAP_MMC(dev); sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal); =20 - s->irq =3D irq; - s->dma =3D dma; s->clk =3D clk; =20 memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(SYS_BUS_DEVICE(s), = 0)); + qdev_connect_gpio_out_named(dev, "dma-tx", 0, dma[0]); + qdev_connect_gpio_out_named(dev, "dma-rx", 0, dma[1]); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); =20 /* Instantiate the storage */ s->card =3D sd_init(blk, false); @@ -633,6 +635,10 @@ static void omap_mmc_initfn(Object *obj) =20 memory_region_init_io(&s->iomem, obj, &omap_mmc_ops, s, "omap.mmc", 0x= 800); sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem); + + sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq); + qdev_init_gpio_out_named(DEVICE(obj), &s->dma_tx_gpio, "dma-tx", 1); + qdev_init_gpio_out_named(DEVICE(obj), &s->dma_rx_gpio, "dma-rx", 1); } =20 static void omap_mmc_realize(DeviceState *dev, Error **errp) --=20 2.34.1