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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438bd502007sm66229665e9.14.2025.01.25.09.01.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sat, 25 Jan 2025 09:01:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1737824511; x=1738429311; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hlhipGgHKI5N0qn8K1o15KvLAOg1D9rjFfwCNaRH9Tg=; b=hr6Rz8tuLVfDG6ZpyODy2j9ESmVfLqT0yKiFjTLLPgFXC9rTnH5x/GRmOkIVhKfQuB fK0e1TiskP+AofQbitYIp8m5wti7ouMpzVup+fGs4RDsOMayB0nuPWMSuccgBZAAmlbM Ln4QnHIF1nlzU8VHETvGERLOwxzDobK4ixgGJS3g6k1iqocOOheGy7IUvK5cutsEnU7p Zv1J/bld+dwV28tY3sYj8pxgWtklGkD5XbBoNDmXp4jmRyYOfj9qSJzXXq1592I/Acsh rgYM3NqhDVMmkByt9JoPGqj5KQuWzF7P7rXLX951fGByperJ+OA49iW6Lne4eK9M1EGY Bq1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1737824511; x=1738429311; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hlhipGgHKI5N0qn8K1o15KvLAOg1D9rjFfwCNaRH9Tg=; b=eILC25rWmviawmfmMQvQ0bnPS2XfoqOcKPjDnFmo0jZODrcM1j5v80dwohg2Oiv0+J kei+LXWNyzM2/3GFSYpZauW381q35uQaVLCaxEhJ0CoduPUpNa8FQ3PdwTRzw0J+f+if 52W3dnilbbC6KuPLp18uDB8wVFmzRNXQdn+PRvi4FHLp17nQXcD5z+PBi7AqmdU7/izu Z9sN69vEdRt9peFRK5P0ERHh9NVxIWsd2obM1madLRLRTe76XjOg2UyIYiLYO1F3Wv2U WqHdLDy6uHnW0WfZXJQUvPM3KC3HKaruJiEVvg4A2UuIDGwSbw2LSYmSjNrS9ynG6dq9 vE4g== X-Gm-Message-State: AOJu0YwzXkVOQkF48RvF15EyQ5SoYKvLM1hDGVg/0KdbdNBci0gxg/iy VjYG1YkVYsOQTSnCNXXE1lZHqjV3qz5vkY2vjyVj94rCcBDIft53bnmMph8d1yqtYtvuFurYTSL dFBw= X-Gm-Gg: ASbGncuugKBwugZdezrxwR5o739R1Auk3wfptA9P4CnpQvU+EdDnyXLzLkDbEzCWcBD wcLvuzMucLA4ZU4tVgyfLd0zI3o/INXPINho61lTMIbFC2EeuPkG1nToiLqiKlQzP3y5Nz78D4/ CDKjmG4WwuaSJTANdvH+Mo20+XXS03Ugirv6AQgOc41r7PJTp3VTLoFtHTLigXvUIlfBr795AP3 r7DDR0fHKxr+XhE5Vx4KFaX5+5Ny9h0/DLHXKel5bKQ6ixbUMEbO6yhEnbRfDkCeEAcJSxCHrtD 4B1nt4xArgyiVrEWIk+Y+deSOuOjBvnzXF3lC9sM/4gp9DxnwIGEj7Mu5g5FBnrf0w== X-Google-Smtp-Source: AGHT+IEf2NKsj8zOnsCZFWI37fq2kOCafRzQbgx+Nuf5k0Cmo2DUwWLvcs8jsT47wYuAkXvvmwDlmQ== X-Received: by 2002:a05:600c:384a:b0:431:6153:a258 with SMTP id 5b1f17b1804b1-438913db2c3mr342701525e9.13.1737824510730; Sat, 25 Jan 2025 09:01:50 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 05/24] target/arm: Move has_work() from CPUClass to SysemuCPUOps Date: Sat, 25 Jan 2025 18:01:06 +0100 Message-ID: <20250125170125.32855-6-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250125170125.32855-1-philmd@linaro.org> References: <20250125170125.32855-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1737824599169019000 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/arm/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 048b825a006..322c95038d5 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -123,6 +123,7 @@ void arm_restore_state_to_opc(CPUState *cs, } #endif /* CONFIG_TCG */ =20 +#ifndef CONFIG_USER_ONLY /* * With SCTLR_ELx.NMI =3D=3D 0, IRQ with Superpriority is masked identical= ly with * IRQ without Superpriority. Moreover, if the GIC is configured so that @@ -141,6 +142,7 @@ static bool arm_cpu_has_work(CPUState *cs) | CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ | CPU_INTERRUPT_VSERR | CPU_INTERRUPT_EXITTB); } +#endif /* !CONFIG_USER_ONLY */ =20 static int arm_cpu_mmu_index(CPUState *cs, bool ifetch) { @@ -2671,6 +2673,7 @@ static const gchar *arm_gdb_arch_name(CPUState *cs) #include "hw/core/sysemu-cpu-ops.h" =20 static const struct SysemuCPUOps arm_sysemu_ops =3D { + .has_work =3D arm_cpu_has_work, .get_phys_page_attrs_debug =3D arm_cpu_get_phys_page_attrs_debug, .asidx_from_attrs =3D arm_asidx_from_attrs, .write_elf32_note =3D arm_cpu_write_elf32_note, @@ -2721,7 +2724,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void = *data) &acc->parent_phases); =20 cc->class_by_name =3D arm_cpu_class_by_name; - cc->has_work =3D arm_cpu_has_work; cc->mmu_index =3D arm_cpu_mmu_index; cc->dump_state =3D arm_cpu_dump_state; cc->set_pc =3D arm_cpu_set_pc; --=20 2.47.1